Commit Graph

2 Commits

Author SHA1 Message Date
Ricky Taylor 47f52f989b [M68k][AsmParser] Support parsing register masks & fix printing them
Fixes PR51580.

Register masks will now be printed as 'movem.l (%sp), %a0-%a5/%d5'
for example and can now be parsed in the same format.

Previously the printed syntax was 'movem.l (%sp), %a0-%a5,%d', which
didn't match prior art and was too ambiguous to easily parse.

Differential Revision: https://reviews.llvm.org/D108597
2021-08-24 10:40:02 +01:00
Min-Yih Hsu c23a780c30 [M68k][test](6/8) Add all of the tests
And a small utilities -- extract-section.py -- that helps extracting
specific object file section and printing in textual format. This
utility is just a workaround for tests inside `Encoding`. Hopefully in
the future we can replace dependencies in those tests with existing tools
(e.g. llvm-readobj). Please refer to this bug for more context:
https://bugs.llvm.org/show_bug.cgi?id=49245

Note that since we don't have AsmParser for now, we are testing the MC
part using MIR as input and put those tests under the `Encoding` folder.
In the future when AsmParser (and disassembler) is finished, those tests
will be moved to `test/MC/M68k`.

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88392
2021-03-08 12:30:57 -08:00