4 Commits

Author	SHA1	Message	Date
Georgii Rymar	98a4289810	[llvm-readobj] - For SHT_REL relocations, don't display an addend. ... This is https://bugs.llvm.org/show_bug.cgi?id=44257. In LLVM style we always print `0` as addend when dumping SHT_REL relocations. It is confusing, this patch stops printing it as the first comment on the bug page suggests. Differential revision: https://reviews.llvm.org/D93033	2020-12-14 12:03:00 +03:00
Elvina Yakubova	b36a3e6140	[llvm-readobj] Update tests because of changes in llvm-readobj behavior ... This patch updates tests using llvm-readobj and llvm-readelf, because soon reading from stdin will be achievable only via a '-' as described here: https://bugs.llvm.org/show_bug.cgi?id=46400. Patch with changes to llvm-readobj behavior is here: https://reviews.llvm.org/D83704 Differential Revision: https://reviews.llvm.org/D83912 Reviewed by: jhenderson, MaskRay, grimar	2020-07-20 10:39:04 +01:00
Saleem Abdulrasool	2d48edeca3	ARM IAS: support emitting constant values in target expressions ... A 32-bit immediate value can be formed from a constant expression and loaded into a register. Add support to emit this into an object file. Because this value is a constant, a relocation must *not* be produced for it. llvm-svn: 199023	2014-01-11 23:03:48 +00:00
Saleem Abdulrasool	435f45653a	ARM IAS: support #:{lower,upper}16: for GNU compatibility ... The GNU assembler supports prefixing the expression with a '#' to indiciate that the value that is being moved is infact a constant. This improves the compatibility of the integrated assembler's parser for this. llvm-svn: 198916	2014-01-10 04:38:40 +00:00