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14 Commits

Author SHA1 Message Date
Sheng 64d326c33c [M68k] Add MC support for link/unlk 
Reviewers: myhsu

Differential Revision: https://reviews.llvm.org/D125444
 2022-08-08 11:00:11 +08:00
Sheng 09865ae95d [NFC][M68k][test] Add disassembler tests for move instructions 2022-05-22 10:35:13 +08:00
Sheng a5d618b393 [M68k][Disassembler] Fix decoding conflict 
This diff fixes decoding conflict between these pair of instructions:

ADD(16|32)dd / ADD(16|32)dr
SUB(16|32)dd / SUB(16|32)dr
AND(16|32)dd / AND(16|32)dr
OR(16|32)dd  / OR(16|32)dr

Reviewed By: ricky26

Differential Revision: https://reviews.llvm.org/D125861
 2022-05-19 09:10:50 +08:00
Sheng cf0b6df6db [M68k][Disassembler] Adopt the new variable length decoder 
This is an example usage of D120958.

After these patches are landed, we can strip off the codebeads officially.

Reviewed By: myhsu

Differential Revision: https://reviews.llvm.org/D120960
 2022-05-15 08:44:58 +08:00
Min-Yih Hsu 18b38ff6c7 [M68k] Adopt VarLenCodeEmitter for move instructions 
The `move` instruction has one of the most complicate sets of variants, so
we're refactoring it first before finishing up rest of the data
instructions in a separate patch.

Note that since we're introducing more `move` variants, the codegen
actually got improved in terms of code size.
 2022-04-04 23:02:27 -07:00
Min-Yih Hsu fccdc5618d [M68k] Adopt VarLenCodeEmitter for shift / rotate instructions 
This patch is covered by existing MC tests.
 2022-04-03 22:52:32 -07:00
Min-Yih Hsu 4986a41f58 [M68k] Adopt VarLenCodeEmitter for bits instructions 
And introduce operand encoding fragments (i.e. MxEncMemOp record) for
addressing modes 'o' and 'e'.
 2022-02-17 14:16:19 -08:00
Sheng 4306fbff9c Revert "Revert "[M68k] Adopt VarLenCodeEmitter for control instructions"" 
This reverts commit 69a7d49de6.

llvm/test/MC/M68k/Relaxations/branch.s needs disassembler support.

So I disabled it temporarily
 2022-02-16 17:41:49 +08:00
Sheng 69a7d49de6 Revert "[M68k] Adopt VarLenCodeEmitter for control instructions" 
This reverts commit 9ffd498fcb.

This patch introduce regression on MC/M68k/Relaxations/branch.s
 2022-02-16 17:09:46 +08:00
Sheng 9ffd498fcb [M68k] Adopt VarLenCodeEmitter for control instructions 
Refactor the instructions in M68kInstrControl.td to use the VarLenCodeEmitter.

This patch is tested by the existing test cases.

Reviewed By: myhsu, ricky26

Differential Revision: https://reviews.llvm.org/D119665
 2022-02-16 12:54:20 +08:00
Min-Yih Hsu 08f2b0dcf6 [M68k] Adopt the new VarLenCodeEmitterGen for arithmetic instructions 
This patch refactors all the existing M68k arithmetic instructions
to use the new VarLenCodeEmitterGen infrastructure.

This patch is tested by the existing MC test cases.

Note that one of the codegen tests needed to be updated because the
ordering of two equivalent instructions were switched.

Differential Revision: https://reviews.llvm.org/D115234
 2022-02-11 09:31:12 -08:00
Min-Yih Hsu 07be76f2ae [M68k][Disassembler][NFC] Re-organize test files 
Put test cases of each instruction category into their own files. NFC.
 2022-01-25 13:10:15 +08:00
Min-Yih Hsu 2167e237ee [M68k] Update disassembler test case following up ADD / ADDA changes 
Update disassembler test case to reflect the changes on ADD/ADDA
instruction separation.
 2021-08-08 14:20:46 -07:00
Ricky Taylor 2221185776 [M68k] Implement Disassembler 
This is an implementation of a disassembler for M68k.

Differential Revision: https://reviews.llvm.org/D98540
 2021-04-19 22:24:12 +01:00