dad84a7c02
Fixed packed structure breakage from earlier TargetData patch; applied
...
Chris Lattner's code style suggestions.
Patch by Scott Michel!
llvm-svn: 34292
2007-02-15 02:11:06 +00:00
945e437c65
Generalize TargetData strings, to support more interesting forms of data.
...
Patch by Scott Michel.
llvm-svn: 34266
2007-02-14 05:52:17 +00:00
6719d3d0a2
Well this isn't as ugly and it works better. At least gcc bootstraps again
...
llvm-svn: 34254
2007-02-13 23:41:16 +00:00
09a32e42bd
add a note
...
llvm-svn: 34249
2007-02-13 21:44:43 +00:00
50c6a8c3a1
Add space between // and the comment.
...
llvm-svn: 34246
2007-02-13 20:06:15 +00:00
048e16ff8f
Add ABI information to ARM subtarget.
...
llvm-svn: 34245
2007-02-13 19:52:28 +00:00
603f201cba
According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned.
...
llvm-svn: 34241
2007-02-13 14:07:13 +00:00
44e9472fc6
more notes
...
llvm-svn: 34204
2007-02-12 21:20:26 +00:00
b5c89c8d2d
add a note
...
llvm-svn: 34202
2007-02-12 20:26:34 +00:00
fed6f0e571
Switch LayoutInfo to be a DenseMap instead of an std::map. This speeds up
...
-load-vn -gcse by 2.3%.
llvm-svn: 34160
2007-02-10 20:26:17 +00:00
22206711c9
add a typedef
...
llvm-svn: 34159
2007-02-10 20:18:06 +00:00
e472f9c4dc
eliminate the std::vector from StructLayout, allocating the elements immediately
...
after the StructLayout object in memory. This marginally improves locality,
speeding up -load-vn -gcse by ~0.8%.
llvm-svn: 34158
2007-02-10 20:15:41 +00:00
b84892d2d2
encapsulate the rest of the StructLayout members.
...
llvm-svn: 34157
2007-02-10 19:59:22 +00:00
c473d8e431
Privatize StructLayout::MemberOffsets, adding an accessor
...
llvm-svn: 34156
2007-02-10 19:55:17 +00:00
1e692e823c
Use ManagedStatic to manage LayoutInfo, instead of rolling our own.
...
llvm-svn: 34154
2007-02-10 19:43:18 +00:00
336e3962ff
Change TargetData::getIndexedOffset interface to not require indices
...
in a vector.
llvm-svn: 34153
2007-02-10 19:33:15 +00:00
540f5e0d41
These vectors are frequently large. Use std::vector instead.
...
llvm-svn: 34109
2007-02-09 23:59:14 +00:00
8b7700f146
Add reference counting to constantpool entries. Delete the unused ones.
...
llvm-svn: 34105
2007-02-09 20:54:44 +00:00
c9088b4c8e
add a note
...
llvm-svn: 34101
2007-02-09 17:38:01 +00:00
ba52b94fa2
Remove fixed item
...
llvm-svn: 34081
2007-02-09 04:19:54 +00:00
f76bb63555
This is done.
...
llvm-svn: 34072
2007-02-08 23:53:38 +00:00
9a4a1515ee
return addresses, those I already have
...
llvm-svn: 34056
2007-02-08 17:37:41 +00:00
e796b6de45
Fixed comments.
...
llvm-svn: 34040
2007-02-08 06:05:08 +00:00
2aa9a42f24
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
...
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
llvm-svn: 34034
2007-02-08 01:39:44 +00:00
59889ae93f
Added new method to add a "simple" code emitter. That is, to only add
...
the code emitter and not set variables.
llvm-svn: 34033
2007-02-08 01:38:33 +00:00
4e8ad36338
Dead files. Functionality has been taken over by the Add*Writer functions.
...
llvm-svn: 34029
2007-02-08 01:32:51 +00:00
2ff4c973b1
isLowRegister() expects input is a physical register.
...
llvm-svn: 34013
2007-02-07 21:44:33 +00:00
cca9b1d768
Rename.
...
llvm-svn: 34011
2007-02-07 21:24:09 +00:00
ec4c67f0a7
If sp offset will be materialized in a register. Clear the offset field of str / ldr.
...
llvm-svn: 34010
2007-02-07 21:19:58 +00:00
62aef236de
Get rid of references to iostream.
...
llvm-svn: 34009
2007-02-07 21:18:32 +00:00
b216ea1aa6
New entry.
...
llvm-svn: 34000
2007-02-07 09:22:15 +00:00
78c5a9422d
In thumb mode, R3 is reserved, but it can be live in to the function. If
...
that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!
llvm-svn: 33999
2007-02-07 09:17:36 +00:00
2ff0d3a2ab
Update
...
llvm-svn: 33998
2007-02-07 08:37:57 +00:00
b5519b5361
- If fp (r7) is used to reference stack objects, use [r, r] address mode.
...
- If there is a dynamic alloca, in the epilogue, restore the value of sp
using r7 - offset.
- Other bug fixes.
llvm-svn: 33997
2007-02-07 08:37:31 +00:00
12cf8ddaea
eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's.
...
llvm-svn: 33975
2007-02-07 02:44:23 +00:00
ec13f826a2
Spill / restore should avoid modifying the condition register.
...
llvm-svn: 33971
2007-02-07 00:06:56 +00:00
a974031ebd
Select add FI, c correctly.
...
llvm-svn: 33960
2007-02-06 09:11:20 +00:00
ea3308aef0
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.
...
llvm-svn: 33958
2007-02-06 06:13:29 +00:00
2fc792f86b
eliminateFrameIndex() bug when frame pointer is used as base register.
...
llvm-svn: 33945
2007-02-06 00:23:31 +00:00
650d0672f7
- Store val, [sp, c] must be selected to tSTRsp.
...
- If c does not fit in the offset field, materialize sp + c into a register
using tADDhirr.
llvm-svn: 33944
2007-02-06 00:22:06 +00:00
92b50800f6
Although targets are not required to support integers > 64bits, TargetData
...
must in order for backends that do want to support large integer types to be
able to function. Consequently, don't assert if the bitwidth > 64 bits
when computing the size and alignment. Instead, compute the size by rounding
up to the next even number of bytes for the size. Compute the alignment
as the same as the LongABIAlignment. These provide reasonable defaults
that the target can override.
llvm-svn: 33943
2007-02-05 23:51:43 +00:00
3aaaa0b2bd
For PR411:
...
This patch replaces the SymbolTable class with ValueSymbolTable which does
not support types planes. This means that all symbol names in LLVM must now
be unique. The patch addresses the necessary changes to deal with this and
removes code no longer needed as a result. This completes the bulk of the
changes for this PR. Some cleanup patches will follow.
llvm-svn: 33918
2007-02-05 20:47:22 +00:00
fe8c530d79
Fix a miscompilation in the addr mode code trying to implement X | C and
...
X + C to promote LEA formation. We would incorrectly apply it in some cases
(test) and miss it in others.
This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll
llvm-svn: 33884
2007-02-04 20:18:17 +00:00
456db39ea9
ARM callseq_end should have a input flag operand so it would be scheduled right after the call.
...
llvm-svn: 33832
2007-02-03 09:11:58 +00:00
4b6c8f7f5e
Fix comments.
...
llvm-svn: 33831
2007-02-03 08:53:01 +00:00
a883f55eca
Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses
...
non-Mach-O-specific information.
llvm-svn: 33819
2007-02-03 02:41:58 +00:00
2c350921e2
Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The
...
PPCMachOWriter is now trivial.
llvm-svn: 33818
2007-02-03 02:40:57 +00:00
c85e32c730
Put destructor out-of-line.
...
llvm-svn: 33817
2007-02-03 02:40:10 +00:00
36d559d369
- Branch max. displacement calculation bug.
...
- Add debugging info.
llvm-svn: 33811
2007-02-03 02:08:34 +00:00
b739f7d337
bugfix: SP isn't resetted when function has FP and there is no spills.
...
llvm-svn: 33800
2007-02-02 23:08:40 +00:00
f089c99f1d
Another thumb large stack offset codegen bug.
...
llvm-svn: 33795
2007-02-02 21:08:39 +00:00
d9d94700a4
Use MBB.empty() instead of MBB.size() for speed.
...
llvm-svn: 33789
2007-02-02 19:09:19 +00:00
3ad22567b3
Watch out for empty BB.
...
llvm-svn: 33788
2007-02-02 18:49:02 +00:00
fda6550545
Ugh. Only meant to do this in thumb mode.
...
llvm-svn: 33780
2007-02-02 08:58:48 +00:00
2d5b4ac38f
add a note
...
llvm-svn: 33778
2007-02-02 04:36:46 +00:00
2341c22ec7
Changes to support making the shift instructions be true BinaryOperators.
...
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
2007-02-02 02:16:23 +00:00
48b094d9dd
Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant.
...
llvm-svn: 33775
2007-02-02 01:53:26 +00:00
9b9e4ae796
Thumb does not have clz.
...
llvm-svn: 33773
2007-02-01 23:34:03 +00:00
2c355da986
Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll)
...
llvm-svn: 33763
2007-02-01 21:43:53 +00:00
fd522996c8
Pasto. Lots of it.
...
llvm-svn: 33762
2007-02-01 20:44:52 +00:00
903e01d407
Fix .thumb_func directive on linux.
...
llvm-svn: 33759
2007-02-01 18:25:34 +00:00
c3de9b4b14
Support for non-landing pad exception handling.
...
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
f9a4c690de
- Off by one bugs in maximum displacement calculation / testing.
...
- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
llvm-svn: 33753
2007-02-01 10:16:15 +00:00
1b4e6015b4
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
...
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
llvm-svn: 33752
2007-02-01 08:39:52 +00:00
06736d0f88
.set pc relative displacement bug: label should be moved down one instruction
...
to just before the add r1, pc:
Before:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
Now:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
mov r1, #PCRELV0
LPCRELL0:
add r1, pc
llvm-svn: 33744
2007-02-01 03:04:49 +00:00
0df1536173
Add a note.
...
llvm-svn: 33743
2007-02-01 02:46:20 +00:00
e724492566
Also set alignment of stack-based structs to 4 in thumb mode.
...
llvm-svn: 33741
2007-02-01 02:18:36 +00:00
e7e966de5e
Special epilogue for vararg functions. We cannot do a pop to pc because
...
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
pop {r4, r5, r6, r7}
pop {r3}
add sp, #3 * 4
bx r3
llvm-svn: 33739
2007-02-01 01:49:46 +00:00
234e031e36
Pessmistically assume the .align 2 before the first constpool entry adds
...
two bytes padding.
llvm-svn: 33734
2007-02-01 01:09:47 +00:00
29f920877d
Possible JT improvements.
...
llvm-svn: 33733
2007-02-01 01:07:48 +00:00
f7937005a3
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
...
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
ed81dea45b
Don't emit unnecessary .align directive.
...
llvm-svn: 33729
2007-01-31 23:39:39 +00:00
e5c19993cd
Handle an interesting corner case: the constpool_entry being reference is two
...
instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
llvm-svn: 33728
2007-01-31 23:35:18 +00:00
b0ff625a31
Don't want to add FramePtr to callee save spill list twice.
...
llvm-svn: 33727
2007-01-31 23:17:29 +00:00
6f1c20a8e6
Darwin ABI requires FP to point to stack slot of prev FP.
...
llvm-svn: 33724
2007-01-31 22:25:33 +00:00
2e309b15a7
Add entry.
...
llvm-svn: 33723
2007-01-31 22:11:38 +00:00
1c5837dc4a
Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
...
change preferred alignment of short, byte, bool to 4.
llvm-svn: 33722
2007-01-31 22:08:40 +00:00
ffe1d9f7fa
Update comment.
...
llvm-svn: 33721
2007-01-31 22:06:44 +00:00
d7e39eb443
Dead comment.
...
llvm-svn: 33719
2007-01-31 21:31:25 +00:00
0584836340
Thumb asm syntax does not want 's' suffix for flag setting opcodes.
...
llvm-svn: 33717
2007-01-31 20:12:31 +00:00
1f3fc4b3f0
When determining whether a pc relative branch / load displacement fits in the
...
instruction field, adjust it for PC value (4 for thumb, 8 for arm).
llvm-svn: 33711
2007-01-31 19:57:44 +00:00
37ebf9317b
A relatively simple PPC optimization.
...
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
7169bd8784
Some comments.
...
llvm-svn: 33707
2007-01-31 18:29:27 +00:00
456928bbbc
ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
...
llvm-svn: 33706
2007-01-31 18:19:07 +00:00
7ae4f5599e
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
...
llvm-svn: 33703
2007-01-31 13:12:46 +00:00
143576ddd2
Specify the right CC for comparison libcalls.
...
llvm-svn: 33702
2007-01-31 09:30:58 +00:00
491fcdb49b
Observe -soft-float.
...
llvm-svn: 33699
2007-01-31 08:40:13 +00:00
345877e77c
- Added Thumb constpool island support.
...
- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
llvm-svn: 33690
2007-01-31 02:22:22 +00:00
dd7a688bb8
During PEI, if the immediate value of sp + offset is too large (i.e. something
...
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.
llvm-svn: 33667
2007-01-30 23:01:46 +00:00
83f35170fa
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
...
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
llvm-svn: 33664
2007-01-30 20:37:08 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
95b85e34ff
Copy and paste bug.
...
llvm-svn: 33658
2007-01-30 08:22:33 +00:00
0e083d0161
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
ce8fa3ed83
Misseed thumb jumptable branch.
...
llvm-svn: 33656
2007-01-30 08:03:06 +00:00
e43ca022bf
In thumb mode, round up stack frame size to multiple of 4 since add/sub
...
sp, imm instructions implicitly multiply the offset by 4.
llvm-svn: 33653
2007-01-30 02:57:02 +00:00
c419d983d6
Thumb eliminateFrameIndex fixes.
...
llvm-svn: 33652
2007-01-30 02:36:01 +00:00
1cd3c0efb8
Change the operand orders to t_addrmode_s* to make it easier to morph
...
instructions that use these address modes to instructions that use
t_addrmode_sp.
llvm-svn: 33651
2007-01-30 02:35:32 +00:00
7fa6964dc2
- In thumb mode, if size of MachineFunction is >= 2048, force LR to be
...
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
llvm-svn: 33650
2007-01-30 01:18:38 +00:00
863736b0ad
Use BL to implement Thumb far jumps.
...
llvm-svn: 33649
2007-01-30 01:13:37 +00:00
760c68b8af
Factor GetInstSize() out of constpool island pass.
...
llvm-svn: 33644
2007-01-29 23:45:17 +00:00
3f9f250928
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
e3b09fbbb0
We'd still like to register allocate r2 on darwin before the callee-save
...
regs.
llvm-svn: 33635
2007-01-29 22:57:48 +00:00
52726f5837
rename flag
...
llvm-svn: 33634
2007-01-29 22:40:03 +00:00
8953edc8a5
Comment.
...
llvm-svn: 33633
2007-01-29 22:23:02 +00:00
43e8518d8b
Remember if LR register has been spilled in this function.
...
llvm-svn: 33632
2007-01-29 22:22:24 +00:00
b8d8b82950
Save all registers by default, as they can be used to pass parameters
...
for "inreg" calls
llvm-svn: 33631
2007-01-29 21:28:01 +00:00
17f250005a
Update some of the llvm in the readme
...
llvm-svn: 33630
2007-01-29 21:21:22 +00:00
d1154860a4
Flag to control exception handling.
...
llvm-svn: 33628
2007-01-29 20:48:32 +00:00
b4a2f05d1c
Landing pad-less eh for PPC.
...
llvm-svn: 33622
2007-01-29 18:51:14 +00:00
1e960cd4fd
Implement use of new IntrinsicLowering interface.
...
llvm-svn: 33619
2007-01-29 17:51:02 +00:00
0c49722b36
Fix compile error "jump to case label crosses initialization".
...
What compiler are people using that accepts this code?
llvm-svn: 33603
2007-01-28 15:39:16 +00:00
037c867b54
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
fa663eec17
Make d'tor out-of-line.
...
llvm-svn: 33585
2007-01-27 11:40:32 +00:00
c1f1035518
Return an X86ELFWriterInfo object.
...
llvm-svn: 33574
2007-01-27 02:56:16 +00:00
2bab162501
X86 implementation of the TargetELFWriterInfo class.
...
llvm-svn: 33571
2007-01-27 02:54:30 +00:00
0cd49bc8a2
New entry.
...
llvm-svn: 33569
2007-01-27 02:33:22 +00:00
0701c5a074
Thumb jumptable support.
...
llvm-svn: 33568
2007-01-27 02:29:45 +00:00
f40b9006a8
Thumb add / sub with carry.
...
llvm-svn: 33562
2007-01-27 00:07:15 +00:00
7d47719af0
Some asm directives fixes for ELF.
...
Now we can compile llvm-gcc on arm-linux-gnueabi!
llvm-svn: 33558
2007-01-26 23:24:43 +00:00
debcb5530c
Fix a spelling error
...
llvm-svn: 33556
2007-01-26 22:40:50 +00:00
f209495e93
Handle multiple functions, properly mangle symbols, and fix support for
...
scattered relocations.
llvm-svn: 33555
2007-01-26 22:39:48 +00:00
add7f164a1
Represent tADDspi and tSUBspi as two-address instructions.
...
llvm-svn: 33551
2007-01-26 21:33:19 +00:00
c56315c2b5
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
d45cd5eb81
Fix Data16bitsDirective for ELF.
...
llvm-svn: 33549
2007-01-26 21:20:45 +00:00
3c9dc6bd46
Conditional branch being fixed up is not the last MI in the BB, there is a
...
unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b L2
=>
bne L2
b L1
llvm-svn: 33548
2007-01-26 20:38:26 +00:00
aa26c1ab9d
If the constant pool value is a extern weak symbol, emit the weak reference.
...
llvm-svn: 33543
2007-01-26 19:51:32 +00:00
d02d75c295
extload -> zextload
...
llvm-svn: 33542
2007-01-26 19:13:16 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
3ac38e99b9
For PR761:
...
The Module::setEndianness and Module::setPointerSize methods have been
removed. Instead you can get/set the DataLayout. Adjust thise accordingly.
llvm-svn: 33530
2007-01-26 08:11:39 +00:00
c4fbcb370b
For PR645:
...
Remove the Function::renameLocalSymbols function as it is no longer
needed.
llvm-svn: 33522
2007-01-26 08:01:30 +00:00
1e270b639d
SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This
...
is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
llvm-svn: 33517
2007-01-26 02:02:39 +00:00
db7f0591f3
Need to scan the function for branches even if there aren't any constants.
...
llvm-svn: 33515
2007-01-26 01:04:44 +00:00
1d138989f4
Forgot to update this.
...
llvm-svn: 33512
2007-01-25 23:31:04 +00:00
010ae386b8
Add comment, fix typo, reduce memory usage, etc.
...
llvm-svn: 33510
2007-01-25 23:18:59 +00:00
fa824b9f73
I am an idiot.
...
llvm-svn: 33509
2007-01-25 23:18:16 +00:00
313c2937f0
Fix comment.
...
llvm-svn: 33508
2007-01-25 22:48:25 +00:00
5acf2fbb43
- Tell PEI that PPC will handle stack frame rounding itself.
...
- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
llvm-svn: 33505
2007-01-25 22:25:04 +00:00
4f7d37fe04
Fix elf object definition.
...
llvm-svn: 33502
2007-01-25 20:11:04 +00:00
417260dc11
Doh. Skip JT branches.
...
llvm-svn: 33501
2007-01-25 19:43:52 +00:00
22c7cf504e
Added (preliminary) branch shortening capability to constantpool island pass.
...
llvm-svn: 33497
2007-01-25 03:12:46 +00:00
c1a1bd18e3
Getting rid uses of evil std::set<>
...
llvm-svn: 33496
2007-01-25 03:07:27 +00:00
e4bf50c451
Fix test/CFrontend/2007-01-24-InlineAsmCModifier.c on X86. The %c modifier
...
says that no $ prefix should be emitted on X86.
llvm-svn: 33495
2007-01-25 02:53:24 +00:00
48518548bd
Fix test/CFrontend/2007-01-24-InlineAsmCModifier.c on PPC
...
llvm-svn: 33494
2007-01-25 02:52:50 +00:00
c4bdea012b
FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available
...
llvm-svn: 33492
2007-01-24 21:09:16 +00:00
7ad04830b1
Call frames for intel.
...
llvm-svn: 33490
2007-01-24 19:15:24 +00:00
5f24d10381
80 columns
...
llvm-svn: 33489
2007-01-24 18:50:57 +00:00
f6c63fec92
Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves
...
by value so that clean up is less confusing (these vectors tend to be small.)
llvm-svn: 33488
2007-01-24 18:45:13 +00:00
8a75518f0b
Fix unordered fp on alpha
...
llvm-svn: 33487
2007-01-24 18:43:14 +00:00
197aa9634e
Fix a misencoding of CBW and CWD. This fixes PR1030.
...
llvm-svn: 33486
2007-01-24 18:31:00 +00:00
1526ba50d9
Use PC relative ldr to load from a constantpool in Thumb mode.
...
llvm-svn: 33484
2007-01-24 08:53:17 +00:00
06a03210af
Make ivars private and use getters. Have the MachOWriter return "Mach-O
...
Writer" for the pass name.
llvm-svn: 33483
2007-01-24 07:13:56 +00:00
f5c96fabf9
Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift().
...
llvm-svn: 33482
2007-01-24 07:03:39 +00:00
40cb811cf8
Add a field for and construction of the PPCMachOWriterInfo object.
...
llvm-svn: 33480
2007-01-24 03:41:36 +00:00
56f1058309
Move the getJTRelocation method out of here.
...
llvm-svn: 33479
2007-01-24 03:40:33 +00:00
a1b7b8a485
New "TargetMachOWriterInfo" class. It holds target-specific information
...
that the MachOWriter needs in order to do its writing stuff 'n things.
llvm-svn: 33475
2007-01-24 03:36:05 +00:00
8942551dee
Allow [ fi#c, imm ] as ARM load / store addresses.
...
llvm-svn: 33474
2007-01-24 02:45:25 +00:00
139edae4a2
Various Thumb mode load / store isel bug fixes.
...
llvm-svn: 33472
2007-01-24 02:21:22 +00:00
c0b7366cf9
- Reorg Thumb load / store instructions. Combine each rr and ri pair of
...
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
address is not an add, materialize a 0 immediate into a register and use
it as the offset field.
llvm-svn: 33470
2007-01-23 22:59:13 +00:00
2cfbcce102
Darwin HiddenDirective is .private_extern.
...
llvm-svn: 33465
2007-01-23 19:06:03 +00:00
6730e12ae4
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
...
llvm-svn: 33460
2007-01-23 09:38:11 +00:00
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
...
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
107015e2fa
ARM AAPCS abi (Linux, etc.) requires 8-byte double / long alignment; Mac
...
requires 4-bytes alignment.
llvm-svn: 33448
2007-01-22 23:13:01 +00:00
9f3a7eb9b2
Double and long preferred alignment set to 8 bytes.
...
llvm-svn: 33447
2007-01-22 23:11:06 +00:00
ca5fb6e4fc
Double and long preferred alignment is 8 byte.
...
llvm-svn: 33446
2007-01-22 23:09:50 +00:00
1efe904cd7
- getTypeAlignmentShift() should be returning preferred alignment, not ABI
...
alignment.
- getPreferredAlignmentLog(): remove Double special case.
llvm-svn: 33445
2007-01-22 23:08:19 +00:00
1281dc32ef
Linux GOT indirect reference is only necessary in PIC mode.
...
llvm-svn: 33441
2007-01-22 21:34:25 +00:00
4abf2e7bcc
Double and Long preferred alignment is 4 for Darwin, 8 for Linux.
...
llvm-svn: 33440
2007-01-22 21:24:13 +00:00
52189b5805
Use bl to call Thumb fuctions directly.
...
llvm-svn: 33433
2007-01-22 19:40:10 +00:00
71e123229c
add a note
...
llvm-svn: 33423
2007-01-21 07:03:37 +00:00
2239163496
Implement a getTypeSizeInBits method. This helps in transforms that want
...
to ensure the bit size of a type is identical before proceeding.
llvm-svn: 33413
2007-01-20 23:32:04 +00:00
e52a235e99
TargetData assumes (and some regression tests depend on it) that the size of
...
an unspecified datatype in the datalayout is capped by the size of a pointer.
llvm-svn: 33411
2007-01-20 23:07:13 +00:00
6e38094235
trivial cleanup
...
llvm-svn: 33410
2007-01-20 22:39:15 +00:00
50ee0e40e5
Teach TargetData to handle 'preferred' alignment for each target, and use
...
these alignment amounts to align scalars when we can. Patch by Scott Michel!
llvm-svn: 33409
2007-01-20 22:35:55 +00:00
e3d8e42e27
Round up stack to multiple of alignment only if it's a leaf function without alloca.
...
llvm-svn: 33401
2007-01-20 10:22:33 +00:00
706b6797a0
One more try...
...
llvm-svn: 33400
2007-01-20 10:17:53 +00:00
b268184363
Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca).
...
llvm-svn: 33399
2007-01-20 10:11:56 +00:00
a9af4be5ac
Prologue and epilogue bugs for non-Darwin targets.
...
llvm-svn: 33390
2007-01-20 03:24:07 +00:00
aa24f08926
Clean up ARM PEI code.
...
llvm-svn: 33389
2007-01-20 02:09:25 +00:00
86468ccaf3
Backend is reponsible for aligning the stack.
...
llvm-svn: 33388
2007-01-20 02:08:16 +00:00
a94d394ad2
For PR1043:
...
This is the final patch for this PR. It implements some minor cleanup
in the use of IntegerType, to wit:
1. Type::getIntegerTypeMask -> IntegerType::getBitMask
2. Type::Int*Ty changed to IntegerType* from Type*
3. ConstantInt::getType() returns IntegerType* now, not Type*
This also fixes PR1120.
Patch by Sheng Zhou.
llvm-svn: 33370
2007-01-19 21:13:56 +00:00
77c15ded10
Code clean up. Use def : pat instead of defining new instructions.
...
llvm-svn: 33368
2007-01-19 20:27:35 +00:00
bf216c364f
isDarwin -> isTargetDarwin
...
llvm-svn: 33366
2007-01-19 19:28:01 +00:00
1199c2d653
Restructure code a bit to make use of continue (simplifying things). Generalize
...
the .zerofill directive emission to not be darwin-specific.
llvm-svn: 33365
2007-01-19 19:25:36 +00:00
023c7d667d
Darwin doesn't support .bss, but it does have .zerofill
...
llvm-svn: 33364
2007-01-19 19:23:47 +00:00
181fe36d6c
Introduce TargetType's ELF and Darwin.
...
llvm-svn: 33363
2007-01-19 19:22:40 +00:00
df62250cee
Modify emission of jump tables on darwin to emit an extra "l" label that
...
delimits the boundaries of jump tables. This lets the linker's dead code
stripping optimization do a better job.
llvm-svn: 33362
2007-01-19 18:59:56 +00:00
75aaf1fa6a
Fix section definition.
...
llvm-svn: 33359
2007-01-19 17:33:22 +00:00
10043e215b
ARM backend contribution from Apple.
...
llvm-svn: 33353
2007-01-19 07:51:42 +00:00
28c5b8618a
Needed to build on PPC Linux.
...
llvm-svn: 33352
2007-01-19 04:36:02 +00:00
97057f37a5
- Target PIC style is no longer affected by relocation model.
...
- In x86-64 mode, symbols with external linkage (not just symbols which are
defined externally) requires GOT indirect reference.
- Stylistic code clean up.
llvm-svn: 33345
2007-01-18 22:27:12 +00:00
889d934d00
move contents of PR587 to here.
...
llvm-svn: 33333
2007-01-18 07:34:57 +00:00
a341fab0af
The zerofill directive needs a newline after it.
...
llvm-svn: 33327
2007-01-18 02:30:19 +00:00
4b8d03e084
Minor code clean up.
...
llvm-svn: 33323
2007-01-18 01:49:58 +00:00
e750f61ac5
Have the OutputBuffer take the is64Bit and isLittleEndian booleans.
...
llvm-svn: 33316
2007-01-18 01:23:11 +00:00
c1ea85b4c4
Modify emission of jump tables on darwin to emit an extra "l" label that
...
delimits the boundaries of jump tables. This lets the linker's dead code
stripping optimization do a better job.
llvm-svn: 33315
2007-01-18 01:15:58 +00:00
0ee2d46cfe
add new JumpTableSpecialLabelPrefix hook to asmprinter for jumptable emission.
...
llvm-svn: 33314
2007-01-18 01:12:56 +00:00
cd9c1f035a
Changed to use the OutputBuffer instead of the methods in MachO and ELF
...
writers.
llvm-svn: 33311
2007-01-17 22:22:31 +00:00
f64cc9edd1
restructure code a bit to make use of continue (simplifying things). Generalize
...
the .zerofill directive emission to not be darwin-specific
llvm-svn: 33304
2007-01-17 17:44:25 +00:00
88b45f9a2c
darwin doesn't support .bss, but it does have .zerofill
...
llvm-svn: 33303
2007-01-17 17:43:33 +00:00
1ceb643f31
add new directive
...
llvm-svn: 33302
2007-01-17 17:42:42 +00:00
3f6d52834b
* Fix one more bug in PIC codegen: extra load is needed for *all*
...
non-statics.
* Introduce new option to output zero-initialized data to .bss section.
This can reduce size of binaries. Enable it by default for ELF &
Cygwin/Mingw targets. Probably, Darwin should be also added.
llvm-svn: 33299
2007-01-17 10:33:08 +00:00
38ee6519b7
Revert patch.
...
llvm-svn: 33298
2007-01-17 09:06:13 +00:00
05e5a5ee6c
Create the specified TargetObjInfo and use it.
...
llvm-svn: 33291
2007-01-17 03:51:37 +00:00
a967e9c9a9
Create/store/and delete the TargetObjInfo object.
...
llvm-svn: 33290
2007-01-17 03:50:41 +00:00
f758157385
New "TargetObjInfo" class. This holds information that the object writers will
...
use to write things to the file. It's abstract so each target should implement
its own version for each writer type.
llvm-svn: 33286
2007-01-17 03:46:30 +00:00
31fcc2cde9
Missed "<" :)
...
llvm-svn: 33265
2007-01-16 20:22:18 +00:00
922965aa29
Cleanup. Comments added.
...
llvm-svn: 33260
2007-01-16 18:23:09 +00:00
4202f37352
Fix SMG2000 with the CBE: opaque types need names too.
...
llvm-svn: 33258
2007-01-16 18:02:45 +00:00
6cc58a0dc5
document some subtlety
...
llvm-svn: 33257
2007-01-16 17:51:40 +00:00
4f01b783a3
Emit symbol type information for ELF/COFF targets
...
llvm-svn: 33256
2007-01-16 16:41:57 +00:00
c7b2ab9bdf
Instead of yet another enum indicating the "assembly language flavor",
...
just use the one that's in the subtarget.
llvm-svn: 33255
2007-01-16 09:29:17 +00:00
5488ade154
Fix PR918 by only using typedefs to name struct types. This makes the later
...
type ordering stuff work better. This fixes PR918 and
CodeGen/CBackend/2007-01-15-NamedArrayType.ll
Patch by Gordon Henriksen.
llvm-svn: 33254
2007-01-16 07:22:23 +00:00
89e5813312
add a note: we need whole-function selectiondags :)
...
llvm-svn: 33252
2007-01-16 06:39:48 +00:00
0b3a451e1b
Make inline ASM the INTEL one if it's in that emission mode.
...
llvm-svn: 33247
2007-01-16 04:13:03 +00:00
e21237e59a
Fix for PR1095:
...
LLVM would miscompile ASM dialects when compiling for PPC. Added dialects for
the X86 and PPC backends. It defaults to "0", the first variant of a compound
inline asm expression.
llvm-svn: 33246
2007-01-16 03:42:04 +00:00
e76908ba81
add some notes
...
llvm-svn: 33228
2007-01-15 06:25:39 +00:00
03c4953cdd
rename Type::isIntegral to Type::isInteger, eliminating the old Type::isInteger.
...
rename Type::getIntegralTypeMask to Type::getIntegerTypeMask.
This makes naming much more consistent. For example, there are now no longer any
instances of IntegerType that are not considered isInteger! :)
llvm-svn: 33225
2007-01-15 02:27:26 +00:00
f448a8c8ac
Make use of isInteger vs isIntegral more explicit
...
llvm-svn: 33216
2007-01-15 01:48:11 +00:00
cce06fd277
No hidden visiblity on Mingw32/Cygwin
...
llvm-svn: 33202
2007-01-14 11:49:39 +00:00
3c84b551db
add support for hidden visibility to darwin/ppc and linux/ppc targets
...
llvm-svn: 33200
2007-01-14 06:37:54 +00:00
8c51bf5bf6
add support for hidden visibility to darwin/x86
...
llvm-svn: 33198
2007-01-14 06:29:53 +00:00
9f6badbc41
add a new HiddenDirective member for handling visibility.
...
llvm-svn: 33197
2007-01-14 06:27:21 +00:00
ae5db00419
add a missing else. This caused globals to be printed as:
...
movq ___dso_handle@GOTPCREL(%rip)(%rip), %rsi
instead of:
movq ___dso_handle@GOTPCREL(%rip), %rsi
llvm-svn: 33196
2007-01-14 06:08:14 +00:00
6bbb29ba40
darwin doesn't use .hidden. Disable this until we fix it right.
...
llvm-svn: 33191
2007-01-14 00:50:56 +00:00
5544e17a08
Fix PR1103 and Regression/CodeGen/X86/2007-01-13-StackPtrIndex.ll
...
llvm-svn: 33189
2007-01-14 00:13:07 +00:00
de86991b14
remove dead code, frameindices must be resolve before the asmprinter runs.
...
llvm-svn: 33187
2007-01-13 23:59:03 +00:00
73497b26cd
Remove this file. It was inadvertently added because I could not find
...
TargetLowering.cpp in CodeGen/SelectionDAG (location makes no sense to me)
llvm-svn: 33160
2007-01-12 23:32:11 +00:00
5699b8e3d0
remove over-general code.
...
llvm-svn: 33157
2007-01-12 23:28:32 +00:00
015b432b54
Adjust #includes to compensate for lost of DerivedTypes.h in
...
TargetLowering.h
llvm-svn: 33154
2007-01-12 23:22:14 +00:00
44e3d4ec40
Add a new home for TargetLowering member functions.
...
llvm-svn: 33152
2007-01-12 23:18:18 +00:00
afdee2062c
remove obsolete fixme
...
llvm-svn: 33151
2007-01-12 22:52:50 +00:00
901d9e65f6
Don't add or sub zero to sp.
...
llvm-svn: 33142
2007-01-12 20:52:27 +00:00
c4235e5521
Build constants using instructions mov/orr or mvn/eor.
...
llvm-svn: 33141
2007-01-12 20:35:49 +00:00
a0554d90e8
* PIC codegen for X86/Linux has been implemented
...
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)
llvm-svn: 33136
2007-01-12 19:20:47 +00:00
a557a0028d
Comment.
...
llvm-svn: 33114
2007-01-12 07:25:16 +00:00
7a9c62baa6
For PR1064:
...
Implement the arbitrary bit-width integer feature. The feature allows
integers of any bitwidth (up to 64) to be defined instead of just 1, 8,
16, 32, and 64 bit integers.
This change does several things:
1. Introduces a new Derived Type, IntegerType, to represent the number of
bits in an integer. The Type classes SubclassData field is used to
store the number of bits. This allows 2^23 bits in an integer type.
2. Removes the five integer Type::TypeID values for the 1, 8, 16, 32 and
64-bit integers. These are replaced with just IntegerType which is not
a primitive any more.
3. Adjust the rest of LLVM to account for this change.
Note that while this incremental change lays the foundation for arbitrary
bit-width integers, LLVM has not yet been converted to actually deal with
them in any significant way. Most optimization passes, for example, will
still only deal with the byte-width integer types. Future increments
will rectify this situation.
llvm-svn: 33113
2007-01-12 07:05:14 +00:00
cddc9dfe97
Implement review feedback for the ConstantBool->ConstantInt merge. Chris
...
recommended that getBoolValue be replaced with getZExtValue and that
get(bool) be replaced by get(const Type*, uint64_t). This implements
those changes.
llvm-svn: 33110
2007-01-12 04:24:46 +00:00
542964f55b
Rename BoolTy as Int1Ty. Patch by Sheng Zhou.
...
llvm-svn: 33076
2007-01-11 18:21:29 +00:00
75b871fb1e
For PR1043:
...
Merge ConstantIntegral and ConstantBool into ConstantInt.
Remove ConstantIntegral and ConstantBool from LLVM.
llvm-svn: 33073
2007-01-11 12:24:14 +00:00
69fb861b19
Change the file header name as this file was renamed.
...
llvm-svn: 33051
2007-01-10 04:17:32 +00:00
2972099ff1
Rename Writer.cpp as CBackend.cpp so it doesn't conflict with Writer.cpp
...
in the bytecode writer library. This helps with debugging.
llvm-svn: 33050
2007-01-10 04:16:17 +00:00
1fc9be30ef
For PR1099:
...
Invert the "isSigned" logic in calls to printType and printPrimitiveType.
We want variables to be declared unsigned by default so that signless
operators like + and - perform the unsigned operation that LLVM expects
by default. Parameters with the sext attribute will be declared signed and
signed instructions will case operand values to signed regardless of the
type of the variable. This passes all tests and fixes PR1099.
llvm-svn: 33039
2007-01-09 17:09:09 +00:00
bf38bf7143
For PR1099:
...
Partial fix for this PR. Default function parameters to signed integer, just
like everything else in CBE. The bug was caused by incorrectly introducing
parameter attributes feature by choosing "signed" parameter if the
SExtAttribute was specified. Howeer, if no attribute is specified, this
causes it to become unsigned which is incorrect. Reversing the logic so
that signedness is detected by "not ZExtAttribute" set fixes the issue.
This fixes 197.parser but there is more to do. Any comparison and possibly
other operators involving arguments may need to correctly cast the parameter
before its use, depending on the sign of the operator.
llvm-svn: 33034
2007-01-09 06:38:06 +00:00
c0b86d5dc4
For PR1090:
...
Clean up the definitions of the helper functions per Chris' review
suggestions so they are easier to read.
For PR1091:
Print minimum signed integer values as unsigned so that we get no warnings
from the C compiler about constant ranges and value comparisons.
llvm-svn: 33010
2007-01-08 08:00:00 +00:00
13cae7c2a7
Fix PR1090:
...
Implemented some llvm_fcmp_{pred} functions at the start of the function bodies
and use them for fcmp instructions and constant expressions. These help
implement the ordered and unordered comparisons necessary for correct exectuion
of these comparisons.
llvm-svn: 33007
2007-01-08 06:58:32 +00:00
f7eef61f20
relax type
...
llvm-svn: 32983
2007-01-07 07:24:32 +00:00
df7c61da7e
For PR1086:
...
Parameter attributes do have to be specially handled in the CBE. Implement
their handling.
llvm-svn: 32976
2007-01-07 03:24:48 +00:00
a9ab10942d
As PR1085 was fixed, back out workaround
...
llvm-svn: 32969
2007-01-07 00:41:20 +00:00
72a56fc44c
Disable the macho writer until it is 100% functional. Enabling it when
...
broken invites bug reports.
llvm-svn: 32961
2007-01-06 22:27:58 +00:00
bb162f48ba
gcc often inserts it's own names for sections (e.g.
...
gnu.linkonce.t.FunctionName). Convert them to "normal" LLVM names,
otherwise linker won't be able to merge them.
llvm-svn: 32958
2007-01-06 18:24:26 +00:00
32af9e8cc5
For PR411:
...
Take an incremental step towards type plane elimination. This change
separates types from values in the symbol tables by finally making use
of the TypeSymbolTable class. This yields more natural interfaces for
dealing with types and unclutters the SymbolTable class.
llvm-svn: 32956
2007-01-06 07:24:44 +00:00
af31398295
new note
...
llvm-svn: 32945
2007-01-06 01:30:45 +00:00
8bc7ddb84d
setSetCCIsExpensive is gone.
...
llvm-svn: 32941
2007-01-05 23:42:53 +00:00
82241c86e9
- FCOPYSIGN custom lowering bug. Clear the sign bit of operand 0 first before
...
or'ing in the sign bit of operand 1.
- Tweaking: rather than left shift the sign bit, fp_extend operand 1 first
before taking its sign bit if its type is smaller than that of operand 0.
llvm-svn: 32932
2007-01-05 21:37:56 +00:00
8c7094a770
Typo
...
llvm-svn: 32902
2007-01-05 08:32:24 +00:00
4363e884c0
With SSE2, expand FCOPYSIGN to a series of SSE bitwise operations.
...
llvm-svn: 32900
2007-01-05 07:55:56 +00:00
7284073ec2
Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64).
...
llvm-svn: 32870
2007-01-04 14:01:38 +00:00
f9cf05370f
fix testcase. It's not safe to strictly evaluate a load that should be lazy.
...
llvm-svn: 32842
2007-01-03 19:12:31 +00:00
4889a7af36
Private labels start with .L on linux, not just .
...
llvm-svn: 32841
2007-01-03 18:16:48 +00:00
e87b5e9825
Fix a comment that referred to the now defunct ubyte type.
...
llvm-svn: 32840
2007-01-03 17:24:59 +00:00
fb4070521a
Remove two useless bit casts.
...
llvm-svn: 32839
2007-01-03 17:24:11 +00:00
4efbbc963f
Really big cleanup.
...
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin
llvm-svn: 32833
2007-01-03 11:43:14 +00:00
74b46e8c05
Fix naming inconsistency.
...
llvm-svn: 32823
2007-01-02 21:33:40 +00:00
fd68718467
implement missing compares
...
patch by Lauro
bug fixed by me
llvm-svn: 32795
2006-12-31 18:52:39 +00:00
e63b6518fa
For PR950:
...
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
type of an function parameter was used to determine whether it should
be sign extended or zero extended before the call. This information is
now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
the parameter attribute information. Although it would have been
convenient to pass in the FunctionType itself, there isn't always one
present in the caller. Consequently, a signedness indication for the
result type and for each parameter was provided for in the interface
to this method. All implementations were changed to make the adjustment
necessary.
llvm-svn: 32788
2006-12-31 05:55:36 +00:00
64493fb30d
fix comment
...
llvm-svn: 32767
2006-12-29 14:28:12 +00:00
8ab8f7df6f
Define StaticCtorsSection and StaticDtorsSection for ARM.
...
llvm-svn: 32763
2006-12-28 13:13:00 +00:00
7251e57ff8
Implement SELECT_CC (f32/f64) for ARM.
...
llvm-svn: 32762
2006-12-28 13:11:14 +00:00
865b979833
remove duplicated line
...
bug noticed by Lauro
llvm-svn: 32761
2006-12-28 12:51:40 +00:00
d0ced3f1e8
This patch defines extloadi1 and fixes an internal compiler error on
...
arm.
llvm-svn: 32760
2006-12-26 19:30:42 +00:00
266e42b312
For PR950:
...
This patch removes the SetCC instructions and replaces them with the ICmp
and FCmp instructions. The SetCondInst instruction has been removed and
been replaced with ICmpInst and FCmpInst.
llvm-svn: 32751
2006-12-23 06:05:41 +00:00
430e68a1b9
Refactored JIT codegen for mingw32. Now we're using standart relocation
...
type for distinguish JIT & non-JIT instead of "dirty" hacks :)
llvm-svn: 32745
2006-12-22 22:29:05 +00:00
959113a5c8
add a note
...
llvm-svn: 32741
2006-12-22 01:03:22 +00:00
5cfa5ef912
Fix for ARM weak symbols, patch by Lauro Ramos Venancio!
...
llvm-svn: 32740
2006-12-21 22:59:58 +00:00
28663c73ef
Changes from Nick Lewycky with a simplified PPCTargetAsmInfo.
...
llvm-svn: 32735
2006-12-21 20:26:09 +00:00
4c90a6df16
Oops.
...
llvm-svn: 32724
2006-12-20 21:35:00 +00:00
c2c861d00e
Original patch was overly complicated.
...
llvm-svn: 32723
2006-12-20 21:33:34 +00:00
41621a72f5
Changes to target powerpc for non-Darwin assemblers.
...
1. Patches from Nick Lewycky.
2. Code to filter register names and print them as numeric values on
non-Darwin systems.
llvm-svn: 32721
2006-12-20 20:56:46 +00:00
b3d704c91d
Fixed 80 cols & style violation
...
llvm-svn: 32720
2006-12-20 20:40:30 +00:00
93acb49182
Fixed dllimported symbols support during JIT'ing. JIT on mingw32
...
platform should be more or less workable. At least, sim is running fine
under lli :)
llvm-svn: 32711
2006-12-20 01:03:20 +00:00
1ef9cd400d
eliminate static ctors for Statistic objects.
...
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
582ac4bed7
Fix for PR1062 by Dan Gohman.
...
llvm-svn: 32688
2006-12-19 21:31:42 +00:00
44ef93449a
Fix for PR1059: http://llvm.org/PR1059
...
llvm-svn: 32685
2006-12-19 21:04:20 +00:00
68f62b58f7
The x86-64 target machine should be used for amd64-* target triples.
...
llvm-svn: 32678
2006-12-19 19:40:09 +00:00
a7f95900f4
Fix PR1061 and CodeGen/X86/2006-12-19-IntelSyntax.ll
...
llvm-svn: 32676
2006-12-19 19:29:58 +00:00
3ab9256d19
macros -> Inline functions
...
Lauros's patch
llvm-svn: 32656
2006-12-18 11:07:09 +00:00
d7998d0e6d
move ExtWeakSymbols to AsmPrinter
...
llvm-svn: 32648
2006-12-18 03:37:18 +00:00
8bd6317823
Use a predicate function to identify bitcast of fp and integer instead of
...
repeating the logic in two different parts of the code.
llvm-svn: 32643
2006-12-17 20:24:50 +00:00
174dc2f35e
Fix PR1058:
...
Generate the BITCAST_TEMPORARY regardless of the uses or inlinability of
the instruction. This temporary is needed to perform the instruction, not
provide storage for its results.
llvm-svn: 32642
2006-12-17 18:50:51 +00:00
360a14be02
Apply B. Scott Michel's patch for PR1054, thanks!
...
llvm-svn: 32630
2006-12-16 20:23:42 +00:00
a0850e98ee
Patterns no longer needed due to fix in the DAG combiner.
...
llvm-svn: 32612
2006-12-15 21:39:31 +00:00
2f4cdc78fa
Some AT&T syntax assembler (e.g. Mac OS X) does not recognize the movq alias for i64 <-> XMM moves.
...
llvm-svn: 32609
2006-12-15 19:58:58 +00:00
73d307d12d
Not all test cases are created equal. This fix is needed.
...
llvm-svn: 32605
2006-12-15 18:51:01 +00:00
38b1d53afe
Not needed. Misinterpreted error message from other bug (Missing load/store
...
relocations.)
llvm-svn: 32604
2006-12-15 18:45:32 +00:00
b0367c987e
Missing load/store relocations.
...
llvm-svn: 32601
2006-12-15 16:44:10 +00:00
36d826dca2
Provide 64-bit support for i64 sextload<i8>.
...
llvm-svn: 32600
2006-12-15 14:34:11 +00:00
f07cc990dd
Provide support for FP_TO_UINT.
...
llvm-svn: 32599
2006-12-15 14:32:57 +00:00
2455e6937b
This is done.
...
llvm-svn: 32591
2006-12-15 05:50:39 +00:00
735fcf74d8
f64 <-> i64 bit_convert using movq in 64-bit mode.
...
llvm-svn: 32587
2006-12-14 21:55:39 +00:00
e50b17e97e
Fix a couple of typo's.
...
llvm-svn: 32585
2006-12-14 19:46:06 +00:00
ac1fa442a7
This is done.
...
llvm-svn: 32584
2006-12-14 19:45:32 +00:00
0fd32e9ade
Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand().
...
llvm-svn: 32583
2006-12-14 19:44:45 +00:00
fccea9b2a9
- Rename MOVDSS2DIrr to MOVSS2DIrr for consistency sake.
...
- Add MOVDI2SSrm and MOVSS2DImr to fold load / store for i32 <-> f32 bit_convert
patterns.
llvm-svn: 32582
2006-12-14 19:43:11 +00:00
3b7544e24c
avoid using a constant table when a constant can be used inline
...
llvm-svn: 32580
2006-12-14 18:58:37 +00:00
09e2921d9a
Avoid creating invalid sub/add instructions on the prolog/epilog
...
patch by Lauro
llvm-svn: 32577
2006-12-14 13:31:27 +00:00
9ffa6a60ed
Add note.
...
llvm-svn: 32561
2006-12-13 20:59:43 +00:00
59e7a777da
Honor cpu directive, take two.
...
llvm-svn: 32492
2006-12-12 20:57:08 +00:00
8171e58bd9
Rollback changes to take a different tack.
...
llvm-svn: 32488
2006-12-12 19:26:50 +00:00
67d1c8ae0e
more general matching of the MVN instruction
...
llvm-svn: 32484
2006-12-12 17:10:13 +00:00
7c3cab9ddc
Honor the command line specification for machine type.
...
llvm-svn: 32483
2006-12-12 16:07:33 +00:00
470d61d82c
don't use "ordinary" addressing mode 1 when mvn is appropriate
...
llvm-svn: 32482
2006-12-12 14:03:29 +00:00
095e6f3044
Reduce number of instructions to load 64-bit constants.
...
llvm-svn: 32481
2006-12-12 13:23:43 +00:00
b341b0861d
Change inferred getCast into specific getCast. Passes all tests.
...
llvm-svn: 32469
2006-12-12 05:05:00 +00:00
9fa0a26808
use MVN to handle small negative constants
...
llvm-svn: 32459
2006-12-12 01:03:11 +00:00
1bbe581d0f
add mvn
...
llvm-svn: 32454
2006-12-12 00:37:38 +00:00
2075374e28
Fix the BitCastUnion type for 32-bit targets.
...
llvm-svn: 32453
2006-12-12 00:11:08 +00:00
eb3e8d75df
add note
...
llvm-svn: 32452
2006-12-11 23:56:10 +00:00
f4646a7e54
Another step forward in PPC64 JIT support: we now no-longer need stubs
...
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).
This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.
llvm-svn: 32451
2006-12-11 23:22:45 +00:00
b1f3157638
getInstrItineraryData shouldn't copy the itineraries
...
llvm-svn: 32448
2006-12-11 21:42:55 +00:00
b943555716
Implement correct bitcast of int<->float and long<->double by using a
...
union to perform the bitcast.
llvm-svn: 32444
2006-12-11 20:39:15 +00:00
2b136a73bd
Missing opcode.
...
llvm-svn: 32439
2006-12-11 18:45:56 +00:00
e95909a4ef
Layout proper frame for ppc64.
...
llvm-svn: 32436
2006-12-11 18:10:54 +00:00
e8da58b3f9
Properly mangles symbol table names
...
Supports constant pools
Supports relocations to jump tables
Supports relocations within the data segment (global = address of global)
Allocates memory in a non-hacky for all non-code objects.
llvm-svn: 32430
2006-12-11 02:20:45 +00:00
a11aa92e6b
Update note, with the SROA change, we now produce:
...
_pairtest:
movl 8(%esp), %eax
movl 4(%esp), %ecx
movd %eax, %xmm0
movd %ecx, %xmm1
addss %xmm0, %xmm1
movl 12(%esp), %eax
movss %xmm1, (%eax)
ret
instead of:
_pairtest:
subl $12, %esp
movl 20(%esp), %eax
movl %eax, 4(%esp)
movl 16(%esp), %eax
movl %eax, (%esp)
movss (%esp), %xmm0
addss 4(%esp), %xmm0
movl 24(%esp), %eax
movss %xmm0, (%eax)
addl $12, %esp
ret
llvm-svn: 32427
2006-12-11 01:20:25 +00:00
6727f2a5f9
this is done
...
llvm-svn: 32424
2006-12-11 01:01:03 +00:00
feeb9c7be5
Evan implemented the machineinstr improvements.
...
The rot example works if the type is cast to ubyte.
Move sroa examples together and upgrade them to HEAD syntax.
llvm-svn: 32423
2006-12-11 00:44:03 +00:00
3b7c257cae
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
...
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
llvm-svn: 32415
2006-12-10 23:12:42 +00:00
6af2220815
Reverting until finding the cause of secondary bugs.
...
llvm-svn: 32413
2006-12-10 13:09:42 +00:00
04c832d4ab
__PPC64CompilationCallback code was allowing registers to be clobbered by stub.
...
llvm-svn: 32412
2006-12-10 12:13:31 +00:00
b8ada08b26
.align is in bits
...
.comm is in bytes
:-(
llvm-svn: 32408
2006-12-10 02:53:14 +00:00
b313efb0cd
fix test/Regression/CodeGen/X86/weak.ll
...
if a variable has no initialization, I->getInitializer() will fail
llvm-svn: 32407
2006-12-09 23:14:08 +00:00
e107a8b872
Added option -soft-float to generate SW fp library calls instead of fp instructions.
...
llvm-svn: 32393
2006-12-09 02:41:30 +00:00
d12d2250a7
%progbits not @progbits
...
llvm-svn: 32376
2006-12-08 22:06:02 +00:00
94f29f129d
add \"aw\",@progbits" to ctors and dtors
...
llvm-svn: 32373
2006-12-08 21:24:58 +00:00
78cb08d082
Move findTiedToSrcOperand to TargetInstrDescriptor.
...
llvm-svn: 32366
2006-12-08 18:45:48 +00:00
87f4382163
fix truncstorei1
...
llvm-svn: 32364
2006-12-08 18:41:21 +00:00
dcb3c978c4
Packed Structures
...
llvm-svn: 32361
2006-12-08 18:06:16 +00:00
b5f1c22e94
Use MI's TargetInstrDescriptor.
...
llvm-svn: 32352
2006-12-08 07:57:56 +00:00
5040f58ae4
Fix a bug introduced by the streams patch. DEBUG code was made unconditional.
...
llvm-svn: 32351
2006-12-08 05:41:26 +00:00
09fecf9a47
this is an initial patch to switch the ppc64 jit over to working in PIC mode,
...
which allows the code to be above the 2G marker. We still need to JIT emit
dyld stubs to support external, weak, common, etc globals, but that will
happen tomorrow.
llvm-svn: 32348
2006-12-08 04:54:03 +00:00
4d475f6e6e
add a note
...
llvm-svn: 32347
2006-12-08 02:01:32 +00:00
085cfdbfdc
Simplify a bit
...
llvm-svn: 32343
2006-12-07 23:55:55 +00:00
13535c2d93
fix incorrect encoding of rldicr, used by ppc64 function stubs, etc.
...
llvm-svn: 32341
2006-12-07 23:44:07 +00:00
30c0f3367c
Don't use <sstream> in Streams.h but <iosfwd> instead.
...
llvm-svn: 32340
2006-12-07 23:41:45 +00:00
265fa68bd8
fix alignment
...
llvm-svn: 32337
2006-12-07 22:38:06 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
...
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
a9a817dc7d
fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64
...
llvm-svn: 32331
2006-12-07 22:15:58 +00:00
219a796475
make sure that we don't use a common symbol if a section was specified
...
llvm-svn: 32310
2006-12-07 18:33:58 +00:00
76a61eb054
Be sure to grab weak functions too, and make implicit defs comments
...
llvm-svn: 32308
2006-12-07 17:39:14 +00:00
d8e7451dc3
Fix i64 uint_to_fp on ppc64
...
llvm-svn: 32297
2006-12-07 01:24:16 +00:00
e312c152d2
MI keeps a ptr of TargetInstrDescriptor, use it.
...
llvm-svn: 32296
2006-12-07 01:21:59 +00:00
43c0eb839c
implement sextinreg i8->i64 and i16->i64
...
llvm-svn: 32293
2006-12-06 21:46:13 +00:00
9472eb83c3
fix another sradi encoding bug. This fixes Olden/health with the ppc64 jit.
...
llvm-svn: 32291
2006-12-06 21:35:10 +00:00
b8cf1ff83c
Always pass "true" to isMaxValue(bool) because we know the type is LongTy.
...
llvm-svn: 32290
2006-12-06 21:27:07 +00:00
de09dea742
Adjust to new ConstantIntegral interface for Max/Min tests.
...
llvm-svn: 32289
2006-12-06 20:45:15 +00:00
aeadac88ea
fix the jit encoding of sradi, simplify the MDForm1 description.
...
llvm-svn: 32285
2006-12-06 20:02:54 +00:00
1fa392dbfa
add relocation support for ppc64 branches.
...
llvm-svn: 32284
2006-12-06 19:40:04 +00:00
7c779fcad4
add #include
...
llvm-svn: 32281
2006-12-06 18:19:53 +00:00
f06bb658a8
add missing #include
...
llvm-svn: 32280
2006-12-06 18:14:47 +00:00
700b873130
Detemplatize the Statistic class. The only type it is instantiated with
...
is 'unsigned'.
llvm-svn: 32279
2006-12-06 17:46:33 +00:00
527c12f8e6
Make it easier for gdb to find the return address.
...
llvm-svn: 32277
2006-12-06 17:42:06 +00:00
776abee608
print weak references
...
llvm-svn: 32276
2006-12-06 13:35:10 +00:00
81cf22d873
These asm printers shouldn't use assembly/writer.h
...
llvm-svn: 32262
2006-12-06 06:13:25 +00:00
47e181cc4d
Revert an unintended change.
...
llvm-svn: 32239
2006-12-05 22:03:40 +00:00
dd60ca029c
- Switch X86-64 JIT to large code size model.
...
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.
llvm-svn: 32238
2006-12-05 19:50:18 +00:00
c20b7e878a
If we have ScalarSSE, we can select bitconvert into single instructions.
...
This compiles bitcast.ll:test3/test4 into:
_test3:
movd %xmm0, %eax
ret
_test4:
movd %edi, %xmm0
ret
llvm-svn: 32230
2006-12-05 18:45:06 +00:00
57a41985e3
Add a perf optzn corresponding to PR1033.
...
llvm-svn: 32229
2006-12-05 18:25:10 +00:00
55c17f9177
Fix PR1033 and CodeGen/X86/bitcast.ll, by expanding bitcast to a load/store pair.
...
This could be better, readme entry pending.
llvm-svn: 32228
2006-12-05 18:22:22 +00:00
b5dee63958
expand memmove and memcpy
...
llvm-svn: 32226
2006-12-05 17:57:23 +00:00
96fd6447c7
add support for the "r" asm constraint
...
patch by Lauro Ramos Venancio
llvm-svn: 32224
2006-12-05 17:37:31 +00:00
a16201c672
Fix typo noticed by Lauro Ramos Venancio, thanks!
...
llvm-svn: 32223
2006-12-05 17:29:40 +00:00
2369a024d7
add support for weak linkage
...
llvm-svn: 32222
2006-12-05 17:00:17 +00:00
3b235aa5dc
JIT large code model support.
...
llvm-svn: 32220
2006-12-05 07:29:55 +00:00
8e0e9fbe7b
Asm printing bug.
...
llvm-svn: 32218
2006-12-05 06:43:58 +00:00
62cdc3f011
- Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit
...
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.
llvm-svn: 32215
2006-12-05 04:01:03 +00:00
830f224bf5
Update
...
llvm-svn: 32214
2006-12-05 03:58:23 +00:00
d139ddd2e6
Add support for 64-bit 'r' constraint. Patch by by Rafael ~Avila de EspÃndol!
...
This fixes PR1029 and Regression/CodeGen/X86/x86-64-asm.ll
llvm-svn: 32206
2006-12-04 22:38:21 +00:00
e4f4d048dd
Restoration of the stack pointer after a deallocation of a alloca was not
...
updating the SP link.
llvm-svn: 32202
2006-12-04 22:04:42 +00:00
0c2a74a487
Non-darwin gcc should default to static relocation to match gcc.
...
llvm-svn: 32184
2006-12-04 18:07:10 +00:00
67fc141db5
Match TargetInstrInfo changes.
...
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
07fc107e90
convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's.
...
llvm-svn: 32097
2006-12-01 21:52:41 +00:00
022030a425
Add weak reference directive.
...
llvm-svn: 32091
2006-12-01 20:47:11 +00:00
b689d32b20
Copy and paste error. An initialized global cannot be a weak reference.
...
llvm-svn: 32075
2006-12-01 17:39:22 +00:00
1b0bc794e6
1. In ppc64 mode we need only use one GPR.
...
2. Float values need to be promoted to double when they are vararg.
llvm-svn: 32074
2006-12-01 16:30:47 +00:00
311622f912
ExternalWeak case in wrong location.
...
llvm-svn: 32073
2006-12-01 14:37:39 +00:00
845bd6e096
Fix 2005-05-08-FPStackifierPHI.ll failure.
...
llvm-svn: 32071
2006-12-01 10:11:51 +00:00
5fb2c76d59
A initialized global variable cannot be extern weak. However, if a global value's initializer is itself a external weak symbol, emit the weak reference.
...
llvm-svn: 32069
2006-12-01 09:13:26 +00:00
fa54c0b6fb
Darwin PPC external weak linkage support.
...
llvm-svn: 32068
2006-12-01 07:56:37 +00:00
5b020349f2
Minor code clean up.
...
llvm-svn: 32067
2006-12-01 07:38:23 +00:00
db66456285
Fix indentation.
...
llvm-svn: 32066
2006-12-01 07:17:00 +00:00
6476a3b4ba
Darwin X86 external weak linkage support.
...
llvm-svn: 32065
2006-12-01 07:15:24 +00:00
09ed0ff2ac
Fix the CodeGen/PowerPC/vec_constants.ll regression.
...
llvm-svn: 32057
2006-12-01 01:45:39 +00:00
12c94949e0
Introducing external weak linkage. Darwin codegen should be added later.
...
llvm-svn: 32052
2006-12-01 00:25:12 +00:00
6dbdfe2baa
Factor out GVRequiresExtraLoad() from .h to .cpp
...
llvm-svn: 32048
2006-11-30 22:42:55 +00:00
ae1cd75af7
- Use a different wrapper node for RIP-relative GV, etc.
...
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.
llvm-svn: 32046
2006-11-30 21:55:46 +00:00
aafeaef8c8
MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor
...
llvm-svn: 32034
2006-11-30 07:12:03 +00:00
fef6400f01
Remove the ugly SPARCV9 TargetInstrDescriptors hack.
...
llvm-svn: 32033
2006-11-30 07:10:43 +00:00
7a9238c84d
In PIC mode, GV not requiring an extra load can be used as address immediate.
...
llvm-svn: 32028
2006-11-29 23:48:14 +00:00
8c84c7cd0d
Clean up.
...
llvm-svn: 32027
2006-11-29 23:46:27 +00:00
0b1692216d
Fix for PR1018 - Better support for X86-64 Linux in small code model.
...
llvm-svn: 32026
2006-11-29 23:19:46 +00:00
2f648fc55d
Fix bug codegen'ing FP constant vectors with integer splats. Make sure the
...
created intrinsics have the right integer types. This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll
llvm-svn: 32024
2006-11-29 19:58:49 +00:00
152671f0bf
Offset for load of 32-bit arg in 64-bit world was incorrect.
...
llvm-svn: 32019
2006-11-29 13:37:09 +00:00
28a9e9b230
Custom lower READCYCLECOUNTER for x86-64.
...
llvm-svn: 32017
2006-11-29 08:28:13 +00:00
0d67dde00a
done
...
llvm-svn: 32013
2006-11-29 07:21:46 +00:00
8facb43593
16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman.
...
llvm-svn: 32004
2006-11-29 02:00:40 +00:00
38084725a2
Upgrade the ugly darwin 64-bit bswap idiom (bswap %eax / bswap %edx /
...
xchgl %eax, %edx) to llvm.bswap.i64. This compiles:
long long test2(long long A) {
return _OSSwapInt64(A);
}
to:
_test2:
movl 8(%esp), %eax
movl 4(%esp), %edx
bswapl %eax
bswapl %edx
ret
instead of:
_test2:
movl 8(%esp), %edx
movl 4(%esp), %eax
bswap %eax
bswap %edx
xchgl %eax, %edx
ret
GCC manages (with -fomit-frame-pointer) the uglier:
_test2:
subl $4, %esp
movl 8(%esp), %eax
movl 12(%esp), %edx
bswap %eax
bswap %edx
xchgl %eax, %edx
addl $4, %esp
ret
llvm-svn: 32001
2006-11-29 01:48:01 +00:00
0fc6ae0c3d
Trivially lower 'bswap $0' into llvm.bswap. This fixes hexxagon with the
...
JIT on darwin/x86, which has htonl implemented as inline asm.
llvm-svn: 31999
2006-11-29 01:14:06 +00:00
904ca9c688
gcc doesn't like an empty colbber list
...
llvm-svn: 31987
2006-11-28 23:07:32 +00:00
f52ae7ec72
Identities are default now
...
llvm-svn: 31980
2006-11-28 22:28:08 +00:00
8b59fd03c2
Make identity default, and fix PR1020
...
llvm-svn: 31979
2006-11-28 22:25:32 +00:00
69b1825488
New entries.
...
llvm-svn: 31976
2006-11-28 19:59:25 +00:00
7f739d5bdd
update comments
...
llvm-svn: 31975
2006-11-28 19:56:02 +00:00
212f15fa8a
Get the asminfo for the target most closely matching the module and use that for inline asm
...
llvm-svn: 31974
2006-11-28 19:53:36 +00:00
2675e23a7e
X86 asm -> gcc asm translation table (incomplete)
...
llvm-svn: 31973
2006-11-28 19:52:49 +00:00
ff35b449a0
Add per-target support for asm translation in the cbe
...
llvm-svn: 31972
2006-11-28 19:52:20 +00:00
40182179b6
Remove debug code.
...
llvm-svn: 31970
2006-11-28 18:27:02 +00:00
ec05b046c7
Prime text sections to improve branch locality in large object files.
...
llvm-svn: 31969
2006-11-28 18:21:52 +00:00
f4e2e009d9
32-bit int space was not accounted for properly in lowerCall.
...
llvm-svn: 31966
2006-11-28 14:53:52 +00:00
8ddbdc70b7
Fix JIT encoding bugs for shift / rotate by one ops.
...
llvm-svn: 31952
2006-11-28 01:28:00 +00:00
e8c64aba11
Preliminary support for inline asm in the cbe. The target specific ugliness
...
is still in Writer, but issolated to a single function. This might be split
into something in each target directory. This is sufficient to get through
archie and an strcpy impl on linux-x86.
Module level asm is not handled.
llvm-svn: 31948
2006-11-27 23:50:49 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
16eaffe595
When truncating to bool, it is necessary to & with 1 for all casts that
...
can result in a bool. Previously PtrToInt, FPToUI and FPToSI were missing
this operation.
llvm-svn: 31938
2006-11-27 18:51:06 +00:00
6c38f0bb07
For PR950:
...
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.
llvm-svn: 31931
2006-11-27 01:05:10 +00:00
24cdf575e7
fix storing bools to mem and unordered FP ops
...
llvm-svn: 31920
2006-11-26 04:34:26 +00:00
6968c497de
Add newline at end of file.
...
llvm-svn: 31902
2006-11-25 05:41:02 +00:00
5b96cdebb0
Refactored *GVRequiresExtraLoad() to Subtarget method.
...
llvm-svn: 31887
2006-11-21 00:01:06 +00:00
ec5dbccdcf
in ppc64-mode, don't allocate the 32-bit version of r13 either.
...
llvm-svn: 31884
2006-11-20 20:48:05 +00:00
ac36360348
r13 is the thread pointer on darwin/ppc64, don't allocate it.
...
llvm-svn: 31882
2006-11-20 19:33:51 +00:00
3e96211bc8
Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit
...
features autodetected. This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.
llvm-svn: 31879
2006-11-20 18:16:05 +00:00
37d080b11d
We should perform extra load for dllimported calls
...
llvm-svn: 31874
2006-11-20 10:46:14 +00:00
2cca385fbb
on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
...
Also, valist should create a pointer RC reg class value, not a GPRC value.
llvm-svn: 31840
2006-11-18 01:57:19 +00:00
572e238c14
make sure to safe LR8 in the right stack slot for PPC64
...
llvm-svn: 31839
2006-11-18 01:34:43 +00:00
9ca15c8914
Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'.
...
llvm-svn: 31838
2006-11-18 01:23:56 +00:00
542dfd5510
Rewrite the branch selector to be correct in the face of large functions.
...
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model. This fixes assembler errors when compiling 403.gcc with
tail merging enabled.
Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion. Only if branches need expansion are instructions rewritten
and created. This should make branch select faster, and eliminates the
Bxx instructions from the .td file.
llvm-svn: 31837
2006-11-18 00:32:03 +00:00
33fc1d45e5
add encoding for BCC, after finally wrestling strange ppc/tblgen endianness
...
issues to the ground.
llvm-svn: 31836
2006-11-17 23:53:28 +00:00
be9377a1e3
convert PPC::BCC to use the 'pred' operand instead of separate predicate
...
value and CR reg #. This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(
llvm-svn: 31835
2006-11-17 22:37:34 +00:00
e0263794f4
rename PPC::COND_BRANCH to PPC::BCC
...
llvm-svn: 31834
2006-11-17 22:14:47 +00:00
8c6a41ea12
start using PPC predicates more consistently.
...
llvm-svn: 31833
2006-11-17 22:10:59 +00:00
9e8093ae20
For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
...
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.
llvm-svn: 31832
2006-11-17 22:10:14 +00:00
de5fa025ab
Hopefully a good crack at making debugging work on intel -disable-fp-elim.
...
llvm-svn: 31830
2006-11-17 21:19:15 +00:00
73106b5e2a
Assert unhandled case.
...
llvm-svn: 31828
2006-11-17 18:49:39 +00:00
1823346b3e
1. Ignore the -disable-fp-elim when the routine is a leaf.
...
2. Offsets on 64-bit stores are still in bytes.
llvm-svn: 31824
2006-11-17 16:09:31 +00:00
91542a4f2d
Typo. Fix the nightly tests.
...
llvm-svn: 31823
2006-11-17 14:06:41 +00:00
c8e81b8d48
Removed even more std::cerr and #include <iostream> things.
...
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
3b7261b18e
implement a todo: change a map into a vector
...
llvm-svn: 31805
2006-11-17 01:52:23 +00:00
be1a4d80b3
fix typo
...
llvm-svn: 31799
2006-11-17 00:49:36 +00:00
a715288b40
implicit_def_vrrc doesn't generate code.
...
llvm-svn: 31797
2006-11-16 23:49:52 +00:00
572dc9cb4e
Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
...
llvm-svn: 31795
2006-11-16 23:33:25 +00:00
7ae482c52a
Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.
...
llvm-svn: 31794
2006-11-16 23:22:26 +00:00
48850c10c0
This is a general clean up of the PowerPC ABI. Address several problems and
...
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
llvm-svn: 31792
2006-11-16 22:43:37 +00:00
30055b9208
fix a regression that I introduced. stdu should scale the offset by 4
...
before printing it.
llvm-svn: 31791
2006-11-16 21:45:30 +00:00
c5e769710e
Align stubs on 4 byte boundary. This fixes 447.dealII.
...
llvm-svn: 31790
2006-11-16 20:13:34 +00:00
96d7386006
add a statistic
...
llvm-svn: 31785
2006-11-16 18:13:49 +00:00
a7ff5162b0
fix broken encoding
...
llvm-svn: 31778
2006-11-16 01:01:28 +00:00
e742d9a4b7
add ppc64 r+i stores with update.
...
llvm-svn: 31776
2006-11-16 00:57:19 +00:00
6f5840c409
add patterns for ppc32 preinc stores. ppc64 next.
...
llvm-svn: 31775
2006-11-16 00:41:37 +00:00
3a494989a6
switch these back to the 'bad old way'
...
llvm-svn: 31774
2006-11-16 00:33:34 +00:00
b4e911d15a
Fix ppc64 epilog bug.
...
llvm-svn: 31771
2006-11-15 23:35:30 +00:00
5771156be0
Stop using isTwoAddress, switching to operand constraints instead.
...
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
llvm-svn: 31770
2006-11-15 23:24:18 +00:00
5c23899c7d
add a new field needed by the code emitter generator.
...
llvm-svn: 31768
2006-11-15 22:55:04 +00:00
dc2c8748a7
Properly transfer kill / dead info.
...
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
bbbcac39e6
Kill / dead info has been moved to MI's.
...
llvm-svn: 31764
2006-11-15 20:56:39 +00:00
c57819d4a3
commuteInstruction should propagate kill / dead info.
...
llvm-svn: 31763
2006-11-15 20:56:03 +00:00
474b5b7c95
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
...
addrmodes.
llvm-svn: 31757
2006-11-15 19:55:13 +00:00
2775aba51d
Simplify IntrinsicLowering and clarify that it is only for use by the
...
CBE and interpreter.
llvm-svn: 31755
2006-11-15 18:00:10 +00:00
60c2a0154a
Remove unneeded forward decls
...
llvm-svn: 31754
2006-11-15 17:53:13 +00:00
0e117c7e9d
Fix the PPC regressions last night
...
llvm-svn: 31752
2006-11-15 17:40:51 +00:00
1396961e85
Switch loads over to use memri as the operand instead of a reg/imm operand
...
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
llvm-svn: 31749
2006-11-15 02:43:19 +00:00
cf772f7eca
Revert. This wasn't meant to be checked in.
...
llvm-svn: 31737
2006-11-14 19:20:33 +00:00
e79a451475
group load and store instructions together. No functionality change.
...
llvm-svn: 31736
2006-11-14 19:19:53 +00:00
58e8bed48e
Fix predicates for unindexed stores so they don't accidentally match indexed
...
stores.
llvm-svn: 31735
2006-11-14 19:13:39 +00:00
44dbdbe5cf
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
...
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
llvm-svn: 31734
2006-11-14 18:44:47 +00:00
b542925b22
remove a ton of custom selection logic no longer needed
...
llvm-svn: 31733
2006-11-14 18:43:11 +00:00
4916acbd0f
it would be nice of ctlz were lowered to bsf etc.
...
llvm-svn: 31730
2006-11-14 08:08:46 +00:00
97ff46b3cc
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
llvm-svn: 31725
2006-11-14 05:28:08 +00:00
6dc22332bf
add a note
...
llvm-svn: 31719
2006-11-14 01:57:53 +00:00
683712583a
minor tweaks, reject vector preinc.
...
llvm-svn: 31717
2006-11-14 01:38:31 +00:00
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
1121e50f7e
teach the g5 hazard recognizer about update loads. This fixes
...
Ptrdist/anagram among others.
llvm-svn: 31708
2006-11-13 20:11:06 +00:00
0df2ada9d4
Cute example from Chris Lattner.
...
llvm-svn: 31696
2006-11-13 00:23:28 +00:00
1dfc6110ff
Make sure stack link is set in 64-bit.
...
llvm-svn: 31690
2006-11-11 22:22:07 +00:00
0d550cc56c
implement proper PPC64 prolog/epilog codegen.
...
llvm-svn: 31684
2006-11-11 19:05:28 +00:00
66c502b54a
Running with frame pointers prevented debugging, external probes and
...
potentially some system calls/exception handling from working. TOS must always
link to previous frame. This is a short term workaround until alloca scheme is
reworked.
llvm-svn: 31677
2006-11-11 10:21:58 +00:00
db04c958a5
Add implicit use / def operands to created MI's.
...
llvm-svn: 31676
2006-11-11 10:21:44 +00:00
a36cdcfaf8
Add all implicit defs to FP_REG_KILL mi.
...
llvm-svn: 31674
2006-11-11 07:19:36 +00:00
c5102bfc7c
allow the offset of a preinc'd load to be the low-part of a global. This
...
produces this clever code:
_millisecs:
lis r2, ha16(_Time.1182)
lwzu r3, lo16(_Time.1182)(r2)
lwz r2, 4(r2)
addic r4, r2, 1
addze r3, r3
blr
instead of this:
_millisecs:
lis r2, ha16(_Time.1182)
la r3, lo16(_Time.1182)(r2)
lwz r2, lo16(_Time.1182)(r2)
lwz r3, 4(r3)
addic r4, r3, 1
addze r3, r2
blr
for:
long %millisecs() {
%tmp = load long* %Time.1182 ; <long> [#uses=1]
%tmp1 = add long %tmp, 1 ; <long> [#uses=1]
ret long %tmp1
}
llvm-svn: 31673
2006-11-11 04:53:30 +00:00
2ff632c54b
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
...
globals.
llvm-svn: 31672
2006-11-11 04:51:36 +00:00
b314b155ed
ppc64 doesn't have lwau, don't attempt to form it.
...
llvm-svn: 31656
2006-11-11 00:08:42 +00:00
c9fa36d706
implement preinc support for r+i loads on ppc64
...
llvm-svn: 31654
2006-11-10 23:58:45 +00:00
915026cdc3
Add a note.
...
llvm-svn: 31650
2006-11-10 22:09:17 +00:00
5b725a71a9
These are done.
...
llvm-svn: 31649
2006-11-10 22:03:35 +00:00
49683ba236
Don't dag combine floating point select to max and min intrinsics. Those
...
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
llvm-svn: 31645
2006-11-10 21:43:37 +00:00
fb44822a98
Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
...
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.
llvm-svn: 31641
2006-11-10 21:23:04 +00:00
6c8656a6b1
dform 8/9 are identical to dform 1
...
llvm-svn: 31637
2006-11-10 17:51:02 +00:00
286357480c
Fix a potential bug.
...
llvm-svn: 31634
2006-11-10 09:13:37 +00:00
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
ce6455489a
add an initial cut at preinc loads for ppc32. This is broken for ppc64
...
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)
This is disabled unless -enable-ppc-preinc is passed to llc for now.
llvm-svn: 31621
2006-11-10 02:08:47 +00:00
cd436327f1
add note about ugly codegen with preinc
...
llvm-svn: 31617
2006-11-10 01:33:53 +00:00
14140059f0
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
b9c91c265c
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
llvm-svn: 31613
2006-11-10 00:48:11 +00:00
4e03cb1945
add a note about viterbi
...
llvm-svn: 31612
2006-11-10 00:23:26 +00:00
36a8fbf771
PPC supports i32 / i64 pre-inc load / store.
...
llvm-svn: 31599
2006-11-09 19:11:50 +00:00
c034f14fbe
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31596
2006-11-09 18:44:21 +00:00
b15000736c
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
5f7ab1b964
implement load effective address similar to the alpha backend
...
remove lea_addri and the now unused memri addressing mode
llvm-svn: 31592
2006-11-09 13:58:55 +00:00
1698c2999c
Remove M_2_ADDR_FLAG.
...
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
c9a4cdc9c9
Added indexed store node and patfrag's.
...
llvm-svn: 31576
2006-11-08 23:02:11 +00:00
3b3b786f03
Use movl+xchgl instead of pushl+popl.
...
llvm-svn: 31572
2006-11-08 20:35:37 +00:00
6cd0909da7
Match tblegen changes.
...
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
708cb60588
initial implementation of addressing mode 2
...
TODO: fix lea_addri
llvm-svn: 31552
2006-11-08 17:07:32 +00:00
fdff938a7e
For PR950:
...
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
llvm-svn: 31542
2006-11-08 06:47:33 +00:00
a801fcedd3
Refactor all the addressing mode selection stuff into the isel lowering
...
class, where it can be used for preinc formation.
llvm-svn: 31536
2006-11-08 02:15:41 +00:00
6a5a4f85d3
correct the (currently unused) pattern for lwzu.
...
llvm-svn: 31535
2006-11-08 02:13:12 +00:00
922e191116
Fixed a bug which causes x86 be to incorrectly match
...
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.
Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>
llvm-svn: 31519
2006-11-07 22:14:24 +00:00
be7033b346
add a note from viterbi
...
llvm-svn: 31506
2006-11-07 18:30:21 +00:00
d94477f6c9
fix encoding of BLR
...
llvm-svn: 31485
2006-11-07 01:51:50 +00:00
7e885005ba
add a note
...
llvm-svn: 31477
2006-11-06 21:26:49 +00:00
7d6f3db3e2
Unbreak VC++ build.
...
llvm-svn: 31464
2006-11-05 19:31:28 +00:00
35b927e0d3
Fix a bug in the last patch and convert to && instead of & for logical expr.
...
llvm-svn: 31463
2006-11-05 19:26:37 +00:00
6088f8af16
Implement the -enabled-cbe-printf-a feature.
...
llvm-svn: 31462
2006-11-05 17:09:41 +00:00
2959789c92
encode BLR predicate info for the JIT
...
llvm-svn: 31450
2006-11-04 05:42:48 +00:00
6be726048e
Go through all kinds of trouble to mark 'blr' as having a predicate operand
...
that takes a register and condition code. Print these pieces of BLR the
right way, even though it is currently set to 'always'.
Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.
llvm-svn: 31449
2006-11-04 05:27:39 +00:00
c8a68d08c3
Describe PPC predicates, which are a pair of CR# and condition.
...
llvm-svn: 31438
2006-11-03 23:53:25 +00:00
4905d2c5b4
initial steps to getting the predicate on PPC::BLR right.
...
llvm-svn: 31437
2006-11-03 23:52:18 +00:00
4fcc04a32a
remove dead var
...
llvm-svn: 31436
2006-11-03 23:50:15 +00:00
9ac6442db6
remove dead/redundant vars
...
llvm-svn: 31435
2006-11-03 23:48:56 +00:00
eb7128465d
remove redundant/dead vars
...
llvm-svn: 31434
2006-11-03 23:47:20 +00:00
895d199348
remove dead vars
...
llvm-svn: 31433
2006-11-03 23:46:45 +00:00
2048373e71
add a note
...
llvm-svn: 31429
2006-11-03 22:27:39 +00:00
4ece5c04f4
revert previous patch
...
llvm-svn: 31411
2006-11-03 03:08:28 +00:00
94b29e9e91
Dead code.
...
llvm-svn: 31405
2006-11-03 02:08:41 +00:00
38b162c1d2
add createCFGSimplificationPass to ARMTargetMachine::addInstSelector
...
llvm-svn: 31400
2006-11-03 01:39:25 +00:00
799b96be08
silence warning
...
llvm-svn: 31395
2006-11-03 01:19:31 +00:00
b974b0a3e1
silence warnings.
...
llvm-svn: 31394
2006-11-03 01:18:29 +00:00
de2f0906e4
silence warning
...
llvm-svn: 31393
2006-11-03 01:13:15 +00:00
71f55131d4
silence warnings
...
llvm-svn: 31392
2006-11-03 01:11:05 +00:00
c0b1dec892
Make CBackend -pedantic clean.
...
llvm-svn: 31388
2006-11-03 00:00:57 +00:00
2de0910a1b
fix a bug reid noticed
...
llvm-svn: 31385
2006-11-02 23:39:53 +00:00
de46e48420
For PR786:
...
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
llvm-svn: 31380
2006-11-02 20:25:50 +00:00
ac8668d62f
move ARMCondCodeToString to ARMAsmPrinter.cpp
...
remove unused variables from lowerCall
llvm-svn: 31378
2006-11-02 15:00:02 +00:00
d8b59f67f6
fix 2006-11-01-vastart.ll
...
llvm-svn: 31371
2006-11-02 03:05:26 +00:00
7eb55b395f
For PR950:
...
Replace the REM instruction with UREM, SREM and FREM.
llvm-svn: 31369
2006-11-02 01:53:59 +00:00
584a11ae22
Implement the getRegForInlineAsmConstraint method for PPC. With recent
...
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
llvm-svn: 31367
2006-11-02 01:44:04 +00:00
93cdd149f7
Rename
...
llvm-svn: 31364
2006-11-01 23:18:32 +00:00
1b2e60e970
Added getTiedToSrcOperand() to check for two-address'ness.
...
llvm-svn: 31360
2006-11-01 23:00:31 +00:00
3576405a26
print null values in bss
...
llvm-svn: 31349
2006-11-01 14:26:44 +00:00
0cd8d14c7c
implement zextload bool and truncstore bool
...
llvm-svn: 31348
2006-11-01 14:13:27 +00:00
94e5bc9e83
Fix ldmxcsr JIT encoding.
...
llvm-svn: 31343
2006-11-01 06:53:52 +00:00
7a6a5b9af5
Add constraints to Instruction class.
...
llvm-svn: 31332
2006-11-01 00:26:27 +00:00
dfbf91e59d
more shotenning
...
llvm-svn: 31331
2006-10-31 23:46:56 +00:00
a41c2d6432
Nuke dead code.
...
llvm-svn: 31327
2006-10-31 21:53:31 +00:00
44daa50bed
allow the address of a global to be used with the "i" constraint when in
...
-static mode. This implements PR882.
llvm-svn: 31326
2006-10-31 20:13:11 +00:00
60ce558aaa
implement the 'c' inline asm modifier character
...
llvm-svn: 31325
2006-10-31 20:12:30 +00:00
8b20fa42da
Let us play simplify the td file (and fix a few missed sub and mul patterns).
...
llvm-svn: 31322
2006-10-31 19:52:12 +00:00
f6a6966cd2
handle "st" as "st(0)"
...
llvm-svn: 31320
2006-10-31 19:42:44 +00:00
8c6949e5b2
Change the prototype for TargetLowering::isOperandValidForConstraint
...
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
692e4155aa
Add all that branch mangling niftiness
...
llvm-svn: 31313
2006-10-31 16:49:55 +00:00
4e825336a0
add support for calling functions when the caller has variable sized objects
...
llvm-svn: 31312
2006-10-31 13:03:26 +00:00
aa4c0f9374
1. Clean up code due to changes in SwitchTo*Section(2)
...
2. Added partial debug support for mingw\cygwin targets (the same as
Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
for storing debug info by default, thus many (runtime) libraries has
this information included. These formats shouldn't be mixed in one binary
('stabs' & 'DWARF'), otherwise binutils tools will be confused.
llvm-svn: 31311
2006-10-31 08:31:24 +00:00
49993529eb
Unbreaking static ctors patch.
...
Defaulting second arguments of SwitchTo*Section, this should make things
somehow clearer.
llvm-svn: 31306
2006-10-31 06:11:06 +00:00
2545fe6d93
Make this compile again.
...
llvm-svn: 31304
2006-10-31 01:45:56 +00:00
de5ecd6bc1
Apply Aton's LLVM patch for PR973: Linux ctors / dtors support.
...
llvm-svn: 31303
2006-10-31 01:26:55 +00:00
3e36e07db2
fix miscompilation of llvm.isunordered, where we branched on the opposite
...
condition. This fixes miscompilation of Olden/bh and many others.
llvm-svn: 31301
2006-10-30 23:02:25 +00:00
b51b5c0b1f
Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
...
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.
llvm-svn: 31299
2006-10-30 22:32:30 +00:00
7443600ef8
fix wonky indentation
...
llvm-svn: 31298
2006-10-30 22:27:23 +00:00
0d41d19427
All targets expand BR_JT for now.
...
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
113f7470e6
implement the BlockHasNoFallThrough hook
...
llvm-svn: 31264
2006-10-28 17:35:02 +00:00
53ebf20c26
add another target hook for branch folding.
...
llvm-svn: 31262
2006-10-28 17:29:57 +00:00
ae8c29a7d3
Doh. Must check if GV is constant first before putting it in .cstring.
...
llvm-svn: 31253
2006-10-28 05:56:51 +00:00
0d782b4c60
Doh. Must check if GV is constant first.
...
llvm-svn: 31252
2006-10-28 05:56:06 +00:00
a6873c0f88
don't dist internal readme
...
llvm-svn: 31247
2006-10-28 00:51:15 +00:00
acc6b37d0d
don't dist internal readme's
...
llvm-svn: 31246
2006-10-28 00:49:54 +00:00
3be52bb570
don't distribute internal readme's
...
llvm-svn: 31245
2006-10-28 00:48:27 +00:00
247e09a07c
Make sure all the readme files get distributed.
...
llvm-svn: 31244
2006-10-28 00:11:39 +00:00
28174f5a3a
this doesn't occur any more in mason
...
llvm-svn: 31236
2006-10-27 22:02:19 +00:00
4c0cc53da1
the code in question is now:
...
cmpw cr0, r7, r3
ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
cmpw cr0, r8, r5
bgt cr0, LBB1_2 ;bb
which is just as good as crnand.
llvm-svn: 31235
2006-10-27 22:00:55 +00:00
e056dd5928
Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value.
...
llvm-svn: 31228
2006-10-27 21:08:32 +00:00
bf3df77758
Fix for PR968: expand vector sdiv, udiv, srem, urem.
...
llvm-svn: 31220
2006-10-27 18:49:08 +00:00
e54243f030
Initialize CStringSection member var.
...
llvm-svn: 31214
2006-10-27 16:14:06 +00:00
f53ae69365
Change load PatFrag to ignore indexed load.
...
llvm-svn: 31210
2006-10-26 21:55:50 +00:00
e1e06c2de8
Place cstrings in .cstring section.
...
llvm-svn: 31207
2006-10-26 21:48:57 +00:00
392f645783
Put cstrings in .cstring section when compiling for Mac OS X.
...
llvm-svn: 31203
2006-10-26 19:18:18 +00:00
a23166d6a4
initial support for frame pointers
...
llvm-svn: 31197
2006-10-26 13:31:26 +00:00
c6b52da458
Enclose a case in { and } so that the pickier compilers don't complain.
...
llvm-svn: 31196
2006-10-26 06:17:40 +00:00
7e80b0b31e
For PR950:
...
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.
llvm-svn: 31195
2006-10-26 06:15:43 +00:00
c415c5be49
During vector shuffle lowering, we sometimes commute a vector shuffle to try
...
to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.
llvm-svn: 31186
2006-10-25 21:49:50 +00:00
7e065ff7e4
X86ISD::PEXTRW 3rd operand type is always target pointer type.
...
llvm-svn: 31185
2006-10-25 21:35:05 +00:00
798b306311
Remove -disable-x86-shuffle-opti
...
llvm-svn: 31183
2006-10-25 20:48:19 +00:00
71b99297aa
Move getPreferredAlignmentLog from AsmPrinter to TargetData
...
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
bd29281e97
expand ISD::VACOPY
...
llvm-svn: 31170
2006-10-24 20:15:21 +00:00
9030fc690a
Fix CodeGen/IA64/ret-0.ll, which has apparently been broken since some of the
...
isel changes happened months ago.
llvm-svn: 31164
2006-10-24 17:09:43 +00:00
ed32883b27
fix warning about missing newline at end of file
...
llvm-svn: 31162
2006-10-24 17:07:11 +00:00
aaeede0aa2
implement uncond branch insertion, mark branches with isBranch.
...
llvm-svn: 31160
2006-10-24 16:47:57 +00:00
ccd7704354
implement uncond branch insertion for the branch folding pass
...
llvm-svn: 31159
2006-10-24 16:44:55 +00:00
042d56230e
implement uncond branch insertion so alpha works work branchfolding.
...
llvm-svn: 31158
2006-10-24 16:41:36 +00:00
b7267bd034
implement uncond branch insertion for sparc to fix regressions from last night
...
due to branchfolding
llvm-svn: 31157
2006-10-24 16:39:19 +00:00
f054003ba7
new bad case
...
llvm-svn: 31156
2006-10-24 16:12:47 +00:00
d43e8a7429
Add intrinsics for the rest of the DCB* instructions.
...
llvm-svn: 31148
2006-10-24 01:08:42 +00:00
b43efe86f5
implement STRB and STRH
...
llvm-svn: 31138
2006-10-23 20:34:27 +00:00
Reid Spencer