OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity
251,740 Commits 31 Branches 0 Tags 2.2 GiB
Commit Graph

7 Commits

Author SHA1 Message Date
Sam Kolton a568e3dde7 [AMDGPU] Add pseudo SDWA instructions 
Summary: This is needed for later SDWA support in CodeGen.

Reviewers: vpykhtin, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D27412

llvm-svn: 290338
 2016-12-22 12:57:41 +00:00
Sam Kolton a6792a39c4 [AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa 
Summary: Real instruction should copy constraints from real instruction. This allows auto-generated disassembler to correctly process tied operands.

Reviewers: nhaustov, vpykhtin, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D27847

llvm-svn: 290336
 2016-12-22 11:30:48 +00:00
Simon Pilgrim e995a8088d Fix spelling mistakes in AMDGPU target comments. NFC. 
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287333
 2016-11-18 11:04:02 +00:00
Matt Arsenault eff1ad8d8e AMDGPU: Move redundant setting of inst properties 
llvm-svn: 287311
 2016-11-18 04:42:59 +00:00
Valery Pykhtin 355103f6c0 [AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions 
Differential revision: https://reviews.llvm.org/D24738

llvm-svn: 282234
 2016-09-23 09:08:07 +00:00
Valery Pykhtin e330cfa294 [AMDGPU] Refactor VOP3 instruction TD definitions 
Differential revision: https://reviews.llvm.org/D24664

llvm-svn: 281965
 2016-09-20 10:41:16 +00:00
Valery Pykhtin 2828b9be1e [AMDGPU] Refactor VOPC instruction TD definitions 
Differential Revision: https://reviews.llvm.org/D24546

llvm-svn: 281903
 2016-09-19 14:39:49 +00:00