dc0848c029
CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC
...
Delete MachineInstr::getIterator(), since the term "iterator" is
overloaded when talking about MachineInstr.
- Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so
that ilist_node::getIterator() is still available.
- Add it back as MachineInstr::getInstrIterator(). This matches the
naming in MachineBasicBlock.
- Add MachineInstr::getBundleIterator(). This is explicitly called
"bundle" (not matching MachineBasicBlock) to disintinguish it clearly
from ilist_node::getIterator().
- Update all calls. Some of these I switched to `auto` to remove
boiler-plate, since the new name is clear about the type.
There was one call I updated that looked fishy, but it wasn't clear what
the right answer was. This was in X86FrameLowering::inlineStackProbe(),
added in r252578 in lib/Target/X86/X86FrameLowering.cpp. I opted to
leave the behaviour unchanged, but I'll reply to the original commit on
the list in a moment.
llvm-svn: 261504
2016-02-21 22:58:35 +00:00
79a886be06
[Hexagon] Recognize more cases in copyPhysReg and stack slot load/store
...
llvm-svn: 260748
2016-02-12 21:56:41 +00:00
feb65a3f8b
[Hexagon] Recognize more instructions in isLoadFromStackSlot/isStoreToStackSlot
...
llvm-svn: 260725
2016-02-12 20:54:15 +00:00
fd02aad8fd
[Hexagon] Add utility functions to detect sign- and zero-extending loads
...
llvm-svn: 260698
2016-02-12 18:37:23 +00:00
7b413c6c63
[Hexagon] Use general purpose registers to spill pred/mod registers into
...
Patch by Tobias Edler Von Koch.
llvm-svn: 258527
2016-01-22 19:15:58 +00:00
237b96132d
[Hexagon] Expand pseudo instruction Insert4
...
llvm-svn: 257771
2016-01-14 15:37:16 +00:00
b28ae10a16
[Hexagon] Handle branches with non-mbb operands
...
llvm-svn: 257768
2016-01-14 15:05:27 +00:00
56bbf54b43
[Hexagon] Update the Hexagon packetizer
...
llvm-svn: 255807
2015-12-16 19:36:12 +00:00
5e6f2bd0cb
[Hexagon] Add "const" to function parameters in HexagonInstrInfo
...
llvm-svn: 255544
2015-12-14 21:32:25 +00:00
e4b9f507cf
fix 'the the '; NFC
...
llvm-svn: 254928
2015-12-07 19:21:39 +00:00
4eb6d4d1f2
[Hexagon] Hexagon V60 HVX intrinsic defintions
...
Author: Ron Lieberman <ronl@codeaurora.org>
llvm-svn: 254165
2015-11-26 16:54:33 +00:00
195dc8d0db
[Hexagon] HVX vector register classes and more isel patterns
...
llvm-svn: 254132
2015-11-26 04:33:11 +00:00
70a134d29f
[Hexagon] Treat transfers of FP immediates are pseudo instructions
...
This is a temporary fix to address ICE on 2005-10-21-longlonggtu.ll.
The proper fix will be to use A2_tfrsi, but it will need more work to
teach all users of A2_tfrsi to also expect a floating-point operand.
llvm-svn: 254099
2015-11-25 21:40:03 +00:00
aa93575b7e
[Hexagon] Add missing include of <cctype>
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Lack thereof breaks Windows builds due to the use of std::isspace
in HexagonInstrInfo.cpp.
llvm-svn: 253987
2015-11-24 15:11:13 +00:00
b9a1c3a32c
[Hexagon] Bring HexagonInstrInfo up to date
...
llvm-svn: 253986
2015-11-24 14:55:26 +00:00
0257905f27
[Hexagon] Change Based->Base in getBasedWithImmOffset
...
llvm-svn: 250848
2015-10-20 19:21:05 +00:00
a72c6e25ec
Hexagon: Remove implicit ilist iterator conversions, NFC
...
There are two things out of the ordinary in this commit. First, I made
a loop obviously "infinite" in HexagonInstrInfo.cpp. After checking if
an instruction was at the beginning of a basic block (in which case,
`break`), the loop decremented and checked the iterator for `nullptr` as
the loop condition. This has never been possible (the prev pointers are
always been circular, so even with the weird ilist/iplist
implementation, this isn't been possible), so I removed the condition.
Second, in HexagonAsmPrinter.cpp there was another case of comparing a
`MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()`
(which returns `MachineBasicBlock::iterator`). While not incorrect,
it's fragile. I switched this to `::instr_end()`.
All that said, no functionality change intended here.
llvm-svn: 250778
2015-10-20 00:46:39 +00:00
fb33824efd
[Hexagon] Add an early if-conversion pass
...
llvm-svn: 249423
2015-10-06 15:49:14 +00:00
c536bd9e73
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
...
llvm-svn: 247357
2015-09-10 23:10:42 +00:00
e40c8a2b26
PseudoSourceValue: Replace global manager with a manager in a machine function.
...
This commit removes the global manager variable which is responsible for
storing and allocating pseudo source values and instead it introduces a new
manager class named 'PseudoSourceValueManager'. Machine functions now own an
instance of the pseudo source value manager class.
This commit also modifies the 'get...' methods in the 'MachinePointerInfo'
class to construct pseudo source values using the instance of the pseudo
source value manager object from the machine function.
This commit updates calls to the 'get...' methods from the 'MachinePointerInfo'
class in a lot of different files because those calls now need to pass in a
reference to a machine function to those methods.
This change will make it easier to serialize pseudo source values as it will
enable me to transform the mips specific MipsCallEntry PseudoSourceValue
subclass into two target independent subclasses.
Reviewers: Akira Hatanaka
llvm-svn: 244693
2015-08-11 23:09:45 +00:00
c88bf54366
[CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.
...
llvm-svn: 239553
2015-06-11 19:30:37 +00:00
e70b31fc1b
[InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
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Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.
Reviewers: pete, ributzka, uweigand, mcrosier
Reviewed By: mcrosier
Subscribers: mcrosier, ted, llvm-commits
Differential Revision: http://reviews.llvm.org/D10174
llvm-svn: 239336
2015-06-08 20:09:58 +00:00
df43e68629
[Hexagon] Update AnalyzeBranch, etc target hooks
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Improved the AnalyzeBranch, InsertBranch, and RemoveBranch
functions in order to handle more of our branch instructions.
This requires changes to analyzeCompare and PredicateInstructions.
Specifically, we've added support for new value compare jumps,
improved handling of endloop, added more compare instructions,
and improved support for predicate instructions.
Differential Revision: http://reviews.llvm.org/D9559
llvm-svn: 236876
2015-05-08 16:16:29 +00:00
55bdeb7bc7
[Hexagon] Use constant extenders to fix up hardware loops
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Use a loop instruction with a constant extender for a hardware
loop instruction that is too far away from the start of the loop.
This is cheaper than changing the SA register value.
Differential Revision: http://reviews.llvm.org/D9262
llvm-svn: 235882
2015-04-27 14:16:43 +00:00
cd97c985c7
[Hexagon] Use A2_tfrsi for constant pool and jump table addresses
...
llvm-svn: 235535
2015-04-22 18:25:53 +00:00
05902163b6
[Hexagon] Consider constant-extended offsets to be valid
...
llvm-svn: 235529
2015-04-22 17:51:26 +00:00
4fa2a9f7fd
[Hexagon] Overhaul of stack object allocation
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- Use static allocation for aligned stack objects.
- Simplify dynamic stack object allocation.
- Simplify elimination of frame-indices.
llvm-svn: 235521
2015-04-22 16:43:53 +00:00
c05dff1792
Expand MUX instructions early on Hexagon
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This time with all files included.
llvm-svn: 233696
2015-03-31 13:35:12 +00:00
8c4fd2bdeb
Revert 233694. Weak SVN-fu.
...
llvm-svn: 233695
2015-03-31 13:32:32 +00:00
261d62c862
Expand MUX instructions early on Hexagon
...
llvm-svn: 233694
2015-03-31 13:29:17 +00:00
421133470f
[Hexagon] Add support for vector instructions
...
llvm-svn: 232728
2015-03-19 16:33:08 +00:00
c6f19333cf
[Hexagon] ENDLOOP is a non-reversible conditional branch
...
llvm-svn: 232725
2015-03-19 15:18:57 +00:00
36ccfa5779
[Hexagon] Use pseudo-instructions for true/false predicate values
...
llvm-svn: 232657
2015-03-18 19:07:53 +00:00
47ab1f2007
[Hexagon] Intrinsics for circular and bit-reversed loads and stores
...
llvm-svn: 232645
2015-03-18 16:23:44 +00:00
78cc36fed7
[Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch
...
llvm-svn: 232643
2015-03-18 15:56:43 +00:00
c4d3140524
Remove subtarget dependence from HexagonRegisterInfo.
...
llvm-svn: 231887
2015-03-10 23:45:55 +00:00
7b1799c7f8
[Hexagon] Use single tailcall pseudoinst and fix checking for label jumping versus tail calling.
...
llvm-svn: 231713
2015-03-09 22:05:21 +00:00
2efa2d01d7
[Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable.
...
llvm-svn: 231710
2015-03-09 21:48:13 +00:00
f1362f6196
ArrayRefize memory operand folding. NFC.
...
llvm-svn: 230846
2015-02-28 12:04:00 +00:00
36a036909c
Fix the clang -Werror build (-Wunused-variable)
...
llvm-svn: 228635
2015-02-10 00:16:36 +00:00
4fd203d3e1
[Hexagon] Removing more V4 predicates since V4 is the required minimum.
...
llvm-svn: 228614
2015-02-09 21:56:37 +00:00
f297dbed48
[Hexagon] Renaming A2_addi and formatting.
...
llvm-svn: 228318
2015-02-05 17:49:13 +00:00
c0434466e4
[Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.
...
llvm-svn: 228158
2015-02-04 17:52:06 +00:00
8ffce23cda
[Hexagon] Replacing old versions of stores and loads.
...
llvm-svn: 226065
2015-01-15 00:15:30 +00:00
c7522f31f1
[Hexagon] Replacing old version of convert and load f64.
...
llvm-svn: 226057
2015-01-14 23:07:36 +00:00
c91fabc233
[Hexagon] Removing old versions of cmph and updating references.
...
llvm-svn: 226013
2015-01-14 18:26:14 +00:00
ffacc6eac6
[Hexagon] Removing old versions of cmpb and updating references.
...
llvm-svn: 226006
2015-01-14 18:05:44 +00:00
fa947906bf
[Hexagon] Deleting versions of compare-not that don't have encoding information. Updating references.
...
llvm-svn: 226003
2015-01-14 16:49:12 +00:00
1445553474
[Hexagon] Adding dealloc_return encoding and absolute address stores.
...
llvm-svn: 225267
2015-01-06 16:15:15 +00:00
dacf057bdc
[Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions. Removing old defs without bits and updating references.
...
llvm-svn: 225210
2015-01-05 21:36:38 +00:00
d3c02f177a
Replace several 'assert(false' with 'llvm_unreachable' or fold a condition into the assert.
...
llvm-svn: 225160
2015-01-05 10:15:49 +00:00
9014890819
[Hexagon] Removing old newvalue store variants. Adding postincrement immediate newvalue stores.
...
llvm-svn: 225009
2014-12-30 22:28:31 +00:00
820d5cb608
[Hexagon] Adding indexed store new-value variants.
...
llvm-svn: 225007
2014-12-30 22:00:26 +00:00
2bad4a7177
[Hexagon] Adding indexed store of immediates.
...
llvm-svn: 225006
2014-12-30 21:01:38 +00:00
94a498bf0e
[Hexagon] Adding indexed stores.
...
llvm-svn: 225005
2014-12-30 20:42:23 +00:00
9161d47476
[Hexagon] Adding reg-reg indexed load forms.
...
llvm-svn: 224997
2014-12-30 18:58:47 +00:00
bda31b42a0
[Hexagon] Adding post-increment register form stores and register-immediate form stores with tests.
...
llvm-svn: 224952
2014-12-29 20:44:51 +00:00
9a3cd3f58c
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits.
...
llvm-svn: 224951
2014-12-29 20:00:43 +00:00
3d34afb32d
[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs.
...
llvm-svn: 224949
2014-12-29 19:42:14 +00:00
c83cbbf6a1
[Hexagon] Adding remaining post-increment instruction variants. Removing unused classes.
...
llvm-svn: 224868
2014-12-26 19:31:46 +00:00
fe9612e09d
[Hexagon] Adding post-increment unsigned byte loads.
...
llvm-svn: 224867
2014-12-26 19:12:11 +00:00
96976a10a3
[Hexagon] Adding post-increment signed byte loads with tests.
...
llvm-svn: 224866
2014-12-26 18:57:13 +00:00
947cd70413
[Hexagon] Adding doubleword load.
...
llvm-svn: 224787
2014-12-23 20:44:59 +00:00
026e88d317
[Hexagon] Reapplying 224775 load words.
...
llvm-svn: 224786
2014-12-23 20:02:16 +00:00
20be15718b
Reverting 224775 until mayLoad flag is addressed.
...
llvm-svn: 224783
2014-12-23 19:22:59 +00:00
122aeaafea
[Hexagon] Adding word loads.
...
llvm-svn: 224775
2014-12-23 18:06:56 +00:00
8e39cad934
[Hexagon] Adding signed halfword loads.
...
llvm-svn: 224774
2014-12-23 17:25:57 +00:00
a9386d28a5
[Hexagon] Adding unsigned halfword load.
...
llvm-svn: 224772
2014-12-23 16:42:57 +00:00
4b1eac4dda
[Hexagon] Adding memb instruction. Fixing whitespace in test from 224730.
...
llvm-svn: 224735
2014-12-22 21:40:43 +00:00
af1e5de141
[Hexagon] Adding classes and load unsigned byte instruction, updating usages.
...
llvm-svn: 224730
2014-12-22 21:20:03 +00:00
0f850bde0e
[Hexagon] Removing old variants of instructions and updating references.
...
llvm-svn: 224612
2014-12-19 20:29:29 +00:00
402f772b82
[Hexagon] Adding doubleregs for control registers. Renaming control register class.
...
llvm-svn: 224598
2014-12-19 18:56:10 +00:00
5ccbb1298b
[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
...
llvm-svn: 224556
2014-12-19 00:06:53 +00:00
174476ed96
Reverting 224550, was not ready for commit.
...
llvm-svn: 224552
2014-12-18 23:36:15 +00:00
9000481cda
[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
...
llvm-svn: 224550
2014-12-18 23:27:51 +00:00
db0b13cef0
[Hexagon] Adding encodings for JR class instructions. Updating complier usages.
...
llvm-svn: 223967
2014-12-10 21:24:10 +00:00
4af437fee5
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
...
llvm-svn: 223821
2014-12-09 20:23:30 +00:00
b580d7d8c8
[Hexagon] Adding word combine dot-new form and replacing old combine opcode.
...
llvm-svn: 223815
2014-12-09 19:23:45 +00:00
30dcb232b0
[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.
...
llvm-svn: 223800
2014-12-09 18:16:49 +00:00
5cf5632696
[Hexagon] Removing old def versions and replacing usages with versions that have encodings.
...
llvm-svn: 223720
2014-12-08 23:55:43 +00:00
9bfe5473da
[Hexagon] Adding xtype doubleword comparisons. Removing unused multiclass.
...
llvm-svn: 223701
2014-12-08 21:56:47 +00:00
6e0f9f8d61
[Hexagon] Adding cmp* immediate form instructions.
...
llvm-svn: 222849
2014-11-26 19:43:12 +00:00
902157c249
[Hexagon] Replacing cmp* instructions with ones that contain encoding bits.
...
llvm-svn: 222771
2014-11-25 18:20:52 +00:00
287c4e1762
Removing unused variable.
...
llvm-svn: 222676
2014-11-24 18:55:32 +00:00
397a25e7cd
[Hexagon] Adding asrh instruction, removing unused multiclasses.
...
llvm-svn: 222670
2014-11-24 18:04:42 +00:00
3b3197ef95
[Hexagon] Adding aslh instruction.
...
llvm-svn: 222668
2014-11-24 17:44:19 +00:00
098256c5e6
[Hexagon] Adding zxth instruction.
...
llvm-svn: 222662
2014-11-24 17:11:34 +00:00
bb7d6f5514
[Hexagon] Adding zxtb instruction.
...
llvm-svn: 222660
2014-11-24 16:48:43 +00:00
310991c66f
[Hexagon] Adding sxth instruction.
...
llvm-svn: 222577
2014-11-21 21:54:59 +00:00
91ffec908f
[Hexagon] Adding sxtb instruction. Renaming some identically named classes that will be removed after converting referencing defs.
...
llvm-svn: 222575
2014-11-21 21:35:52 +00:00
e88447d8de
[Hexagon] Removing SUB_rr and replacing with A2_sub.
...
llvm-svn: 222571
2014-11-21 21:19:18 +00:00
ac00643603
[Hexagon] Adding A2_xor instruction with IR selection pattern and test.
...
llvm-svn: 222399
2014-11-19 23:22:23 +00:00
21866546ae
[Hexagon] Adding A2_or instruction with IR selection pattern and test.
...
llvm-svn: 222396
2014-11-19 22:58:04 +00:00
44fd1c8bdf
[Hexagon] Adding A2_and instruction.
...
llvm-svn: 222274
2014-11-18 22:45:47 +00:00
efa74e0280
[Hexagon] Converting from ADD_rr to A2_add which has encoding bits.
...
Adding test to show correct instruction selection and encoding.
llvm-svn: 222249
2014-11-18 20:28:11 +00:00
143f02c47d
Remove unused argument to CreateTargetScheduleState and change
...
the TargetMachine to a TargetSubtargetInfo since everything
we wanted is off of that.
llvm-svn: 219382
2014-10-09 01:59:35 +00:00
2651ae6513
Fix undefined behavior (left shift of negative value) in Hexagon backend.
...
This bug is reported by UBSan.
llvm-svn: 216125
2014-08-20 21:22:03 +00:00
d913448b38
Remove the TargetMachine forwards for TargetSubtargetInfo based
...
information and update all callers. No functional change.
llvm-svn: 214781
2014-08-04 21:25:23 +00:00
35b2f75733
Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the assert.
...
llvm-svn: 211254
2014-06-19 06:10:58 +00:00
062a2baef0
[C++] Use 'nullptr'. Target edition.
...
llvm-svn: 207197
2014-04-25 05:30:21 +00:00
Duncan P. N. Exon Smith