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3 Commits

Author SHA1 Message Date
Matt Arsenault cab64f1c75 AMDGPU: Fix printing trailing whitespace for mubuf atomics 
llvm-svn: 248472
 2015-09-24 07:51:17 +00:00
Tom Stellard 70580f83cc AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops 
Summary:
The MUBUF addr64 bit has been removed on VI, so we must use FLAT
instructions when the pointer is stored in VGPRs.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11067

llvm-svn: 242673
 2015-07-20 14:28:41 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00