e7c14013f5
Fix isNegatibleForFree to not return true for ConstantFP nodes
...
after legalize. Just because a constant is legal (e.g. 0.0 in SSE)
doesn't mean that its negated value is legal (-0.0). We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.
llvm-svn: 47591
2008-02-26 07:04:54 +00:00
1da250097b
Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory
...
operands into inline asm block.
llvm-svn: 47589
2008-02-26 02:42:37 +00:00
7d5eaec6dd
Merge current work back to tree to minimize diffs and drift. Major highlights
...
for CellSPU modifications:
- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
compiles and generates the right code. More work still needs to be done.
llvm-svn: 47532
2008-02-23 18:41:37 +00:00
504c645b3e
Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
...
llvm-svn: 47529
2008-02-23 03:38:34 +00:00
405827dc26
Update test.
...
llvm-svn: 47527
2008-02-23 02:57:25 +00:00
174ef9a0bb
Remat of pic loads are now on by default.
...
llvm-svn: 47525
2008-02-23 02:08:30 +00:00
26e5d01ca1
Really. Why doesn't every arch support MMX?
...
llvm-svn: 47513
2008-02-23 00:56:14 +00:00
cee351c410
Test case for PR2082.
...
llvm-svn: 47501
2008-02-22 20:38:49 +00:00
94ba37f8e3
Allow re-materialization of pic load (controlled by -remat-pic-load for now).
...
llvm-svn: 47476
2008-02-22 09:25:47 +00:00
ab8bfc28c8
copy mmx values from/to memory with GPRs on x86-32
...
instead of with mmx registers. This horribleness is apparently
done by gcc to avoid having to insert emms in places that really
should have it. This is the second half of rdar://5741668.
llvm-svn: 47474
2008-02-22 05:18:04 +00:00
997b3a65ca
Start using GPR's to copy around mmx value instead of mmx regs.
...
GCC apparently does this, and code depends on not having to do
emms when this happens. This is x86-64 only so far, second half
should handle x86-32.
rdar://5741668
llvm-svn: 47470
2008-02-22 02:09:43 +00:00
bdd4c8b04d
Treat clobber operands like early clobbers: if we have
...
any, we force sdisel to do all regalloc for an asm. This
leads to gross but correct codegen.
This fixes the rest of PR2078.
llvm-svn: 47454
2008-02-21 19:43:13 +00:00
3cdf542f5a
Remove llvm-upgrade and update tests.
...
llvm-svn: 47432
2008-02-21 07:42:26 +00:00
59f18b4de6
testcase for PR1133
...
llvm-svn: 47427
2008-02-21 05:27:08 +00:00
83c93d5afd
Fix a (harmless) but where vregs were added to the used reg lists for
...
inline asms.
Fix PR2078 by marking aliases of registers used when a register is
marked used. This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.
llvm-svn: 47426
2008-02-21 04:55:52 +00:00
0aa9f2a7f3
XFAIL this for now.
...
llvm-svn: 47355
2008-02-20 02:38:58 +00:00
a0b1cc41ef
this test requires sse2
...
llvm-svn: 47331
2008-02-19 18:07:46 +00:00
97b9662f78
Don't fold and's into test instructions if they have multiple uses.
...
This compiles test-nofold.ll into:
_test:
movl $15, %ecx
andl 4(%esp), %ecx
testl %ecx, %ecx
movl $42, %eax
cmove %ecx, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl %eax, %ecx
andl $15, %ecx
testl $15, %eax
movl $42, %eax
cmove %ecx, %eax
ret
llvm-svn: 47330
2008-02-19 17:37:35 +00:00
08162d9515
rename tests to avoid a test- prefix when they aren't related to the test instruction.
...
llvm-svn: 47329
2008-02-19 17:33:52 +00:00
a99d8b5a9a
Remove llvm-upgrade and update tests.
...
llvm-svn: 47325
2008-02-19 08:07:33 +00:00
0e2e21b8b9
Don't spew stats to stderr.
...
llvm-svn: 47308
2008-02-19 03:11:47 +00:00
b54a803a2e
Fix up the run line for this new test.
...
llc: for the -info-output-file option: requires a value!
llvm-svn: 47306
2008-02-19 02:58:36 +00:00
634a8f9275
New test.
...
llvm-svn: 47302
2008-02-19 02:09:58 +00:00
3f04773f78
Remove llvm-upgrade and update tests.
...
llvm-svn: 47296
2008-02-19 01:41:04 +00:00
6200c225e0
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
...
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
llvm-svn: 47290
2008-02-18 23:04:32 +00:00
a589ee11bb
Don't mark scalar integer multiplication as Expand on x86, since x86
...
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.
This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.
llvm-svn: 47277
2008-02-18 17:55:26 +00:00
f697c03883
Remove llvm-upgrade.
...
llvm-svn: 47238
2008-02-17 20:02:20 +00:00
9b254eed32
llvm.memory.barrier, and impl for x86 and alpha
...
llvm-svn: 47204
2008-02-16 01:24:58 +00:00
6edbbe0c25
This test is not interesting.
...
llvm-svn: 47189
2008-02-15 23:06:21 +00:00
558a3ba17f
Fix a miscompilation from Dan's recent apintification.
...
llvm-svn: 47128
2008-02-14 18:48:56 +00:00
3bd37f549a
This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
...
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
a4621f04bb
Fix test.
...
llvm-svn: 47102
2008-02-14 01:32:53 +00:00
f8d29f228d
Teach LegalizeTypes how to expand and promote CTLZ,
...
CTTZ and CTPOP. The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it. I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it. The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select. This also means the value doesn't
need to be zero extended.
llvm-svn: 47075
2008-02-13 18:01:53 +00:00
a08af08a88
In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
...
node as soon as we create it in SDISel. Previously we would lower it in
legalize. The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them. This causes us to miss some optimizations because
datatype expansion also happens here.
Exposing the loads early allows us to do optimizations on them. For example
we now compile arg-cast.ll to:
_foo:
movl $2147483647, %eax
andl 8(%esp), %eax
ret
where we previously produced:
_foo:
subl $12, %esp
movsd 16(%esp), %xmm0
movsd %xmm0, (%esp)
movl $2147483647, %eax
andl 4(%esp), %eax
addl $12, %esp
ret
It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.
llvm-svn: 47054
2008-02-13 07:39:09 +00:00
fe61967361
Add testcase for recent legalizer change
...
llvm-svn: 47049
2008-02-13 06:48:40 +00:00
ea8530d82c
New tests.
...
llvm-svn: 47047
2008-02-13 03:23:53 +00:00
724029151b
Don't mask the isel bug.
...
llvm-svn: 47018
2008-02-12 19:11:29 +00:00
3069a26f63
This test assumes no SSE4.1.
...
llvm-svn: 47017
2008-02-12 19:11:08 +00:00
b21301fbe7
Fix some test cases.
...
llvm-svn: 46998
2008-02-12 07:22:46 +00:00
ad4d57a2f5
Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards.
...
llvm-svn: 46953
2008-02-11 08:30:52 +00:00
43a2ed8611
Alignment of struct containing vectors depends on
...
whether SSE is present, on Darwin anyway. Make it
explicit.
llvm-svn: 46909
2008-02-09 19:04:25 +00:00
3b3286d4bc
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
...
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
8d59dd119b
Added missing entries in X86 load / store folding tables.
...
llvm-svn: 46866
2008-02-08 00:12:56 +00:00
a20a773654
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
...
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
llvm-svn: 46850
2008-02-07 08:53:49 +00:00
127b41500c
It's PR1925, not PR1609.
...
llvm-svn: 46825
2008-02-06 22:07:17 +00:00
1ec748c784
Fix a number of local register allocator issues: PR1609.
...
llvm-svn: 46821
2008-02-06 19:16:53 +00:00
87fbd66f9f
Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
...
llvm-svn: 46776
2008-02-05 22:50:29 +00:00
8d78b0597b
If a vr is already marked alive in a bb, then it has PHI uses that are visited earlier, then it is not killed in the def block (i.e. not dead).
...
llvm-svn: 46763
2008-02-05 20:04:18 +00:00
3342d4083f
Crashes LegalizeTypes with "Do not know how to
...
expand the result of this operator!" (node: ctlz).
llvm-svn: 46713
2008-02-04 18:07:02 +00:00
ff1a444879
Crashes LegalizeTypes with "Do not know how to split
...
this operator's operand" (node: extract_subvector).
llvm-svn: 46712
2008-02-04 18:05:42 +00:00
69f90ccb17
remove target triple to make this test more "generic"
...
llvm-svn: 46711
2008-02-04 18:02:37 +00:00
331cd706f5
Crashed the new type legalizer. Not likely to catch
...
any bugs in the future since to get the crash you also
need hacked in fake libcall support (which creates odd
but legal trees), but since adding it doesn't hurt...
Thanks to Chris for this ultimately reduced version.
llvm-svn: 46706
2008-02-04 09:40:27 +00:00
192c07b727
CBackend: Implement unaligned load/store.
...
llvm-svn: 46646
2008-02-01 21:25:59 +00:00
f4e5e556fd
Add target triples to these so they don't fail on linux.
...
llvm-svn: 46496
2008-01-29 06:26:07 +00:00
ceae3bbf4d
Overhaul Cell SPU's addressing mode internals so that there are now
...
only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.
Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.
llvm-svn: 46483
2008-01-29 02:16:57 +00:00
34d6b6a319
Update this test. Due to dag combiner improvements, we now compile
...
f7/f11 to:
_f7:
eor r0, r0, #2 , 2 @ -2147483648
bx lr
_f11:
bic r0, r0, #2 , 2 @ -2147483648
bx lr
instead of:
_f7:
fmsr s0, r0
fnegs s0, s0
fmrs r0, s0
bx lr
_f11:
fmsr s0, r0
fabss s0, s0
fmrs r0, s0
bx lr
llvm-svn: 46423
2008-01-27 23:26:37 +00:00
888560d62c
Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
...
registers if used by a bitconvert or using a bitconvert. This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway. For example, we now
compile CodeGen/X86/fp-in-intregs.ll to:
_test1:
movl $2147483648, %eax
xorl 4(%esp), %eax
ret
_test2:
movl $1065353216, %eax
orl 4(%esp), %eax
andl $3212836864, %eax
ret
Instead of:
_test1:
movss 4(%esp), %xmm0
xorps LCPI2_0, %xmm0
movd %xmm0, %eax
ret
_test2:
movss 4(%esp), %xmm0
andps LCPI3_0, %xmm0
movss LCPI3_1, %xmm1
andps LCPI3_2, %xmm1
orps %xmm0, %xmm1
movd %xmm1, %eax
ret
bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.
llvm-svn: 46414
2008-01-27 17:42:27 +00:00
596704405f
New test to verify that "merging 4 loads into a vec load" continues to work and
...
continues to infer alignment info.
llvm-svn: 46403
2008-01-26 20:06:45 +00:00
e30e33af4f
Infer alignment of loads and increase their alignment when we can tell they are
...
from the stack. This allows us to compile stack-align.ll to:
_test:
movsd LCPI1_0, %xmm0
movapd %xmm0, %xmm1
*** andpd 4(%esp), %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test:
movsd LCPI1_0, %xmm0
** movsd 4(%esp), %xmm1
** andpd %xmm0, %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
llvm-svn: 46401
2008-01-26 19:45:50 +00:00
364963d41c
remove a useless xfailed test.
...
llvm-svn: 46400
2008-01-26 19:35:46 +00:00
1a17ef02c8
If there's no instructions being emitted on X86 for a function, emit a
...
nop. Emit the nop directly for PPC.
llvm-svn: 46398
2008-01-26 09:03:52 +00:00
a60c61dc1a
Need to convert to LLVM code and not C.
...
llvm-svn: 46397
2008-01-26 06:56:08 +00:00
0b973210f8
Rename the .c to .ll
...
llvm-svn: 46396
2008-01-26 06:53:40 +00:00
0f69974fdb
Move testcase to the code gen directory.
...
llvm-svn: 46395
2008-01-26 06:53:06 +00:00
31e9edce1c
Fix some bugs in SimplifyNodeWithTwoResults where it would call deletenode to
...
delete a node even if it was not dead in some cases. Instead, just add it to
the worklist. Also, make sure to use the CombineTo methods, as it was doing
things that were unsafe: the top level combine loop could touch dangling memory.
This fixes CodeGen/Generic/2008-01-25-dag-combine-mul.ll
llvm-svn: 46384
2008-01-26 01:09:19 +00:00
84ab724e06
Add target-specific dag combines for FAND(x,0) and FOR(x,0). This allows
...
us to compile:
double test(double X) {
return copysign(0.0, X);
}
into:
_test:
andpd LCPI1_0(%rip), %xmm0
ret
instead of:
_test:
pxor %xmm1, %xmm1
andpd LCPI1_0(%rip), %xmm1
movapd %xmm0, %xmm2
andpd LCPI1_1(%rip), %xmm2
movapd %xmm1, %xmm0
orpd %xmm2, %xmm0
ret
llvm-svn: 46344
2008-01-25 05:46:26 +00:00
a91f77eaac
Significantly simplify and improve handling of FP function results on x86-32.
...
This case returns the value in ST(0) and then has to convert it to an SSE
register. This causes significant codegen ugliness in some cases. For
example in the trivial fp-stack-direct-ret.ll testcase we used to generate:
_bar:
subl $28, %esp
call L_foo$stub
fstpl 16(%esp)
movsd 16(%esp), %xmm0
movsd %xmm0, 8(%esp)
fldl 8(%esp)
addl $28, %esp
ret
because we move the result of foo() into an XMM register, then have to
move it back for the return of bar.
Instead of hacking ever-more special cases into the call result lowering code
we take a much simpler approach: on x86-32, fp return is modeled as always
returning into an f80 register which is then truncated to f32 or f64 as needed.
Similarly for a result, we model it as an extension to f80 + return.
This exposes the truncate and extensions to the dag combiner, allowing target
independent code to hack on them, eliminating them in this case. This gives
us this code for the example above:
_bar:
subl $12, %esp
call L_foo$stub
addl $12, %esp
ret
The nasty aspect of this is that these conversions are not legal, but we want
the second pass of dag combiner (post-legalize) to be able to hack on them.
To handle this, we lie to legalize and say they are legal, then custom expand
them on entry to the isel pass (PreprocessForFPConvert). This is gross, but
less gross than the code it is replacing :)
This also allows us to generate better code in several other cases. For
example on fp-stack-ret-conv.ll, we now generate:
_test:
subl $12, %esp
call L_foo$stub
fstps 8(%esp)
movl 16(%esp), %eax
cvtss2sd 8(%esp), %xmm0
movsd %xmm0, (%eax)
addl $12, %esp
ret
where before we produced (incidentally, the old bad code is identical to what
gcc produces):
_test:
subl $12, %esp
call L_foo$stub
fstpl (%esp)
cvtsd2ss (%esp), %xmm0
cvtss2sd %xmm0, %xmm0
movl 16(%esp), %eax
movsd %xmm0, (%eax)
addl $12, %esp
ret
Note that we generate slightly worse code on pr1505b.ll due to a scheduling
deficiency that is unrelated to this patch.
llvm-svn: 46307
2008-01-24 08:07:48 +00:00
001d781c41
take these with a pr #
...
llvm-svn: 46303
2008-01-24 06:35:44 +00:00
35abd840a6
Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.
...
llvm-svn: 46286
2008-01-23 23:17:41 +00:00
1e0d4d2aa8
SSE varargs arguments are passed in memory.
...
llvm-svn: 46262
2008-01-22 23:26:53 +00:00
5c94cb3596
Implement flt_rounds for PowerPC.
...
llvm-svn: 46174
2008-01-18 19:55:37 +00:00
1b35211fcc
remove extraneous &&'s from tests, as Scott is apparently not going to.
...
llvm-svn: 46173
2008-01-18 19:53:43 +00:00
4768c3c9b6
Test is correct again for the moment.
...
llvm-svn: 46172
2008-01-18 19:53:31 +00:00
f5b46f7dad
Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:
...
_test:
fctiwz f0, f1
stfiwx f0, 0, r4
blr
instead of:
_test:
fctiwz f0, f1
stfd f0, -8(r1)
nop
nop
lwz r2, -4(r1)
stb r2, 0(r4)
blr
The former is not correct (stores 4 bytes, not 1).
llvm-svn: 46161
2008-01-18 16:54:56 +00:00
e4d3e3c0e7
Forward progress: crtbegin.c now compiles successfully!
...
Fixed CellSPU's A-form (local store) address mode, so that all globals,
externals, constant pool and jump table symbols are now wrapped within
a SPUISD::AFormAddr pseudo-instruction. This now identifies all local
store memory addresses, although it requires a bit of legerdemain during
instruction selection to properly select loads to and stores from local
store, properly generating "LQA" instructions.
Also added mul_ops.ll test harness for exercising integer multiplication.
llvm-svn: 46142
2008-01-17 20:38:41 +00:00
1ea55cf816
This commit changes:
...
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
llvm-svn: 46140
2008-01-17 19:59:44 +00:00
9f7fed1c1b
new testcase.
...
llvm-svn: 46139
2008-01-17 19:47:23 +00:00
89126bde19
add testcase that has been sitting in my tree for awhile.
...
llvm-svn: 46124
2008-01-17 06:54:09 +00:00
54c20b559e
When a live virtual register is being clobbered by an implicit def, it is spilled
...
and the spill is its kill. However, if the local allocator has determined the
register has not been modified (possible when its value was reloaded), it would
not issue a restore. In that case, mark the last use of the virtual register as
kill.
llvm-svn: 46111
2008-01-17 02:08:17 +00:00
7be1528004
Fixes a nasty dag combiner bug that causes a bunch of tests to fail at -O0.
...
It's not safe to use the two value CombineTo variant to combine away a dead load.
e.g.
v1, chain2 = load chain1, loc
v2, chain3 = load chain2, loc
v3 = add v2, c
Now we replace use of v1 with undef, use of chain2 with chain1.
ReplaceAllUsesWith() will iterate through uses of the first load and update operands:
v1, chain2 = load chain1, loc
v2, chain3 = load chain1, loc
v3 = add v2, c
Now the second load is the same as the first load, SelectionDAG cse will ensure
the use of second load is replaced with the first load.
v1, chain2 = load chain1, loc
v3 = add v1, c
Then v1 is replaced with undef and bad things happen.
llvm-svn: 46099
2008-01-16 23:11:54 +00:00
32b0ff6814
Trampoline support for x86-64. This looks like
...
it should work, but I have no machine to test
it on. Committed because it will at least
cause no harm, and maybe someone can test it
for me!
llvm-svn: 46098
2008-01-16 22:55:25 +00:00
aebbe4700a
add testcase for regression
...
llvm-svn: 46073
2008-01-16 18:03:52 +00:00
6e3379c07b
make sure to use a cpu that has sse.
...
llvm-svn: 46060
2008-01-16 06:32:02 +00:00
8f7cec859e
My previous commit had an incomplete message, it should have been:
...
make the 'fp return in ST(0)' optimization smart enough to
look through token factor nodes. THis allows us to compile
testcases like CodeGen/X86/fp-stack-retcopy.ll into:
_carg:
subl $12, %esp
call L_foo$stub
fstpl (%esp)
fldl (%esp)
addl $12, %esp
ret
instead of:
_carg:
subl $28, %esp
call L_foo$stub
fstpl 16(%esp)
movsd 16(%esp), %xmm0
movsd %xmm0, 8(%esp)
fldl 8(%esp)
addl $28, %esp
ret
Still not optimal, but much better and this is a trivial patch. Fixing
the rest requires invasive surgery that is is not llvm 2.2 material.
llvm-svn: 46054
2008-01-16 05:56:59 +00:00
915ec14073
verify x86 generates ud2 for llvm.trap
...
llvm-svn: 46023
2008-01-15 22:22:02 +00:00
50baecd31e
new testcase for llvm.trap.
...
llvm-svn: 46020
2008-01-15 22:17:26 +00:00
a8f67e04bd
More CellSPU refinements:
...
- struct_2.ll: Completely unaligned load/store testing
- call_indirect.ll, struct_1.ll: Add test lines to exercise
X-form [$reg($reg)] addressing
At this point, loads and stores should be under control (he says
in an optimistic tone of voice.)
llvm-svn: 45882
2008-01-11 21:01:19 +00:00
04b99780cf
Disable for now.
...
llvm-svn: 45881
2008-01-11 20:47:33 +00:00
8d5841ae3c
More CellSPU refinement and progress:
...
- Cleaned up custom load/store logic, common code is now shared [see note
below], cleaned up address modes
- More test cases: various intrinsics, structure element access (load/store
test), updated target data strings, indirect function calls.
Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode
structures: they now share a common base class, LSBaseSDNode, that
provides an interface to their common functionality. There is some hackery
to access the proper operand depending on the derived class; otherwise,
to do a proper job would require finding and rearranging the SDOperands
sent to StoreSDNode's constructor. The current refactor errs on the
side of being conservatively and backwardly compatible while providing
functionality that reduces redundant code for targets where loads and
stores are custom-lowered.
llvm-svn: 45851
2008-01-11 02:53:15 +00:00
53c954fa86
Output sinl for a long double FSIN node, not sin.
...
Likewise fix up a bunch of other libcalls. While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere. This fixes 9 Ada ACATS failures.
llvm-svn: 45833
2008-01-10 10:28:30 +00:00
0f8c7c4a73
Codegen improvement has reduced one spill.
...
llvm-svn: 45814
2008-01-10 02:54:40 +00:00
e34d7d0e24
new testcase for PR1845
...
llvm-svn: 45795
2008-01-10 00:30:38 +00:00
0e400d4cb7
Special copy SUnit's do not have SDNode's.
...
llvm-svn: 45787
2008-01-09 23:01:55 +00:00
a31824a08e
Fix sse2.psrl.w and sse2.psrl.q definitions.
...
llvm-svn: 45772
2008-01-09 02:16:44 +00:00
51b01bf8a5
Make load->store deletion a bit smarter. This allows us to compile this:
...
void test(long long *P) { *P ^= 1; }
into just:
_test:
movl 4(%esp), %eax
xorl $1, (%eax)
ret
instead of code like this:
_test:
movl 4(%esp), %ecx
xorl $1, (%ecx)
movl 4(%ecx), %edx
movl %edx, 4(%ecx)
ret
llvm-svn: 45762
2008-01-08 23:08:06 +00:00
7b1460cca4
Crashes llc when using Chris's new legalization logic.
...
llvm-svn: 45758
2008-01-08 21:51:53 +00:00
b17db3afa8
remove darwin/i386 t-t
...
llvm-svn: 45743
2008-01-08 06:52:51 +00:00
89f36e6b21
Finally implement correct ordered comparisons for PPC, even though
...
the code generated is not wonderful. This turns a miscompilation into
a code quality bug (noted in the ppc readme). This fixes PR642, which
is over 2 years old (!). Nate, please review this.
llvm-svn: 45742
2008-01-08 06:46:30 +00:00
d3d49df3f1
Update test to catch recent x86 insert regression and improvements
...
llvm-svn: 45705
2008-01-07 17:49:23 +00:00
c7e991b7c3
Setting GlobalDirective in TargetAsmInfo by default rather than
...
providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.
llvm-svn: 45676
2008-01-07 02:31:11 +00:00
6047b6e140
With this patch, the LowerGC transformation becomes the
...
ShadowStackCollector, which additionally has reduced overhead with
no sacrifice in portability.
Considering a function @fun with 8 loop-local roots,
ShadowStackCollector introduces the following overhead
(x86):
; shadowstack prologue
movl L_llvm_gc_root_chain$non_lazy_ptr, %eax
movl (%eax), %ecx
movl $___gc_fun, 20(%esp)
movl $0, 24(%esp)
movl $0, 28(%esp)
movl $0, 32(%esp)
movl $0, 36(%esp)
movl $0, 40(%esp)
movl $0, 44(%esp)
movl $0, 48(%esp)
movl $0, 52(%esp)
movl %ecx, 16(%esp)
leal 16(%esp), %ecx
movl %ecx, (%eax)
; shadowstack loop overhead
(none)
; shadowstack epilogue
movl 48(%esp), %edx
movl %edx, (%ecx)
; shadowstack metadata
.align 3
___gc_fun: # __gc_fun
.long 8
.space 4
In comparison to LowerGC:
; lowergc prologue
movl L_llvm_gc_root_chain$non_lazy_ptr, %eax
movl (%eax), %ecx
movl %ecx, 48(%esp)
movl $8, 52(%esp)
movl $0, 60(%esp)
movl $0, 56(%esp)
movl $0, 68(%esp)
movl $0, 64(%esp)
movl $0, 76(%esp)
movl $0, 72(%esp)
movl $0, 84(%esp)
movl $0, 80(%esp)
movl $0, 92(%esp)
movl $0, 88(%esp)
movl $0, 100(%esp)
movl $0, 96(%esp)
movl $0, 108(%esp)
movl $0, 104(%esp)
movl $0, 116(%esp)
movl $0, 112(%esp)
; lowergc loop overhead
leal 44(%esp), %eax
movl %eax, 56(%esp)
leal 40(%esp), %eax
movl %eax, 64(%esp)
leal 36(%esp), %eax
movl %eax, 72(%esp)
leal 32(%esp), %eax
movl %eax, 80(%esp)
leal 28(%esp), %eax
movl %eax, 88(%esp)
leal 24(%esp), %eax
movl %eax, 96(%esp)
leal 20(%esp), %eax
movl %eax, 104(%esp)
leal 16(%esp), %eax
movl %eax, 112(%esp)
; lowergc epilogue
movl 48(%esp), %edx
movl %edx, (%ecx)
; lowergc metadata
(none)
llvm-svn: 45670
2008-01-07 01:30:53 +00:00
41e423a6f5
fix this to use a valid triple.
...
llvm-svn: 45509
2008-01-02 22:21:45 +00:00
5d998c5712
verify that aligned common support doesn't break.
...
llvm-svn: 45495
2008-01-02 19:48:24 +00:00
57a60f0466
Fix PR1833 - eh.exception and eh.selector return two
...
values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...
llvm-svn: 45472
2007-12-31 18:35:50 +00:00
d2b8a36f0e
One readme entry is done, one is really easy (Evan, want to investigate
...
eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.
llvm-svn: 45407
2007-12-29 19:31:47 +00:00
0d90c8f016
upgrade this test
...
llvm-svn: 45406
2007-12-29 19:24:06 +00:00
3b6a82118b
Fold comparisons against a constant nan, and optimize ORD/UNORD
...
comparisons with a constant. This allows us to compile isnan to:
_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
instead of:
LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 45405
2007-12-29 08:37:08 +00:00
33de0c6e92
this xform is implemented.
...
llvm-svn: 45404
2007-12-29 08:19:39 +00:00
07ccbfa64a
Codegen:
...
as:
_bar:
pushl %esi
subl $8, %esp
movl 16(%esp), %esi
call L_foo$stub
fstps (%esi)
addl $8, %esp
popl %esi
#FP_REG_KILL
ret
instead of:
_bar:
pushl %esi
subl $8, %esp
movl 16(%esp), %esi
call L_foo$stub
fstpl (%esi)
cvtsd2ss (%esi), %xmm0
movss %xmm0, (%esi)
addl $8, %esp
popl %esi
#FP_REG_KILL
ret
llvm-svn: 45401
2007-12-29 06:57:38 +00:00
8013bd339b
avoid going through a stack slot to convert from fpstack to xmm reg
...
if we are just going to store it back anyway. This improves things
like:
double foo();
void bar(double *P) { *P = foo(); }
llvm-svn: 45399
2007-12-29 06:41:28 +00:00
bc13df19a8
one fewer uncond branch with my codegenprepare hack for single-mbb backedges.
...
llvm-svn: 45360
2007-12-26 17:23:47 +00:00
d89e645c38
Tests for changes made in r45356, where IPO optimizations would drop
...
collector algorithms.
llvm-svn: 45357
2007-12-26 02:47:37 +00:00
b969c5981b
GC poses hazards to the inliner. Consider:
...
define void @f() {
...
call i32 @g()
...
}
define void @g() {
...
}
The hazards are:
- @f and @g have GC, but they differ GC. Inlining is invalid. This
may never occur.
- @f has no GC, but @g does. g's GC must be propagated to @f.
The other scenarios are safe:
- @f and @g have the same GC.
- @f and @g have no GC.
- @g has no GC.
This patch adds inliner checks for the former two scenarios.
llvm-svn: 45351
2007-12-25 03:10:07 +00:00
fb56bde933
Noting and enforcing that GC intrinsics are valid only within a
...
function with GC.
This will catch the error when the inliner inlines a function with
GC into a caller with no GC.
llvm-svn: 45350
2007-12-25 02:31:26 +00:00
9157c499fc
Adjusting verification of "llvm.gc*" intrinsic prototypes to match
...
LangRef.
llvm-svn: 45349
2007-12-25 02:02:10 +00:00
ddc9af11f0
Remove xfail. This is fixed.
...
llvm-svn: 45254
2007-12-20 02:25:21 +00:00
5f1470f03a
More working CellSPU tests:
...
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads
llvm-svn: 45242
2007-12-20 00:44:13 +00:00
5ecac82f71
CellSPU testcase, extract_elt.ll: extract vector element.
...
llvm-svn: 45219
2007-12-19 21:17:42 +00:00
a246e09aa0
More working CellSPU test cases:
...
- call.ll: Function call
- ctpop.ll: Count population
- dp_farith.ll: DP arithmetic
- eqv.ll: Equivalence primitives
- fcmp.ll: SP comparisons
- fdiv.ll: SP division
- fneg-fabs.ll: SP negation, aboslute value
- int2fp.ll: Integer -> SP conversion
- rotate_ops.ll: Rotation primitives
- select_bits.ll: (a & c) | (b & ~c) bit selection
- shift_ops.ll: Shift primitives
- sp_farith.ll: SP arithmentic
llvm-svn: 45217
2007-12-19 20:50:49 +00:00
098c113bc8
Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll
...
(vector insertions)
llvm-svn: 45216
2007-12-19 20:15:47 +00:00
9b834469e0
Add new immed16.ll test case, fix CellSPU errata to make test case work.
...
llvm-svn: 45196
2007-12-19 07:35:06 +00:00
483a969ece
Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
...
llvm-svn: 45167
2007-12-18 19:38:14 +00:00
91e0fc9cb4
FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
...
llvm-svn: 45157
2007-12-18 08:42:10 +00:00
8172f85e2f
i32 immediate constant test case for CellSPU
...
llvm-svn: 45134
2007-12-17 23:45:52 +00:00
c5cccb9e60
- Restore some i8 functionality in CellSPU
...
- New test case: nand.ll
llvm-svn: 45130
2007-12-17 22:32:34 +00:00
b5a79d0eaa
Make invokes of inline asm legal. Teach codegen
...
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).
llvm-svn: 45108
2007-12-17 18:08:19 +00:00
23d2d4dc6c
Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.
...
llvm-svn: 45058
2007-12-15 03:00:47 +00:00
0aa7133f82
Start committing working test cases for CellSPU.
...
llvm-svn: 45050
2007-12-15 00:38:50 +00:00
0e6408124e
Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero.
...
llvm-svn: 45029
2007-12-14 08:30:15 +00:00
e9fbc3f014
Implement ctlz and cttz with bsr and bsf.
...
llvm-svn: 45024
2007-12-14 02:13:44 +00:00
37c36ed79a
Be extra careful with extension use optimation. Now turned on by default.
...
llvm-svn: 44981
2007-12-13 03:32:53 +00:00
827d30db19
Fold some and + shift in x86 addressing mode.
...
llvm-svn: 44970
2007-12-13 00:43:27 +00:00
6e68381e02
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
...
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
7a7742c2fe
Allow vector integer constants to be created with
...
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
llvm-svn: 44954
2007-12-12 22:21:26 +00:00
0f42730722
Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64.
...
llvm-svn: 44929
2007-12-12 07:55:34 +00:00
0a1254f634
Add a test case for -optimize-ext-uses.
...
llvm-svn: 44928
2007-12-12 07:54:08 +00:00
2a98956796
Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part.
...
llvm-svn: 44921
2007-12-12 06:45:40 +00:00
4fbf459549
- Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as
...
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
(i32 extract_vector_element 0) does not require a pextrw.
llvm-svn: 44836
2007-12-11 01:46:18 +00:00
d202e03fe5
Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
...
llvm-svn: 44785
2007-12-10 07:24:06 +00:00
71183b6739
Adding a collector name attribute to Function in the IR. These
...
methods are new to Function:
bool hasCollector() const;
const std::string &getCollector() const;
void setCollector(const std::string &);
void clearCollector();
The assembly representation is as such:
define void @f() gc "shadow-stack" { ...
The implementation uses an on-the-side table to map Functions to
collector names, such that there is no overhead. A StringPool is
further used to unique collector names, which are extremely
likely to be unique per process.
llvm-svn: 44769
2007-12-10 03:18:06 +00:00
ad80af9677
Upgrading this test to 2.0 .ll syntax.
...
llvm-svn: 44738
2007-12-09 15:03:01 +00:00
f47015bc74
Fix a significant code quality regression I introduced on PPC64 quite
...
a while ago. We now produce:
_foo:
mflr r0
std r0, 16(r1)
ld r2, 16(r1)
std r2, 0(r3)
ld r0, 16(r1)
mtlr r0
blr
instead of:
_foo:
mflr r0
std r0, 16(r1)
lis r0, 0
ori r0, r0, 16
ldx r2, r1, r0
std r2, 0(r3)
ld r0, 16(r1)
mtlr r0
blr
for:
void foo(void **X) {
*X = __builtin_return_address(0);
}
on ppc64.
llvm-svn: 44701
2007-12-08 07:04:58 +00:00
f6a8156e4f
implement __builtin_return_addr(0) on ppc.
...
llvm-svn: 44700
2007-12-08 06:59:59 +00:00
bfd373a53e
Much improved v8i16 shuffles. (Step 1).
...
llvm-svn: 44676
2007-12-07 08:07:39 +00:00
26593a04db
New test case.
...
llvm-svn: 44672
2007-12-07 01:48:46 +00:00
5cb41390ab
Fix a bogus test case.
...
llvm-svn: 44668
2007-12-06 22:12:45 +00:00
8393dc7378
Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta.
...
llvm-svn: 44660
2007-12-06 08:54:31 +00:00
eedaf92fcf
third time around: instead of disabling this completely,
...
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
llvm-svn: 44658
2007-12-06 07:47:55 +00:00
b5fdfb9612
Actually, disable this code for now. More analysis and improvements to
...
the X86 backend are needed before this should be enabled by default.
llvm-svn: 44657
2007-12-06 07:44:31 +00:00
7c709a5d08
implement a readme entry, compiling the code into:
...
_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
llvm-svn: 44656
2007-12-06 07:33:36 +00:00
dfa39289a5
fix this when run on non x86 hosts.
...
llvm-svn: 44645
2007-12-06 01:05:52 +00:00
7fc1d98353
Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.
...
llvm-svn: 44644
2007-12-06 00:01:56 +00:00
69fda0a716
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
...
llvm-svn: 44479
2007-12-01 02:07:52 +00:00
b10dc27b20
Do not fold reload into an instruction with multiple uses. It issues one extra load.
...
llvm-svn: 44467
2007-11-30 21:23:43 +00:00
37ed3e6320
Update tests.
...
llvm-svn: 44435
2007-11-29 10:03:54 +00:00
f4769da4b3
upgrade this test
...
llvm-svn: 44405
2007-11-28 18:22:12 +00:00
e499816a23
xfail a test
...
llvm-svn: 44395
2007-11-28 05:37:13 +00:00
e04dc1fa4d
update this test after the fmrrd fix
...
llvm-svn: 44393
2007-11-28 05:27:07 +00:00
8f342f8ef3
Fix bug in regression tests that ignored stderr output in RUN lines. Updated tests and fixed broken run lines.
...
XFAILed 3 arm regressions (will file bugs)
llvm-svn: 44389
2007-11-28 04:57:00 +00:00
f247e27666
commit testcase I forgot to svn add.
...
llvm-svn: 44383
2007-11-27 22:43:37 +00:00
79ae9895f6
Fix a crash on invalid code due to memcpy lowering.
...
llvm-svn: 44378
2007-11-27 22:14:42 +00:00
b960acebde
something wrong with this opt
...
llvm-svn: 44370
2007-11-27 18:31:30 +00:00
f151c8e760
Remove unnecessary && from the RUN lines of this test.
...
llvm-svn: 44342
2007-11-27 00:03:38 +00:00
9a69341725
Don't lower srem/urem X%C to X-X/C*C unless the division is actually
...
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.
llvm-svn: 44341
2007-11-26 23:46:11 +00:00
5728bdd4db
Fix a long standing deficiency in the X86 backend: we would
...
sometimes emit "zero" and "all one" vectors multiple times,
for example:
_test2:
pcmpeqd %mm0, %mm0
movq %mm0, _M1
pcmpeqd %mm0, %mm0
movq %mm0, _M2
ret
instead of:
_test2:
pcmpeqd %mm0, %mm0
movq %mm0, _M1
movq %mm0, _M2
ret
This patch fixes this by always arranging for zero/one vectors
to be defined as v4i32 or v2i32 (SSE/MMX) instead of letting them be
any random type. This ensures they get trivially CSE'd on the dag.
This fix is also important for LegalizeDAGTypes, as it gets unhappy
when the x86 backend wants BUILD_VECTOR(i64 0) to be legal even when
'i64' isn't legal.
This patch makes the following changes:
1) X86TargetLowering::LowerBUILD_VECTOR now lowers 0/1 vectors into
their canonical types.
2) The now-dead patterns are removed from the SSE/MMX .td files.
3) All the patterns in the .td file that referred to immAllOnesV or
immAllZerosV in the wrong form now use *_bc to match them with a
bitcast wrapped around them.
4) X86DAGToDAGISel::SelectScalarSSELoad is generalized to handle
bitcast'd zero vectors, which simplifies the code actually.
5) getShuffleVectorZeroOrUndef is updated to generate a shuffle that
is legal, instead of generating one that is illegal and expecting
a later legalize pass to clean it up.
6) isZeroShuffle is generalized to handle bitcast of zeros.
7) several other minor tweaks.
This patch is definite goodness, but has the potential to cause random
code quality regressions. Please be on the lookout for these and let
me know if they happen.
llvm-svn: 44310
2007-11-25 00:24:49 +00:00
f5dfd15e98
upgrade this test
...
llvm-svn: 44298
2007-11-24 05:39:29 +00:00
b87dde7e8e
Fix a bug in which node A is replaced by node B, but later
...
node A gets back into the DAG again because it was hiding in
one of the node maps: make sure that node replacement happens
in those maps too.
llvm-svn: 44263
2007-11-21 16:43:19 +00:00
6edac0ad1d
Testcase for PR1811
...
llvm-svn: 44244
2007-11-19 21:43:22 +00:00
36347a26f9
Add support in SplitVectorOp for remainder operators.
...
llvm-svn: 44233
2007-11-19 15:15:03 +00:00
861302e264
fix bogus test that the more strict lexer is finding.
...
llvm-svn: 44216
2007-11-18 18:26:45 +00:00
13e8b022f5
Typo.
...
llvm-svn: 44196
2007-11-16 23:55:08 +00:00
a674612d94
Testcase from PR 1508 (although its's somewhat
...
orthogonal to the main problem there)
llvm-svn: 44194
2007-11-16 23:16:35 +00:00
2c1a50455c
Fix a thinko in post-allocation coalescer.
...
llvm-svn: 44166
2007-11-15 08:13:29 +00:00
2c6387803e
Fix PIC jump table codegen on x86-32/linux. In fact, such thing should be applied
...
to all targets uses GOT-relative offsets for PIC (Alpha?)
llvm-svn: 44108
2007-11-14 09:18:41 +00:00
d2c16ff905
Update tailcall code to include inline attribute operand for memcpy.
...
llvm-svn: 43978
2007-11-10 10:48:01 +00:00
05b94b8c13
Fix tests.
...
llvm-svn: 43961
2007-11-09 20:46:00 +00:00
f6a67bf700
[ARM] Implement __builtin_thread_pointer.
...
llvm-svn: 43892
2007-11-08 17:20:05 +00:00
ece4c68b82
If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
...
llvm-svn: 43888
2007-11-08 09:25:29 +00:00
2dbffa4e76
Add pseudo dependency to force two-address instruction to be scheduled after
...
other uses. There was a overly restricted check that prevented some obvious
cases.
llvm-svn: 43762
2007-11-06 08:44:59 +00:00
08143e397d
Add support for vector remainder operations.
...
llvm-svn: 43744
2007-11-05 23:35:22 +00:00
4646aa3e33
Make labels work in asm blocks; allow labels as
...
parameters. Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.
llvm-svn: 43734
2007-11-05 21:20:28 +00:00
1a30c18e88
[ARM] Fix code generation for:
...
static __thread struct {
int a;
int b;
} teste = {0, 0};
llvm-svn: 43722
2007-11-05 18:33:37 +00:00
17b0e3e1ae
Skip over deleted val#'s.
...
llvm-svn: 43700
2007-11-05 06:46:45 +00:00
a406b47f14
Handle cases where a register and one of its super-register are both marked as
...
defined on the same instruction. This fixes PR1767.
llvm-svn: 43699
2007-11-05 03:11:55 +00:00
e12363dac5
Fix test case. Chris didn't do make check. :-)
...
llvm-svn: 43698
2007-11-05 03:04:26 +00:00
c68023a955
Doh. PR1187 -> PR1766.
...
llvm-svn: 43693
2007-11-05 01:00:44 +00:00
a8044084ac
Fix PR1187.
...
llvm-svn: 43692
2007-11-05 00:59:10 +00:00
9329e780cd
Fix PR1761 by not printing (rip) suffix when in -static mode.
...
Evan, please review this.
llvm-svn: 43680
2007-11-04 19:23:28 +00:00
296160d443
Fix PR1763 by allowing the 'q' constraint to work with 64-bit
...
regs on x86-64.
llvm-svn: 43669
2007-11-04 06:51:12 +00:00
66298e226f
There are times when the coalescer would not coalesce away a copy but the copy
...
can be eliminated by the allocator is the destination and source targets the
same register. The most common case is when the source and destination registers
are in different class. For example, on x86 mov32to32_ targets GR32_ which
contains a subset of the registers in GR32.
The allocator can do 2 things:
1. Set the preferred allocation for the destination of a copy to that of its source.
2. After allocation is done, change the allocation of a copy destination (if
legal) so the copy can be eliminated.
This eliminates 443 extra moves from 403.gcc.
llvm-svn: 43662
2007-11-03 07:20:12 +00:00
0442889b18
Add run line.
...
llvm-svn: 43645
2007-11-02 17:36:58 +00:00
f851163c53
One more extract_subreg coalescing bug.
...
llvm-svn: 43644
2007-11-02 17:35:08 +00:00
e453ff4913
Missing a getNumOperands check.
...
llvm-svn: 43630
2007-11-02 01:26:22 +00:00
440f9abab4
Test that expand_vector_elt(v2i64) works in 32-bit mode.
...
llvm-svn: 43598
2007-11-01 02:38:24 +00:00
c2dbfee43f
It's not safe to tell SplitCriticalEdge to merge identical edges. It may delete the phi instruction that's being processed.
...
llvm-svn: 43524
2007-10-30 22:27:26 +00:00
b024c4c81d
- Bug fixes.
...
- Allow icmp rewrite using an iv / stride of a smaller integer type.
llvm-svn: 43480
2007-10-29 22:07:18 +00:00
ae95d72a52
Fix a DAGCombiner abort on a bitcast from a scalar to a vector.
...
llvm-svn: 43470
2007-10-29 20:44:42 +00:00
e106e2f142
Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
...
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).
llvm-svn: 43465
2007-10-29 19:58:20 +00:00
5e99fd8c0d
Add support for the x86-64 'q' regigster modifier, and add support for the
...
b/h/w/k/q inline asm memory modifiers, which are just ignored. This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
llvm-svn: 43430
2007-10-29 03:09:07 +00:00
b0bfd69684
On second thought. Remove this as it should never be generated in the first
...
place.
llvm-svn: 43400
2007-10-26 20:34:37 +00:00
6d15b32c15
- Remove the hacky code that forces a memcpy. Alignment is taken care of in the
...
FE.
- Explicitly pass in the alignment of the load & store.
- XFAIL 2007-10-23-UnalignedMemcpy.ll because llc has a bug that crashes on
unaligned pointers.
llvm-svn: 43398
2007-10-26 20:24:42 +00:00
7f3d02471d
Loosen up iv reuse to allow reuse of the same stride but a larger type when truncating from the larger type to smaller type is free.
...
e.g.
Turns this loop:
LBB1_1: # entry.bb_crit_edge
xorl %ecx, %ecx
xorw %dx, %dx
movw %dx, %si
LBB1_2: # bb
movl L_X$non_lazy_ptr, %edi
movw %si, (%edi)
movl L_Y$non_lazy_ptr, %edi
movw %dx, (%edi)
addw $4, %dx
incw %si
incl %ecx
cmpl %eax, %ecx
jne LBB1_2 # bb
into
LBB1_1: # entry.bb_crit_edge
xorl %ecx, %ecx
xorw %dx, %dx
LBB1_2: # bb
movl L_X$non_lazy_ptr, %esi
movw %cx, (%esi)
movl L_Y$non_lazy_ptr, %esi
movw %dx, (%esi)
addw $4, %dx
incl %ecx
cmpl %eax, %ecx
jne LBB1_2 # bb
llvm-svn: 43375
2007-10-26 01:56:11 +00:00
133694db06
If a loop termination compare instruction is the only use of its stride,
...
and the compaison is against a constant value, try eliminate the stride
by moving the compare instruction to another stride and change its
constant operand accordingly. e.g.
loop:
...
v1 = v1 + 3
v2 = v2 + 1
if (v2 < 10) goto loop
=>
loop:
...
v1 = v1 + 3
if (v1 < 30) goto loop
llvm-svn: 43336
2007-10-25 09:11:16 +00:00
52bbe1b171
This was failing on Darwin, which defaults to PIC;
...
no lea was generated. I think this follows the intent.
llvm-svn: 43312
2007-10-24 20:58:14 +00:00
e3b859298a
If there's an unaligned memcpy to/from the stack, don't lower it. Just call the
...
memcpy library function instead.
llvm-svn: 43270
2007-10-23 23:32:40 +00:00
ec271b104c
Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64.
...
llvm-svn: 43248
2007-10-23 06:42:42 +00:00
1f2dd35898
Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4.
...
llvm-svn: 43234
2007-10-22 22:11:27 +00:00
e0c3d9f338
Strength reduction improvements.
...
- Avoid attempting stride-reuse in the case that there are users that
aren't addresses. In that case, there will be places where the
multiplications won't be folded away, so it's better to try to
strength-reduce them.
- Several SSE intrinsics have operands that strength-reduction can
treat as addresses. The previous item makes this more visible, as
any non-address use of an IV can inhibit stride-reuse.
- Make ValidStride aware of whether there's likely to be a base
register in the address computation. This prevents it from thinking
that things like stride 9 are valid on x86 when the base register is
already occupied.
Also, XFAIL the 2007-08-10-LEA16Use32.ll test; the new logic to avoid
stride-reuse elimintes the LEA in the loop, so the test is no longer
testing what it was intended to test.
llvm-svn: 43231
2007-10-22 20:40:42 +00:00
bf474959a3
Fix the folding of multiplication into addresses on x86, which was broken
...
by the recent {U,S}MUL_LOHI changes.
llvm-svn: 43230
2007-10-22 20:22:24 +00:00
bdbed66333
Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64.
...
llvm-svn: 43228
2007-10-22 19:46:19 +00:00
f52a6fc50c
New test case.
...
llvm-svn: 43193
2007-10-19 22:05:00 +00:00
813a0b1d29
Test byval with a 8 bit aligned struct
...
llvm-svn: 43173
2007-10-19 11:29:21 +00:00
846c19dd70
Add support for byval function whose argument is not 32 bit aligned.
...
To do this it is necessary to add a "always inline" argument to the
memcpy node. For completeness I have also added this node to memmove
and memset. I have also added getMem* functions, because the extra
argument makes it cumbersome to use getNode and because I get confused
by it :-)
llvm-svn: 43172
2007-10-19 10:41:11 +00:00
070aca5d25
Pointer arithmetic should be done with the index the same size as the pointer.
...
llvm-svn: 43120
2007-10-18 08:32:37 +00:00
e6a41c066a
Really fix PR1734. Carefully track which register uses are sub-register uses by
...
traversing inverse register coalescing map.
llvm-svn: 43118
2007-10-18 07:49:59 +00:00
8f518b9875
Add support for ISD::SELECT in SplitVectorOp.
...
llvm-svn: 43072
2007-10-17 14:48:28 +00:00
7587d1bd19
Yet another test case for extract_subreg coalescing crash.
...
llvm-svn: 43063
2007-10-17 02:15:06 +00:00
fab7ca89d5
Fix PR1734.
...
llvm-svn: 43035
2007-10-16 19:29:47 +00:00
e43b960d3b
New test for svn rev 43033, radar 5538745.
...
llvm-svn: 43034
2007-10-16 18:10:14 +00:00
1366653e2f
Fix a bug handling frame references in ppc inline asm when the frame offset
...
doesn't fit into 16 bits.
llvm-svn: 43032
2007-10-16 18:00:18 +00:00
7bcfd8f880
LowerFP_TO_SINT must not create a stack object if it's not needed.
...
llvm-svn: 43004
2007-10-15 20:11:21 +00:00
e862243e1c
Reapply the fix in 42908 for this file. This changes the function names
...
from "test" to "foo" so that they don't match the grep -i ST.
llvm-svn: 43001
2007-10-15 19:22:17 +00:00
a5abba65b6
Fix PR1729: watch out for val# with no def.
...
llvm-svn: 42996
2007-10-15 18:33:50 +00:00
9486b19066
Fix run line.
...
llvm-svn: 42990
2007-10-15 16:35:13 +00:00
d8771e915c
New test case.
...
llvm-svn: 42963
2007-10-14 10:15:03 +00:00
cdf3609130
Revert 42908 for now.
...
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
2ce649ebea
new testcase
...
llvm-svn: 42953
2007-10-13 06:56:18 +00:00
f86204baf4
Fix test case.
...
llvm-svn: 42949
2007-10-13 03:14:06 +00:00
54bec86754
New tests.
...
llvm-svn: 42948
2007-10-13 03:10:54 +00:00
e0ad9ea7cd
Fix this test to not depend on the assembly output containing something
...
that includes the string "st". This probably fixes the regression on
Darwin.
llvm-svn: 42932
2007-10-12 20:42:14 +00:00
dc35bd79ca
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
llvm-svn: 42908
2007-10-12 14:53:36 +00:00
f8e28b152a
Doh.
...
llvm-svn: 42901
2007-10-12 09:10:27 +00:00
b83a379f4f
EXTRACT_SUBREG test case.
...
llvm-svn: 42900
2007-10-12 09:03:31 +00:00
9653e677d5
Added missing -march=x86 flag.
...
llvm-svn: 42893
2007-10-12 07:49:48 +00:00
be37007e64
Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
...
may be overloaded with vector types. And add a testcase for codegen for
these.
llvm-svn: 42885
2007-10-12 00:01:22 +00:00
3554448947
Add an explicit target triple to make this test behave as expected on
...
non-Apple hosts. And use the count script instead of wc + grep.
llvm-svn: 42878
2007-10-11 23:04:36 +00:00
9ccea99165
Added tail call optimization to the x86 back end. It can be
...
enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
llvm-svn: 42870
2007-10-11 19:40:01 +00:00
678387a299
These two tests now require only two multiply instructions,
...
instead of four.
llvm-svn: 42784
2007-10-09 15:39:37 +00:00
3b3e6097a3
Update test.
...
llvm-svn: 42775
2007-10-08 22:20:32 +00:00
a24b431b27
These two tests now require only three multiply instructions,
...
instead of four.
llvm-svn: 42765
2007-10-08 20:48:12 +00:00
bcfa7c1255
Make test work on non-x86 hosts.
...
llvm-svn: 42671
2007-10-06 01:22:39 +00:00
5ee9cf6bca
Test case for 3-address conversion.
...
llvm-svn: 42664
2007-10-05 23:33:09 +00:00
484cab7a2f
Enable convertToThreeAddress for X86 by default.
...
llvm-svn: 42655
2007-10-05 22:31:10 +00:00
c0154c06d6
First round of ppc long double. call/return and
...
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.
llvm-svn: 42644
2007-10-05 20:04:43 +00:00
90a4185b5f
New test case.
...
llvm-svn: 42628
2007-10-05 01:44:22 +00:00
89ca5b091f
-pre-RA-sched=none, simple, simple-noitin are gone.
...
llvm-svn: 42505
2007-10-01 22:17:20 +00:00
a90183e7d1
Teach SplitVectorOp how to split INSERT_VECTOR_ELT.
...
llvm-svn: 42457
2007-09-28 23:53:40 +00:00
6c04ac1db0
Refactor the memcpy lowering for the x86 target.
...
The only generated code difference is that now we call memcpy when
the size of the array is unknown. This matches GCC behavior and is
better since the run time value can be arbitrarily large.
llvm-svn: 42433
2007-09-28 12:53:01 +00:00
25a00a63eb
Add sqrt and powi intrinsics for long double.
...
llvm-svn: 42423
2007-09-28 01:08:20 +00:00
b805d35d16
Modernize fabs.ll, add long double. Add tests
...
for direct codegen of fsin/fcos.
llvm-svn: 42369
2007-09-26 21:12:10 +00:00
31599685c7
When both x/y and x%y are needed (x and y both scalar integer), compute
...
both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.
llvm-svn: 42308
2007-09-25 18:23:27 +00:00
97d4bf2c41
Some tests for APFloat conversions.
...
llvm-svn: 42303
2007-09-25 17:50:55 +00:00
6cb71f7fe0
Forgot to check in the changes. Fix test case so it doesn't break with any scheduling changes.
...
llvm-svn: 42302
2007-09-25 17:47:38 +00:00
6002818999
Use the correct result value type instead of using getValueType(0)
...
in ExpandEXTRACT_VECTOR_ELT and SplitVectorOp. This fixes an abort
in the included testcase.
llvm-svn: 42264
2007-09-24 15:54:53 +00:00
f818ccd463
Fix a typo in a comment.
...
llvm-svn: 42263
2007-09-24 15:50:11 +00:00
ae4bb05103
Implementation of +sse -sse2 has changed; add
...
-sse to preserve intent of this test.
llvm-svn: 42247
2007-09-23 14:58:14 +00:00
4730c04904
Don't add a default STACK_ALIGN (use the generic ABI alignment)
...
Implement calls to functions with byval arguments on X86
llvm-svn: 42192
2007-09-21 15:50:22 +00:00
723dab1005
Disable if-conversion for this test.
...
llvm-svn: 42170
2007-09-20 18:06:22 +00:00
77d4771405
-enable-arm-if-conversion is gone.
...
llvm-svn: 42169
2007-09-20 18:03:23 +00:00
4dbc582a36
Fix several more entries in the x86 reload/remat folding tables.
...
llvm-svn: 42162
2007-09-20 14:17:21 +00:00
e7ff9da64b
Clean up.
...
llvm-svn: 42112
2007-09-18 22:56:31 +00:00
e2e8f2d96b
Fix a bogus splat xform:
...
shuffle <undef, undef, x, undef>, <undef, undef, undef, undef>, <2, 2, 2, 2>
!=
<undef, undef, x, undef>
llvm-svn: 42111
2007-09-18 21:54:37 +00:00
067f1d8e95
Objective-C was generating EH frame info like this:
...
"_-[NSString(local) isNullOrNil]".eh = 0
.no_dead_strip "_-[NSString(local) isNullOrNil]".eh
The ".eh" should be inside the quotes.
llvm-svn: 42074
2007-09-18 01:47:22 +00:00
a2f3e13cf4
Fix for PR1633: Verifier doesn't fully verify GC intrinsics
...
LLVM now enforces the following prototypes for the write barriers:
<ty>* @llvm.gcread(<ty2>*, <ty>**)
void @llvm.gcwrite(<ty>*, <ty2>*, <ty>**)
And for @llvm.gcroot, the first stack slot is verified to be an alloca or a
bitcast of an alloca.
Fixes test/CodeGen/Generic/GC/lower_gcroot.ll, which violated these.
llvm-svn: 42051
2007-09-17 20:30:04 +00:00
863bdc332d
Emit integer x<1 as x<=0, as comparisons with zero (now includeing
...
64-bit) can use test instead of cmp with an immediate.
llvm-svn: 42026
2007-09-17 14:49:27 +00:00
51d1929b9e
Use "test reg,reg" in place of "cmp reg,0" for 64-bit operands. This was
...
previously only done for 32-bit and smaller operands.
llvm-svn: 42024
2007-09-17 14:35:24 +00:00
c519c38629
Add explicit triples to avoid default behavior that varies by host.
...
llvm-svn: 41959
2007-09-14 20:37:18 +00:00
272f7304f0
Add support for functions with byval arguments on x86
...
llvm-svn: 41953
2007-09-14 15:48:13 +00:00
d8317967aa
Fixed a typo that's causing a missing kill marker.
...
llvm-svn: 41893
2007-09-12 23:02:04 +00:00
c16847b157
Sometimes a MI can define a register as well as defining a super-register at the
...
same time. Do not mark the "smaller" def as dead.
llvm-svn: 41871
2007-09-11 22:34:47 +00:00
7a9935c31f
this is not infinite recursion.
...
llvm-svn: 41806
2007-09-10 21:16:23 +00:00
29e6ac4281
Implement misaligned FP loads and stores.
...
llvm-svn: 41786
2007-09-08 19:29:23 +00:00
9929bc403d
Add missing index versions of instructions to the map.
...
llvm-svn: 41776
2007-09-07 22:01:02 +00:00
a95cbb0007
Avoid storing and reloading zeros and other constants from stack slots
...
by flagging the associated instructions as being trivially rematerializable.
llvm-svn: 41775
2007-09-07 21:32:51 +00:00
1de0c86717
Add support for having different alignment for objects on call frames.
...
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.
llvm-svn: 41768
2007-09-07 14:52:14 +00:00
122bf4be7e
Split eh.select / eh.typeid.for intrinsics into i32/i64 versions. This is needed, because they just "mark" register
...
liveins and we let frontend solve type issue, not lowering code :)
llvm-svn: 41763
2007-09-07 11:39:35 +00:00
a07765b8f4
Proper handle case, when aliasee is external weak symbol referenced only by alias itself.
...
Also, fix a case, when target doesn't have weak symbols supported.
llvm-svn: 41746
2007-09-06 17:21:48 +00:00
189df733ed
Fix a bug in X86InstrInfo::convertToThreeAddress that caused it to codegen:
...
leal (,%rcx,8), %rcx
It should be
leal (,%rcx,8), %ecx
llvm-svn: 41735
2007-09-06 00:14:41 +00:00
6480cc6f8c
Change all floating constants that are not exactly
...
representable to use hex format.
llvm-svn: 41722
2007-09-05 17:50:36 +00:00
6820abe101
Testcases for PR1628.
...
llvm-svn: 41719
2007-09-05 11:53:04 +00:00
b9bf812ba5
Add the 64-bit versions of the DS* Altivec instructions.
...
llvm-svn: 41717
2007-09-05 04:05:20 +00:00
e0cb6bb8da
Fix for PR1632. EHSELECTION always produces a i32 value.
...
llvm-svn: 41712
2007-09-04 20:39:26 +00:00
4dbd9f254a
Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.
...
llvm-svn: 41711
2007-09-04 20:20:29 +00:00
ffac17a223
Fix a gcroot lowering bug.
...
llvm-svn: 41668
2007-09-01 02:00:51 +00:00
e636fc05d6
Initial support for calling functions with byval arguments on x86-64
...
llvm-svn: 41643
2007-08-31 15:06:30 +00:00
2e9d48aa0d
Update test case to reflect Dale's change.
...
llvm-svn: 41639
2007-08-31 06:29:32 +00:00
ffb806cf0e
Do not run on darwin.
...
llvm-svn: 41608
2007-08-30 16:07:20 +00:00
ebb8540067
Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.
...
llvm-svn: 41599
2007-08-30 05:54:07 +00:00
312b70a970
Add explicit triples to avoid default behavior that varies by host.
...
llvm-svn: 41510
2007-08-27 20:54:48 +00:00
dd94bde661
Remove this test as it is too hard to fix after the
...
latest EH changes, and in any case it is hard to
imagine how the original bug could be reintroduced.
llvm-svn: 41497
2007-08-27 17:08:14 +00:00
90064ed445
Now that we don't output cleanups by default, the action
...
offset needs to be adjusted in this test.
llvm-svn: 41490
2007-08-27 16:30:05 +00:00
8dc0b93151
If the source and destination pointers in an llvm.memmove are known
...
to not alias each other, it can be translated as an llvm.memcpy.
llvm-svn: 41489
2007-08-27 16:26:13 +00:00
ff33241e16
call libc memcpy/memset if array size is bigger then threshold.
...
Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)
llvm-svn: 41479
2007-08-27 10:18:20 +00:00
2ed652f11d
Allow target constants to be illegal types. The target should
...
know how to handle them. This fixes
test/CodeGen/Generic/asm-large-immediate.ll
llvm-svn: 41388
2007-08-25 01:00:22 +00:00
544fdd27fb
update test to check that codegen works with llvm.used in llvm.metadata section
...
llvm-svn: 41289
2007-08-22 19:36:31 +00:00
595401079e
Test dag xform: Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C)
...
llvm-svn: 41164
2007-08-18 06:11:57 +00:00
2c4ea1e411
New test. Make sure dynamic_stackalloc size is rounded up.
...
llvm-svn: 41135
2007-08-16 23:52:23 +00:00
1393d88cc6
Update test: dynamic_stackalloc size *must* be rounded to ensure stack ptr be left in a valid state.
...
llvm-svn: 41134
2007-08-16 23:51:28 +00:00
4ba05408ac
add byval test
...
llvm-svn: 41123
2007-08-16 13:09:02 +00:00
a392cd2fde
Implement FPOWI ExpandOp.
...
Fix PR1287.
llvm-svn: 41112
2007-08-15 22:13:27 +00:00
2047077272
Test case for PR1609.
...
llvm-svn: 41110
2007-08-15 20:30:10 +00:00
413a23d257
This test used "wc | grep ..."; convert it to use the count script.
...
llvm-svn: 41101
2007-08-15 13:55:47 +00:00
ada7205b76
Convert tests using "grep -c ... | grep ..." to use the count script.
...
llvm-svn: 41100
2007-08-15 13:49:33 +00:00
85c1e51b34
Delete extraneous uses of wc -l.
...
llvm-svn: 41099
2007-08-15 13:45:35 +00:00
5327cf7b48
Convert another test to use the count script. This one didn't fit the
...
regex used to convert all the others because the first '|' was on a
separate line.
llvm-svn: 41098
2007-08-15 13:42:36 +00:00
f9dd170e36
Convert tests using "| wc -l | grep ..." to use the count script.
...
llvm-svn: 41097
2007-08-15 13:36:28 +00:00
7fe896120e
New test.
...
llvm-svn: 41087
2007-08-14 23:34:50 +00:00
859a52072e
Test case for PR1596.
...
llvm-svn: 41085
2007-08-14 23:21:10 +00:00
687dbf1a99
tcl seems to hate |& for some reason.
...
llvm-svn: 41073
2007-08-14 16:19:35 +00:00
0e92458068
switch this to use fastcc to avoid fpstack traffic on x86-32. Switch to
...
using the count script instead of wc -l
llvm-svn: 41072
2007-08-14 16:14:10 +00:00
5c6d53d2ff
Update test case. A spill should now be deleted.
...
llvm-svn: 41070
2007-08-14 09:16:00 +00:00
5e221dbe8f
Spiller reuse test case.
...
llvm-svn: 41068
2007-08-14 05:51:03 +00:00
2814fe847d
Now capable of rematerializing coalesced live intervals.
...
llvm-svn: 41061
2007-08-13 23:54:16 +00:00
ccb3611881
When x86 addresses matching exceeds its recursion limit, check to
...
see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.
llvm-svn: 41049
2007-08-13 20:03:06 +00:00
4e7f673f65
Fix PR1607
...
llvm-svn: 41048
2007-08-13 18:42:37 +00:00
030a59d967
Fix test so it passes.
...
llvm-svn: 41012
2007-08-10 22:20:57 +00:00
b372abab14
Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)).
...
llvm-svn: 41010
2007-08-10 21:48:46 +00:00
d36d30b53c
Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled.
...
llvm-svn: 41007
2007-08-10 21:18:25 +00:00
a17799a3bd
Fix EXTRACT_ELEMENT, EXTRACT_SUBVECTOR, and EXTRACT_VECTOR_ELT to
...
use an intptr ValueType instead of i32 for the index operand in
getCopyToParts.
llvm-svn: 40987
2007-08-10 14:59:38 +00:00
39d751058a
allow this to pass on ppc hosts.
...
llvm-svn: 40846
2007-08-05 18:48:18 +00:00
7132e00de7
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
...
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
llvm-svn: 40807
2007-08-04 01:51:18 +00:00
8932bff7fe
Fix the alignment requirements of several unpck and shuf instructions.
...
Generalize isPSHUFDMask and add a unary SHUFPD pattern so that SHUFPD's
memory operand alignment can be tested as well, with a fix to avoid
breaking MMX's use of isPSHUFDMask.
llvm-svn: 40756
2007-08-02 21:17:01 +00:00
fa3eeeedc0
Mark the SSE and MMX load instructions that
...
X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.
llvm-svn: 40736
2007-08-02 14:27:55 +00:00
824693c87a
Fix test.
...
llvm-svn: 40721
2007-08-02 05:04:16 +00:00
41ccce7169
New test. Bogus implicit-def prevented a copy from being coalesced.
...
llvm-svn: 40690
2007-08-01 20:26:40 +00:00
0db4418a5f
Expand unaligned loads/stores when the target doesn't support them. (PR1548)
...
llvm-svn: 40682
2007-08-01 19:34:21 +00:00
9182684222
we're now handling this right :)
...
llvm-svn: 40675
2007-08-01 17:10:30 +00:00
09a141df31
Requires SSE2.
...
llvm-svn: 40657
2007-08-01 00:10:12 +00:00
54ec4bfa5f
Change the x86 assembly output to use tab characters to separate the
...
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.
llvm-svn: 40648
2007-07-31 20:11:57 +00:00
03708acd4e
new testcase
...
llvm-svn: 40636
2007-07-31 16:18:25 +00:00
12c6be84ff
Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load )
...
llvm-svn: 40628
2007-07-31 08:04:03 +00:00
4ff9fb14f6
Fix a bug in getCopyFromParts turned up in the testcase for PR1132.
...
llvm-svn: 40598
2007-07-30 19:09:17 +00:00
c8780b0ae9
New test case.
...
llvm-svn: 40587
2007-07-30 07:52:03 +00:00
4788552deb
Re-apply 40504, but with a fix for the segfault it caused in oggenc:
...
Make the alignedload and alignedstore patterns always require 16-byte
alignment. This way when they are used in the "Fs" instructions, in which
a vector instruction is used for a scalar purpose, they can still require
the full vector alignment. And add a regression test for this.
llvm-svn: 40555
2007-07-27 17:16:43 +00:00
931de40afa
Reverting 40504 for now. It's breaking oggenc.
...
llvm-svn: 40547
2007-07-27 01:37:47 +00:00
dfa5d283fd
Test case for PR1573.
...
llvm-svn: 40539
2007-07-26 17:45:57 +00:00
e9ba8e0765
Fix test.
...
llvm-svn: 40536
2007-07-26 17:07:03 +00:00
8455bd3fae
Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the
...
x86 target, replacing them with the new alignment attributes on memory
references.
llvm-svn: 40504
2007-07-26 00:31:09 +00:00
f906c7286f
Use movaps to load a v4f32 build_vector of all-constant values into a
...
register instead of loading each element individually.
llvm-svn: 40478
2007-07-24 22:55:08 +00:00
b063fa59d3
The Ada f-e produces various auxiliary output files
...
that cannot be suppressed and cannot be redirected:
they are dumped in the current working directory.
When running the testsuite this means that these
files do not end up in the Output directory. The
best solution I could find is to change directory
into Output before running tests.
llvm-svn: 40437
2007-07-23 15:23:35 +00:00
45863cc202
Update these regression tests to accomodate X86InstrSSE.td now using movups/movaps
...
for everything.
llvm-svn: 40101
2007-07-20 16:31:26 +00:00
f195429a0e
New test.
...
llvm-svn: 40077
2007-07-20 00:27:56 +00:00
a39fd10e32
New test.
...
llvm-svn: 40073
2007-07-19 23:53:50 +00:00
8ab393548f
Try fixing it again.
...
llvm-svn: 40072
2007-07-19 23:53:29 +00:00
314e1cb7ee
For PR1553:
...
Change the keywords for the zext and sext parameter attributes to be
zeroext and signext so they don't conflict with the keywords for the
instructions of the same name. This gets around the ambiguity.
llvm-svn: 40069
2007-07-19 23:13:04 +00:00
dd96b98bf6
Don't need the "&&" to glue lines together.
...
llvm-svn: 40063
2007-07-19 18:06:26 +00:00
e8ea3303ce
Testcase for PR1549
...
llvm-svn: 40041
2007-07-19 06:31:11 +00:00
dcc3451f8a
New test.
...
llvm-svn: 40020
2007-07-18 21:39:16 +00:00
776962a97a
Implement initial memory alignment awareness for SSE instructions. Vector loads
...
and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.
llvm-svn: 40015
2007-07-18 20:23:34 +00:00
a7b65c30a3
It's not necessary to do rounding for alloca operations when the requested
...
alignment is equal to the stack alignment.
llvm-svn: 40004
2007-07-18 16:29:46 +00:00
5184c9d787
Fix test.
...
llvm-svn: 39976
2007-07-17 18:16:09 +00:00
8817a170f7
Don't use * in XFAIL line unless you want it to XFAIL on everything. I don't believe you can use true regular expressions here. It will just look for those keywords. Please test this on sparc and see if they still are xfailed.
...
llvm-svn: 39975
2007-07-17 18:08:32 +00:00
6881ace037
XFAIL these on sparc-solaris
...
llvm-svn: 39969
2007-07-17 10:25:31 +00:00
9ae2eb43d8
Use push / pop for prologues and epilogues.
...
llvm-svn: 39967
2007-07-17 07:59:08 +00:00
5bc753e26b
For PR1558:
...
Move tests that have C/C++ sources into the appropriate directory. This
allows them to be selected for testing based on whether llvm-gcc is
present or not.
llvm-svn: 39963
2007-07-17 06:20:38 +00:00
f54537370a
Remove insignificant test no longer needed.
...
llvm-svn: 39931
2007-07-16 22:03:36 +00:00
c6e67a6126
Remove the trailing semicolon from function declarations in LLVM,
...
where it's interpreted as a comment, not part of the syntax.
llvm-svn: 39920
2007-07-16 13:37:30 +00:00
07bc082891
Added test case from PR1540.
...
llvm-svn: 39845
2007-07-13 23:57:33 +00:00
2182f06f2d
Skeleton of post-RA scheduler; doesn't do anything yet.
...
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
llvm-svn: 39816
2007-07-13 17:13:54 +00:00
42d12da712
these tests do not need a triple on Solaris. Thanks sabre!
...
llvm-svn: 39803
2007-07-13 10:08:18 +00:00
1ef777cbb4
fix the remaining 3 testcases that missed a target triple
...
llvm-svn: 39773
2007-07-12 13:21:08 +00:00
3d70855dd2
Handle packed structs in the CBackend.
...
llvm-svn: 39752
2007-07-11 19:56:53 +00:00
ade8183fe8
Add test case for PR1545.
...
llvm-svn: 39749
2007-07-11 19:29:05 +00:00
60d6f96da3
Change the peep for EXTRACT_VECTOR_ELT of BUILD_PAIR to look for
...
the new CONCAT_VECTORS node type instead, as that's what legalize
uses now. And add a peep for EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT.
llvm-svn: 38503
2007-07-10 18:20:44 +00:00
4bd45b3d53
Add a regression test for folding spill code into scalar min and max.
...
llvm-svn: 38492
2007-07-10 15:34:29 +00:00
f8f531bf69
Change getCopyToParts and getCopyFromParts to always use target-endian
...
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
llvm-svn: 38471
2007-07-09 20:59:04 +00:00
318ff8dd94
force a cpu without SSE
...
llvm-svn: 38466
2007-07-09 17:35:18 +00:00
0937478073
allow this to work on ppc-darwin
...
llvm-svn: 38465
2007-07-09 17:32:28 +00:00
0e623de40d
remove this bogus t-t
...
llvm-svn: 38464
2007-07-09 17:31:07 +00:00
6fec9a91b7
add target triple to fix PR1546
...
llvm-svn: 38462
2007-07-09 17:14:58 +00:00
5740239998
Add explicit triples to these tests so that llc behaves as expected on
...
non-Apple hosts.
llvm-svn: 38455
2007-07-09 13:42:32 +00:00
bab5355ff4
Add an explicit triple to the big-endian tests so that the assembly
...
output format is always consistent with what the greps are looking for.
llvm-svn: 37943
2007-07-06 13:15:51 +00:00
6ddf75174a
Test that byte offsets are used to index into the list
...
of filter ids, and not simply the id index. Testing
this requires at least 128 type infos!
llvm-svn: 37941
2007-07-06 12:38:27 +00:00
da784693c3
Fix test.
...
llvm-svn: 37928
2007-07-05 23:00:50 +00:00
feba62c719
avoid ambiguity in target selection
...
llvm-svn: 37927
2007-07-05 22:16:19 +00:00
d258e80583
Add a parameter to getCopyToParts and getCopyFromParts to specify whether
...
endian swapping should be done, and update the code to use it. This fixes
some register ordering issues on big-endian systems, such as PowerPC,
introduced by the recent illegal by-val arguments changes.
llvm-svn: 37921
2007-07-05 20:12:34 +00:00
3053244b27
Allow a GR64 to be moved into an MMX register via the "movd" instruction.
...
Still need to have JIT generate this code.
llvm-svn: 37863
2007-07-04 00:19:54 +00:00
a8bf39ee31
New testcases for rev 37847 (PR's 1489 and 1505).
...
llvm-svn: 37848
2007-07-03 00:58:37 +00:00
9ff9908413
Add a basic test-case for passing and returning <4 x double> and
...
<8 x float> values on X86.
llvm-svn: 37845
2007-07-02 16:23:47 +00:00
11a4008a59
New test case. DAGCombiner should be able to fold -sin(-x)
...
in -enable-unsafe-fp-math mode.
llvm-svn: 37841
2007-07-02 15:43:20 +00:00
d21e3ab873
New test.
...
llvm-svn: 37823
2007-06-29 23:17:15 +00:00
62acd01275
New test.
...
llvm-svn: 37815
2007-06-29 21:40:30 +00:00
2660cef6d7
Convert .cvsignore files
...
llvm-svn: 37801
2007-06-29 16:35:07 +00:00
d880f90c2b
New test.
...
llvm-svn: 37791
2007-06-29 01:36:33 +00:00
b99f152f29
New tests.
...
llvm-svn: 37787
2007-06-29 00:27:18 +00:00
0de7694de6
Fix an assertion failure in legalizing bitcast operators on targets where
...
vectors are split down to single elements as part of legalization.
llvm-svn: 37785
2007-06-29 00:09:08 +00:00
e15ea75168
Fix tests.
...
llvm-svn: 37693
2007-06-21 18:22:42 +00:00
5fcb5a5c74
New tests.
...
llvm-svn: 37686
2007-06-21 07:40:00 +00:00
85010166a6
Added some if-conversion tests.
...
llvm-svn: 37672
2007-06-20 18:26:15 +00:00
6ba3e8b27d
New test case: identity operation of RHS / LHS of a VECTOR_SHUFFLE.
...
llvm-svn: 37637
2007-06-19 00:06:08 +00:00
5f232faf8c
ensure we don't regress on these tests. We generate aweful code in x86-32 for
...
these though.
llvm-svn: 37619
2007-06-17 23:29:57 +00:00
ec6be07c22
XFAILing until I can fix properly.
...
llvm-svn: 37618
2007-06-16 23:57:51 +00:00
c8f293b4f9
Testcase for MMX int to MMX register failure.
...
llvm-svn: 37612
2007-06-16 06:31:47 +00:00
2d7f447a7a
make this test harder, include a tied register.
...
llvm-svn: 37600
2007-06-15 19:09:53 +00:00
92bf2c628c
Workaround for PR1508.
...
llvm-svn: 37597
2007-06-15 19:04:19 +00:00
616627b002
Do not treat FP_REG_KILL as terminator in branch analysis (X86).
...
llvm-svn: 37578
2007-06-14 22:03:45 +00:00
fe940d8d74
"Simplified" testcase for PR1422.
...
llvm-svn: 37462
2007-06-06 09:59:53 +00:00
af56be7f2c
new testcase for PR1495
...
llvm-svn: 37452
2007-06-06 01:21:46 +00:00
59754300a8
New test.
...
llvm-svn: 37431
2007-06-05 01:45:08 +00:00
0558dda319
Tail merging wasn't working for predecessors of landing pads. PR 1496.
...
llvm-svn: 37427
2007-06-04 23:52:54 +00:00
3c0a13762d
Implement smarter algorithm for choosing which blocks to tail-merge.
...
See test/CodeGen/X86/test-pic-jtbl.ll for a case where it works well;
shaves another 10K off our favorite benchmark. I was hesitant about
this because of compile speed, but seems to do OK on a bootstrap.
llvm-svn: 37392
2007-06-01 23:02:45 +00:00
5a3e6fe365
Add a test for PR1424.
...
llvm-svn: 37372
2007-05-31 18:36:07 +00:00
4217aa376a
new testcase for PR1473
...
llvm-svn: 37361
2007-05-30 16:29:20 +00:00
b58bf97603
Add a new test case.
...
llvm-svn: 37317
2007-05-24 02:31:15 +00:00
d750b46f8b
tail merging shrinks this code a bit. Could do more in future.
...
llvm-svn: 37316
2007-05-23 21:09:26 +00:00
a7120dde08
new testcases for -enable-tail-merge default handling
...
llvm-svn: 37287
2007-05-22 17:19:23 +00:00
80fae16a06
Test assumes tail merging is off; this must now be explicit.
...
llvm-svn: 37286
2007-05-22 17:18:05 +00:00
204af78b96
Add test for PR1259.
...
llvm-svn: 37273
2007-05-21 23:30:33 +00:00
0306944992
add source
...
llvm-svn: 37253
2007-05-19 01:22:52 +00:00
afa90dc355
new testcase
...
llvm-svn: 37251
2007-05-19 01:21:39 +00:00
bde968823a
new testcase
...
llvm-svn: 37245
2007-05-19 00:41:40 +00:00
0465aca5d2
New test case.
...
llvm-svn: 37174
2007-05-17 18:49:50 +00:00
7bee9ad4f7
add testcase for 128-bit add/sub
...
llvm-svn: 37170
2007-05-17 18:22:37 +00:00
5de4944f70
testcase for PR1427
...
llvm-svn: 37140
2007-05-17 03:29:17 +00:00
1087473e51
testcase for maskmovq
...
llvm-svn: 37101
2007-05-16 06:14:10 +00:00
3f142cbca2
Fix an infinite recursion in GetNegatedExpression.
...
llvm-svn: 37086
2007-05-15 17:05:43 +00:00
a7a37a107e
new testcase that crashes llc
...
llvm-svn: 37068
2007-05-15 01:33:12 +00:00
c5900bd25b
testcase that crashes llc
...
llvm-svn: 37059
2007-05-15 01:13:42 +00:00
d1e6255141
new testcase
...
llvm-svn: 37053
2007-05-14 22:04:16 +00:00
4c28ec187e
Test for PR1406.
...
llvm-svn: 37051
2007-05-14 21:12:43 +00:00
03c64ec842
New test.
...
llvm-svn: 37048
2007-05-14 20:47:21 +00:00
5c7ce4561f
Doh. .cpp -> .ll
...
llvm-svn: 37047
2007-05-14 20:43:28 +00:00
3551928a2b
Enable aliases on arm-linux.
...
llvm-svn: 37042
2007-05-14 18:32:56 +00:00
9cdab38520
Reverse last patch .. premature. Depends on uncommitted CBE patch.
...
llvm-svn: 37039
2007-05-14 17:58:52 +00:00
9c6a4d64aa
Update this test to match the (corrected) output from the CBE.
...
llvm-svn: 37038
2007-05-14 17:56:39 +00:00
b42c11265c
Another test for tail mergeing
...
llvm-svn: 36967
2007-05-10 01:04:28 +00:00
db214c77b4
Can't fold bit_convert into truncating store.
...
llvm-svn: 36963
2007-05-09 21:54:34 +00:00
192d09c2d9
Do not assert, when case range split metric is zero and JTs are not allowed: just emit binary tree in this case. This
...
fixes PR1403.
llvm-svn: 36959
2007-05-09 20:07:08 +00:00
bf67a327c7
PR1399 test case.
...
llvm-svn: 36957
2007-05-09 19:20:37 +00:00
882a6019af
testcase for CodeGenPrepare bug fixed yesterday
...
llvm-svn: 36940
2007-05-08 17:44:36 +00:00
4ef41c1054
move this out of Codegen/Generic, because it requires the ARM backend to be
...
linked into llc
llvm-svn: 36919
2007-05-08 02:19:56 +00:00
d1f5ab0da8
move to CodeGen/ARM/2007-05-07-tailmerge-1.ll
...
llvm-svn: 36918
2007-05-08 02:13:52 +00:00
ef409e2780
Fix tests.
...
llvm-svn: 36913
2007-05-07 21:50:07 +00:00
2d828d2e3c
Add some tests for (conv (load x)) -> (load (conv*)x) xform.
...
llvm-svn: 36912
2007-05-07 21:49:35 +00:00
7cbd722dba
Fix test case.
...
llvm-svn: 36911
2007-05-07 21:38:05 +00:00
9a25b3afcd
Handle some non-exit blocks in tail merging.
...
llvm-svn: 36907
2007-05-07 20:57:21 +00:00
7208cd6e4e
Testcase for PR1398.
...
llvm-svn: 36905
2007-05-07 20:45:20 +00:00
34b2735f20
Fix PR1390.
...
Don't spill extra register to align the stack.
llvm-svn: 36814
2007-05-05 23:44:41 +00:00
bd82fb7d2f
the sparc v8 backend handles this correctly
...
llvm-svn: 36801
2007-05-05 22:12:57 +00:00
86dfbe0a13
remove this xfail'd test, move it to the X86 readme.
...
llvm-svn: 36800
2007-05-05 22:10:53 +00:00
879c39ae48
We need support for tail calls, this is moved to PR1392
...
llvm-svn: 36798
2007-05-05 22:03:12 +00:00
1c0af142a9
remove xfailed testcase (attached to pr)
...
llvm-svn: 36797
2007-05-05 21:57:34 +00:00
6760b998ba
unxfail this, llc doesn't support this feature yet, so don't run it.
...
llvm-svn: 36796
2007-05-05 21:51:34 +00:00
d31dcdacef
Check that the right eh personality function is used.
...
llvm-svn: 36788
2007-05-05 20:22:08 +00:00
cc1aa37fbf
new testcase for PR1371
...
llvm-svn: 36786
2007-05-05 19:38:43 +00:00
6e5011d208
Test that the eh lowering code can handle constant folded bitcasts.
...
llvm-svn: 36746
2007-05-04 17:14:42 +00:00
726e66f734
Test load global in static mode.
...
llvm-svn: 36719
2007-05-04 00:29:34 +00:00
579abf45bb
New test case.
...
llvm-svn: 36717
2007-05-03 23:53:36 +00:00
89200ce0f0
Evan's patch to avoid FPreg->intreg copy for cvt; store to mem
...
llvm-svn: 36693
2007-05-03 20:54:42 +00:00
847f31ec25
negatize -> negative
...
llvm-svn: 36683
2007-05-03 18:20:17 +00:00
3725488356
new testcase
...
llvm-svn: 36671
2007-05-03 16:54:08 +00:00
483dc2bf08
match a reassociated form of fnmul
...
llvm-svn: 36659
2007-05-03 00:31:40 +00:00
0659c45204
Split target dependent test portions to target-specific directories.
...
llvm-svn: 36612
2007-05-01 02:56:15 +00:00
8a16201953
Test a dag combiner crasher.
...
llvm-svn: 36605
2007-05-01 00:40:38 +00:00
9d912af4e8
testcase for PR1228
...
llvm-svn: 36601
2007-04-30 23:34:46 +00:00
7c2c1b7180
testcase for PR1357
...
llvm-svn: 36598
2007-04-30 21:10:13 +00:00
e7449654d1
For PR1370:
...
Rearrange some tests so that if PowerPC is not being built we don't try to
run PowerPC specific tests.
llvm-svn: 36587
2007-04-30 05:11:58 +00:00
8a00ba1c69
Updated aliases test
...
llvm-svn: 36558
2007-04-29 10:34:42 +00:00
5f59451529
new testcase for PR1356
...
llvm-svn: 36535
2007-04-28 06:41:13 +00:00
7141c393b6
ensure the operand prints.
...
llvm-svn: 36533
2007-04-28 06:07:55 +00:00
61553c1340
new testcase
...
llvm-svn: 36532
2007-04-28 06:05:59 +00:00
193d2f09f0
update syntax
...
llvm-svn: 36531
2007-04-28 06:03:12 +00:00
73b3b80815
update for new inline asm syntax
...
llvm-svn: 36526
2007-04-28 05:20:26 +00:00
940b083a63
fix the test tls1.
...
llvm-svn: 36517
2007-04-27 21:23:17 +00:00
04750a18be
add TLS tests.
...
llvm-svn: 36516
2007-04-27 21:08:48 +00:00
62f65468bc
In Thumb mode, the frame register must be R7.
...
llvm-svn: 36512
2007-04-27 17:58:03 +00:00
83a5e928e6
make this testcase harder, to cover PR1326
...
llvm-svn: 36509
2007-04-27 17:12:23 +00:00
9e72fc1163
Test that eh_selector lowering accepts global variables as well as bitcasts
...
of global variables.
llvm-svn: 36500
2007-04-27 06:56:53 +00:00
084cbbbe25
Unxfail tests
...
llvm-svn: 36497
2007-04-26 21:20:04 +00:00
16259b4ff2
testcase for PR1339: http://llvm.org/PR1339
...
llvm-svn: 36492
2007-04-26 21:04:39 +00:00
4ff20ff903
Add test to proper place. Also, XFAIL until ppc bootstrap will be ok.
...
llvm-svn: 36491
2007-04-26 20:49:05 +00:00
d7ae7f1659
Fixx off-by-one bug, which prevents llvm-gcc bootstrap on ppc32
...
llvm-svn: 36490
2007-04-26 20:44:04 +00:00
d3d914b9f8
PR1348 test case.
...
llvm-svn: 36457
2007-04-26 01:14:14 +00:00
9f12bc480b
New test case.
...
llvm-svn: 36455
2007-04-26 00:07:36 +00:00
2a4853b424
&& no longer needed
...
llvm-svn: 36453
2007-04-25 22:32:55 +00:00
9b8d17db61
Testcase for codegen bug.
...
llvm-svn: 36450
2007-04-25 21:58:17 +00:00
4ae9425bb6
remember to emit weak reference in one more case.
...
llvm-svn: 36438
2007-04-25 14:50:40 +00:00
a97b694c82
Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part
...
will follow.
llvm-svn: 36435
2007-04-25 14:27:10 +00:00
61e8297c44
new testcase that crashes llc
...
llvm-svn: 36412
2007-04-25 00:00:12 +00:00
02ba563c82
testcase for PR1351
...
llvm-svn: 36409
2007-04-24 22:49:57 +00:00
f4fb685122
Testcases for MMX.
...
llvm-svn: 36408
2007-04-24 22:28:30 +00:00
fe6e3f49b1
Add TLS tests.
...
llvm-svn: 36360
2007-04-23 01:29:35 +00:00
12effef41e
simplify this test until it can be dealt with
...
llvm-svn: 36351
2007-04-22 20:58:56 +00:00
ee2d164f0f
Implement PIC for arm-linux.
...
llvm-svn: 36324
2007-04-22 00:04:12 +00:00
225b2732a4
Use the llvm_supports_target function to prevent running of tests for
...
targets that LLVM is not configured to support.
llvm-svn: 36315
2007-04-21 20:41:27 +00:00
b76ba096fe
Fix test.
...
llvm-svn: 36266
2007-04-20 00:45:36 +00:00
1af7b8451e
new testcase
...
llvm-svn: 36243
2007-04-18 03:04:37 +00:00
9fcce44e7f
New crasher test case.
...
llvm-svn: 36241
2007-04-18 02:35:10 +00:00
4fe9eb5052
new testcase
...
llvm-svn: 36230
2007-04-17 23:43:31 +00:00
0a8d14ce67
new testcase
...
llvm-svn: 36220
2007-04-17 21:12:26 +00:00
2a4054bddb
new testcase
...
llvm-svn: 36211
2007-04-17 19:03:02 +00:00
8b7aab009e
Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
...
Also, fixed static case in presence of eax livin. This fixes PR331
PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
2007-04-17 09:20:00 +00:00
fb40bd5654
this is fixed
...
llvm-svn: 36190
2007-04-17 04:07:27 +00:00
658894a8eb
Also validate that the code generation of IntrinsicLowering for LLI works.
...
llvm-svn: 36175
2007-04-16 21:52:56 +00:00
f69ab9475c
refix this
...
llvm-svn: 36172
2007-04-16 21:30:21 +00:00
e0a060043b
use an x86 t-t for an x86 test. Thanks to Dan for noticing this!
...
llvm-svn: 36170
2007-04-16 21:26:37 +00:00
320ce04cb2
fix this test
...
llvm-svn: 36160
2007-04-16 21:05:37 +00:00
a17265bfbd
Fixes tests and remove xfail.
...
llvm-svn: 36152
2007-04-16 20:04:11 +00:00
6ccf9a8362
One more callee-saved register used.
...
llvm-svn: 36151
2007-04-16 18:59:25 +00:00
0c8add06f1
Fix test.
...
llvm-svn: 36150
2007-04-16 18:55:46 +00:00
edce114669
For PR1336:
...
Un-XFAIL because this passes now.
llvm-svn: 36145
2007-04-16 17:51:25 +00:00
6e87ec4351
For PR1319:
...
Remove && from the end of the lines to prevent tests from throwing run
lines into the background. Also, clean up places where the same command
is run multiple times by using a temporary file.
llvm-svn: 36142
2007-04-16 17:36:08 +00:00
675732ad38
Fix hello.ll test.
...
llvm-svn: 36141
2007-04-16 17:08:00 +00:00
b1d58a5281
Fix align test.
...
llvm-svn: 36140
2007-04-16 16:57:47 +00:00
4dcf8bff4b
For PR1319:
...
Fix syntax of tests to ensure grep pattern is properly quoted.
llvm-svn: 36134
2007-04-16 15:31:49 +00:00
86f337eeda
For PR1319:
...
Fix test syntax per new rules.
llvm-svn: 36133
2007-04-16 15:15:52 +00:00
15326fa114
For PR1336:
...
Rename test functions to not conflict with an instruction mnemonic.
llvm-svn: 36130
2007-04-16 14:23:07 +00:00
b100325547
For PR1336:
...
Ignore case for instruction mnemonic comparison.
llvm-svn: 36129
2007-04-16 14:20:28 +00:00
5203d296c6
Wrap long line.
...
llvm-svn: 36128
2007-04-16 14:17:04 +00:00
0c1a31c92f
For PR1336:
...
Ignore case for register name compare.
llvm-svn: 36127
2007-04-16 14:14:31 +00:00
fb458caf44
For PR1336:
...
Un-XFAIL as Alpha feature now specified in lower case.
llvm-svn: 36126
2007-04-16 14:07:53 +00:00
b21b885cdf
fix incorrectly upgraded test, add PR#
...
llvm-svn: 36114
2007-04-16 05:58:47 +00:00
1db9157b4e
Fix an intrinsic name.
...
llvm-svn: 36110
2007-04-16 03:20:22 +00:00
c7c991f4f8
For PR1336:
...
Rename the intrinsic so this can be upgraded properly. It still fails with
an llc warning
llvm-svn: 36109
2007-04-16 03:18:25 +00:00
4b4055a1ab
For PR1336:
...
Upgrade the intrinsic to its new form.
llvm-svn: 36108
2007-04-16 03:10:56 +00:00
c940d0761c
For PR1336:
...
Un-XFAIL this test now that llvm-ugprade knows how to create functions with
empty names.
llvm-svn: 36107
2007-04-16 03:06:39 +00:00
6584cf60f2
For PR1336:
...
XFAIL tests covered by the PR. These will be un-XFAILed as they are fixed.
llvm-svn: 36093
2007-04-15 23:00:46 +00:00
1c75ef2ce2
For PR1319: Upgrade to new test harness.
...
llvm-svn: 36091
2007-04-15 22:20:47 +00:00
a9ce1c0130
this test isn't testing what it thought it was
...
llvm-svn: 36088
2007-04-15 21:33:36 +00:00
297657d6e6
For PR1319: Upgrade to new test harness.
...
llvm-svn: 36087
2007-04-15 21:17:45 +00:00
ff8169f5cb
For PR1319: Upgrade to new test harness.
...
llvm-svn: 36086
2007-04-15 20:48:50 +00:00
0318670cf3
For PR1319: Upgrade to new test harness.
...
llvm-svn: 36080
2007-04-15 19:35:51 +00:00
a5626e787f
Make this test work.
...
llvm-svn: 36079
2007-04-15 19:28:23 +00:00
41dc9beb80
For PR1319: Upgrade to use new test harness
...
llvm-svn: 36077
2007-04-15 19:21:54 +00:00
b5dc70c270
For PR1319: Upgrade to use new test harness
...
llvm-svn: 36076
2007-04-15 19:11:47 +00:00
d1f8369090
For PR1319: Upgrade to use new test harness
...
llvm-svn: 36075
2007-04-15 18:40:57 +00:00
9f2865ac14
xfail for now
...
llvm-svn: 36033
2007-04-14 23:40:49 +00:00
c8ff09ffaa
fix test for linux hosts.
...
llvm-svn: 36026
2007-04-14 23:04:30 +00:00
8a1a84f96e
Fix PR1325: Case range optimization was performed in the case it
...
shouldn't. Also fix some "latent" bug on 64-bit platforms
llvm-svn: 35990
2007-04-14 13:25:55 +00:00
d0b3e7b0b4
xfail this for now
...
llvm-svn: 35973
2007-04-13 22:20:27 +00:00
03bf40e70e
new lsr testcase
...
llvm-svn: 35971
2007-04-13 20:38:14 +00:00
26d9e9c452
New testcase
...
llvm-svn: 35969
2007-04-13 20:28:08 +00:00
e288040abf
Fix PR1323 : we haven't updated phi nodes in good manner :)
...
llvm-svn: 35963
2007-04-13 06:53:51 +00:00
4c964c3aed
make this really work on linux :)
...
llvm-svn: 35948
2007-04-12 18:10:16 +00:00
028974508b
make this happier on linux hosts
...
llvm-svn: 35947
2007-04-12 18:09:06 +00:00
9bab80543a
new testcase
...
llvm-svn: 35942
2007-04-12 05:58:21 +00:00
d029c7e666
Make the llvm-runtest function much more amenable by eliminating all the
...
global variables that needed to be passed in. This makes it possible to
add new global variables with only a couple changes (Makefile and llvm-dg.exp)
instead of touching every single dg.exp file.
llvm-svn: 35918
2007-04-11 19:56:59 +00:00
2feb7abbd5
this got better
...
llvm-svn: 35908
2007-04-11 16:12:27 +00:00
7345e56885
change test name.
...
llvm-svn: 35904
2007-04-11 15:24:04 +00:00
05362ffdce
new testcase
...
llvm-svn: 35882
2007-04-11 05:32:13 +00:00
9f780e339e
new testcases for integer abs function
...
llvm-svn: 35880
2007-04-11 05:02:57 +00:00
506eaf7915
Next stage into switch lowering refactoring
...
1. Fix some bugs in the jump table lowering threshold
2. Implement much better metric for optimal pivot selection
3. Tune thresholds for different lowering methods
4. Implement shift-and trick for lowering small (<machine word
length) cases with few destinations. Good testcase will follow.
llvm-svn: 35816
2007-04-09 12:31:58 +00:00
ea1369275b
add another test
...
llvm-svn: 35801
2007-04-09 05:26:48 +00:00
8a06ca02d8
The x constraint allows scalar FP values as well as vectors.
...
llvm-svn: 35798
2007-04-09 05:11:03 +00:00
e505615531
new testcase for PR1308
...
llvm-svn: 35784
2007-04-09 00:45:42 +00:00
d733c17fce
testcase for PR1314
...
llvm-svn: 35778
2007-04-08 22:22:53 +00:00
91b273ae39
XFAIL this test for now. It will be a while before I can implement this
...
intrinsic properly in SDISel.
llvm-svn: 35692
2007-04-05 22:57:45 +00:00
506d8db8a4
Fix test
...
llvm-svn: 35683
2007-04-05 16:43:09 +00:00
cce90f55ed
Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.
...
llvm-svn: 35678
2007-04-04 23:48:25 +00:00
029ea7ee74
Fix test
...
llvm-svn: 35673
2007-04-04 21:28:36 +00:00
915e61736b
Properly emit range comparisons for switch cases, where neighbour cases
...
go to the same destination. Now we're producing really good code for
switch-lower-feature.ll testcase
llvm-svn: 35672
2007-04-04 21:14:49 +00:00
8f61b79d60
Better still.
...
llvm-svn: 35663
2007-04-04 08:49:40 +00:00
06df995e9f
Fix test case.
...
llvm-svn: 35662
2007-04-04 07:41:33 +00:00
ee06655d6b
These got better.
...
llvm-svn: 35661
2007-04-04 07:41:15 +00:00
07d353c9d7
New asm test case.
...
llvm-svn: 35641
2007-04-04 00:15:17 +00:00
10a25d43fa
New test case.
...
llvm-svn: 35636
2007-04-03 23:40:54 +00:00
2c2ec5f138
New test case.
...
llvm-svn: 35628
2007-04-03 21:38:03 +00:00
67f99e955b
new testcase, where we should use a negative stride
...
llvm-svn: 35608
2007-04-03 00:13:16 +00:00
d9eb0d9f5a
Add a regtest for cases we now recognize as rotates, thanks to Scott Michel's
...
recent dagcombine patch
llvm-svn: 35606
2007-04-02 22:08:54 +00:00
dd59227a73
fix this testcase on ppc hosts
...
llvm-svn: 35603
2007-04-02 20:39:48 +00:00
f7f8e349d6
New test case.
...
llvm-svn: 35599
2007-04-02 18:47:13 +00:00
be96c646dc
new testcase.
...
llvm-svn: 35591
2007-04-02 06:33:10 +00:00
745f59bfde
new testcase
...
llvm-svn: 35589
2007-04-02 05:57:59 +00:00
0a844d8df1
my patch fixed the fixme.
...
llvm-svn: 35582
2007-04-02 05:08:54 +00:00
4cb30067c2
new testcase for PR1296
...
llvm-svn: 35574
2007-04-02 01:32:59 +00:00
6be85337b0
- Divides the comparisons in two types: comparisons that only use N and Z
...
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).
llvm-svn: 35573
2007-04-02 01:30:03 +00:00
84c90a9431
Let llvm-upgrade upgrade the bswap intrinsic.
...
llvm-svn: 35569
2007-04-02 01:09:19 +00:00
0b544372d4
Let llvm-upgrade upgrade bswap intrinsic.
...
llvm-svn: 35568
2007-04-02 01:08:02 +00:00
a5f996bd27
Revert the name changes for llvm.bswap to allow (and test) llvm-upgrade of
...
this intrinsic.
llvm-svn: 35566
2007-04-02 00:51:15 +00:00
c3d87685ad
For PR1297:
...
Update these test cases to use proper signatures for bswap which is now
and overloaded intrinsic. Its name must be of the form llvm.bswap.i32.i32
since both the parameter and the result or of type "iAny". Also, the
bit counting intrinsics changed to always return i32.
llvm-svn: 35548
2007-04-01 07:36:28 +00:00
67a49736af
Missing '&&'
...
llvm-svn: 35519
2007-03-30 22:03:49 +00:00
d1440c429f
add a testcase for x86
...
llvm-svn: 35516
2007-03-30 21:22:46 +00:00
1d78d3deeb
New test case.
...
llvm-svn: 35515
2007-03-30 20:41:18 +00:00
9ca63d605c
Test case for PR1279 (part 2).
...
llvm-svn: 35511
2007-03-30 20:15:22 +00:00
17331da6bd
new testcases
...
llvm-svn: 35433
2007-03-28 18:11:17 +00:00
66cb5db76f
new testcase
...
llvm-svn: 35432
2007-03-28 18:03:14 +00:00
44259a29c0
Remove use of implementation keyword.
...
llvm-svn: 35412
2007-03-28 02:38:26 +00:00
1f4acbfea9
Added a test case for PR1279.
...
llvm-svn: 35398
2007-03-28 01:32:57 +00:00
ae0f8dcd61
upgrade a random test
...
llvm-svn: 35395
2007-03-28 01:27:12 +00:00
44a7f3a65d
Test case for PR1266.
...
llvm-svn: 35367
2007-03-26 22:58:35 +00:00
6e30008249
Add "feature" testcase for new switch lowering code
...
llvm-svn: 35345
2007-03-25 22:01:14 +00:00
25f82845b3
new testcase
...
llvm-svn: 35331
2007-03-25 05:00:23 +00:00
31b80d55ee
test that the ppc backend can do 64-bit cntlz
...
llvm-svn: 35328
2007-03-25 04:43:51 +00:00
6089146aa3
new testcase
...
llvm-svn: 35326
2007-03-25 04:35:23 +00:00
f4579c7872
new testcase
...
llvm-svn: 35323
2007-03-25 02:17:58 +00:00
421ac38bd6
new testcase
...
llvm-svn: 35317
2007-03-25 01:44:40 +00:00
9a95c6e7db
Another test case.
...
llvm-svn: 35255
2007-03-22 01:55:16 +00:00
51ace3b1f6
Test case for PR1257
...
llvm-svn: 35253
2007-03-22 01:52:57 +00:00
a7f81f29ce
New test case.
...
llvm-svn: 35240
2007-03-21 20:14:56 +00:00
a88c4a74f3
bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
...
mov lr, pc
bx lr
So, the function was not called.
llvm-svn: 35218
2007-03-20 17:57:23 +00:00
d95d748a4d
These functions should use shll, not lea.
...
llvm-svn: 35203
2007-03-20 06:01:41 +00:00
7953b683fc
For PR1258:
...
Revise numeric value references to accommodate collapsed type planes.
llvm-svn: 35170
2007-03-19 18:27:35 +00:00
bbe11722e2
GEP index sink test case.
...
llvm-svn: 35131
2007-03-17 03:18:32 +00:00
ac1f488548
Test case for X86 inline asm constraint 'I'
...
llvm-svn: 35130
2007-03-17 00:14:52 +00:00
144b8bbf17
And now support for MMX logical operations.
...
llvm-svn: 35125
2007-03-16 09:44:46 +00:00
e31034125c
Multiplication support for MMX.
...
llvm-svn: 35118
2007-03-15 21:24:36 +00:00
70e16d5e17
ARM isel should match ldr x +/- x * (2^n) to ldr [x, +/- x, lsl #log2(n)].
...
llvm-svn: 35114
2007-03-14 23:26:40 +00:00
b59d60da40
New test.
...
llvm-svn: 35091
2007-03-13 23:31:47 +00:00
ca6fab953f
This got better.
...
llvm-svn: 35090
2007-03-13 23:26:41 +00:00
e9b81f5366
Adding more arithmetic operators to MMX. This is an almost exact copy of
...
the addition. Please let me know if you have suggestions.
llvm-svn: 35055
2007-03-10 09:57:05 +00:00
fe7b8a7c68
Test inline asm modifier 'c'.
...
llvm-svn: 35036
2007-03-08 22:45:31 +00:00
577e8b4ed8
upgrade this testcase, add test for fp immediate to memory operand.
...
llvm-svn: 35034
2007-03-08 22:33:06 +00:00
c8eb6b1b15
Add MMX arithmetic testcase.
...
llvm-svn: 35032
2007-03-08 22:14:51 +00:00
f4d1ee7ff2
Fix test case.
...
llvm-svn: 35029
2007-03-08 19:27:32 +00:00
a5c7f5d622
New test case.
...
llvm-svn: 35006
2007-03-07 08:12:39 +00:00
bd88f2ebde
New test case.
...
llvm-svn: 34991
2007-03-07 00:13:48 +00:00
b1c86b49ea
Add the emms intrinsic for MMX support.
...
llvm-svn: 34938
2007-03-05 23:09:45 +00:00
f10769dda7
Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS.
...
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.
llvm-svn: 34931
2007-03-05 17:59:58 +00:00
4bdd578f8a
new testcase, corresponds to:
...
long long test(long long A, unsigned B) {
return (A + ((long long)B << 32));
}
llvm-svn: 34911
2007-03-04 20:39:47 +00:00
6053ad4252
New testcase for PR1239
...
llvm-svn: 34892
2007-03-03 23:42:50 +00:00
b7bef1bc74
Add a new test case.
...
llvm-svn: 34842
2007-03-02 10:37:19 +00:00
af8be4458f
Ensure that fastcall'ed function is correctly mangled & stack is
...
properly aligned
llvm-svn: 34788
2007-03-01 16:29:22 +00:00
debe91c78a
Eliminate enable-x86-fastcc
...
llvm-svn: 34753
2007-02-28 18:38:58 +00:00
cbb545158b
fastcc -> fastcall
...
llvm-svn: 34749
2007-02-28 18:35:36 +00:00
559b60da64
fastcc -> fastcall
...
llvm-svn: 34747
2007-02-28 18:21:50 +00:00
6fa4086649
fastcc -> fastcall
...
llvm-svn: 34746
2007-02-28 17:42:50 +00:00
add648e3e5
Fix test case.
...
llvm-svn: 34710
2007-02-28 00:36:33 +00:00
ca8c58f8b7
This test passes on x86/Linux now.
...
llvm-svn: 34686
2007-02-27 20:46:44 +00:00
8cd69de23e
XFAIL this on x86-Linux until its fixed.
...
llvm-svn: 34651
2007-02-27 02:45:12 +00:00
900b4f62be
new testcase
...
llvm-svn: 34622
2007-02-26 03:16:20 +00:00
c864f6a786
new testcase
...
llvm-svn: 34614
2007-02-25 23:08:29 +00:00
39a72143cb
new testcase
...
llvm-svn: 34612
2007-02-25 22:23:15 +00:00
619d4bddc7
Test for PR1224.
...
llvm-svn: 34609
2007-02-25 21:43:21 +00:00
2b8b520e53
verify that double is returned in XMM0 if the function is fastcc.
...
llvm-svn: 34591
2007-02-25 09:30:03 +00:00
26ef86b6fe
new testcase
...
llvm-svn: 34583
2007-02-25 08:23:01 +00:00
64b8352586
verify i128 return on x86-64 continues to codegen optimally.
...
llvm-svn: 34575
2007-02-25 06:06:49 +00:00
5af36e7e7c
testcase for PR1219
...
llvm-svn: 34550
2007-02-24 02:08:00 +00:00
a33fd51520
Make the testcase correct.
...
llvm-svn: 34543
2007-02-23 23:23:41 +00:00
9d9e5e2b34
Testcase for PR1164
...
llvm-svn: 34542
2007-02-23 23:19:32 +00:00
77a345f000
PR1164:
...
Generate local names with a "llvm_cbe_" prefix using the actual name of the
variable instead of a temporary name.
llvm-svn: 34540
2007-02-23 22:45:08 +00:00
4938bb7268
New test - practically wrote itself.
...
llvm-svn: 34538
2007-02-23 22:12:08 +00:00
0eb70ebbe5
bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
...
llvm-svn: 34537
2007-02-23 21:53:48 +00:00
3e906c48d3
Fix stack alignment in functions with varargs.
...
llvm-svn: 34532
2007-02-23 20:32:57 +00:00
fa6532a3b9
-march=arm -enable-thumb => -march=thumb
...
llvm-svn: 34522
2007-02-23 03:15:39 +00:00
0c99b096c5
Added test case for PR1207.
...
llvm-svn: 34429
2007-02-19 21:53:59 +00:00
d5cfe7d004
Fix test case.
...
llvm-svn: 34427
2007-02-19 21:47:02 +00:00
3723c90455
new test
...
llvm-svn: 34372
2007-02-17 06:57:11 +00:00
2be2ab59d5
Test that large absolute addresses are properly folded into addr modes on
...
both ppc32 and ppc64.
llvm-svn: 34370
2007-02-17 06:41:57 +00:00
bc9111e290
new testcase that crashes llc
...
llvm-svn: 34367
2007-02-17 05:59:01 +00:00
0552e3b580
adding PR 1200 comment by request
...
llvm-svn: 34360
2007-02-17 01:12:15 +00:00
12920dda9e
Fixes PR 1200
...
llvm-svn: 34359
2007-02-17 00:44:34 +00:00
e19f84cf28
testcase for recent targetdata regression
...
llvm-svn: 34355
2007-02-16 23:11:43 +00:00
9a3e3222e9
Update this test to compile properly and check against the correct
...
string generated by the CBE. This is no longer an XFAIL.
llvm-svn: 34327
2007-02-15 21:01:58 +00:00
20abdffa00
sanity check for *basic* i128 arithmetic on all hosts.
...
llvm-svn: 34259
2007-02-13 23:59:21 +00:00
9b600ab5a6
new testcase, by Dan Gohman
...
llvm-svn: 34255
2007-02-13 23:41:24 +00:00
048e16ff8f
Add ABI information to ARM subtarget.
...
llvm-svn: 34245
2007-02-13 19:52:28 +00:00
603f201cba
According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned.
...
llvm-svn: 34241
2007-02-13 14:07:13 +00:00
72df49f506
new testcase for PR1197
...
llvm-svn: 34215
2007-02-13 01:05:10 +00:00
133ae0b2a6
Add ppc-specific test for better i64 compare codegen.
...
llvm-svn: 34082
2007-02-09 04:49:46 +00:00
815c25d191
i64 setcc tests.
...
llvm-svn: 34067
2007-02-08 22:27:55 +00:00
08dfee58d9
New test case.
...
llvm-svn: 34001
2007-02-07 09:24:03 +00:00
5a165de53c
Add a DYNAMIC_STACKALLOC test case.
...
llvm-svn: 33959
2007-02-06 07:18:27 +00:00
07e13789e5
testcase for pr1181
...
llvm-svn: 33956
2007-02-06 06:07:34 +00:00
809cbf527f
Fix unord test.
...
llvm-svn: 33910
2007-02-05 16:33:56 +00:00
61ae7b7869
Make the RUN: line readable.
...
llvm-svn: 33906
2007-02-05 10:09:41 +00:00
4e76c3a482
For PR411:
...
Don't re-use var names.
llvm-svn: 33899
2007-02-05 04:00:04 +00:00
03503b5e31
new testcase for x86 backend miscompilation
...
llvm-svn: 33883
2007-02-04 20:15:15 +00:00
9d851fca1e
Add a test case.
...
llvm-svn: 33833
2007-02-03 09:14:10 +00:00
bcc6db26e1
__builtin_isunordered test case.
...
llvm-svn: 33808
2007-02-03 00:50:45 +00:00
1a0ae50528
Improves alloca test. Verifies SP restoration.
...
llvm-svn: 33802
2007-02-03 00:16:21 +00:00
2341c22ec7
Changes to support making the shift instructions be true BinaryOperators.
...
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
2007-02-02 02:16:23 +00:00
26cc265311
My mistake, my environment wasn't up to date. This passes now.
...
llvm-svn: 33769
2007-02-01 22:26:42 +00:00
a5dc052682
XFAIL this on x86 linux as it continues to fail.
...
llvm-svn: 33768
2007-02-01 22:10:46 +00:00
210cbc43a8
Add a test case.
...
llvm-svn: 33742
2007-02-01 02:27:24 +00:00
c79b96b00d
Added a thumb vararg test.
...
llvm-svn: 33740
2007-02-01 01:56:43 +00:00
667ff4832e
new testcase
...
llvm-svn: 33731
2007-02-01 00:38:56 +00:00
b7a08adae6
Fix test case.
...
llvm-svn: 33730
2007-01-31 23:51:35 +00:00
53ac41cd54
Fix test cases.
...
llvm-svn: 33725
2007-01-31 22:27:07 +00:00
7ae4f5599e
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
...
llvm-svn: 33703
2007-01-31 13:12:46 +00:00
421fdb2a7e
Combine two tests.
...
llvm-svn: 33668
2007-01-30 23:06:22 +00:00
af6a408117
For PR411:
...
Update these tests to not use the same name even though the type of the
value differs. After PR411 hits, type planes will be gone and it will be
illegal for a name to be used twice, regardless of type.
llvm-svn: 33660
2007-01-30 16:16:01 +00:00
6ebc06f702
Make the input legal.
...
llvm-svn: 33655
2007-01-30 06:32:25 +00:00
fcb9b8b0b7
Add / merge tests.
...
llvm-svn: 33654
2007-01-30 03:06:19 +00:00
6acab41ede
test that the 'ir' constraint works.
...
llvm-svn: 33646
2007-01-29 23:55:20 +00:00
9699e54088
new testcase
...
llvm-svn: 33642
2007-01-29 23:45:03 +00:00
9f82ccb01f
Thumb tests.
...
llvm-svn: 33561
2007-01-27 00:05:14 +00:00
df446c6f72
Merge tests.
...
llvm-svn: 33560
2007-01-27 00:04:57 +00:00
ce380568b5
For PR761:
...
Remove "target endian/pointersize" or add "target datalayout" to make
the test parse properly or set the datalayout because defaults changes.
For PR645:
Make global names use the @ prefix.
For llvm-upgrade changes:
Fix test cases or completely remove use of llvm-upgrade for test cases
that cannot survive the new renaming or upgrade capabilities.
llvm-svn: 33533
2007-01-26 08:25:06 +00:00
b03e9118be
Fix test case.
...
llvm-svn: 33507
2007-01-25 22:28:32 +00:00
b5c595c568
fix fcopysign test
...
llvm-svn: 33503
2007-01-25 22:11:02 +00:00
dda311a784
Added some load from stack frames test cases.
...
llvm-svn: 33473
2007-01-24 02:27:03 +00:00
029a72b9fa
Thumb test cases.
...
llvm-svn: 33471
2007-01-23 23:28:50 +00:00
36b74471c8
Thumb test cases.
...
llvm-svn: 33468
2007-01-23 22:47:58 +00:00
76231aad45
Make it work for both Linux and Mac OS.
...
llvm-svn: 33451
2007-01-22 23:18:10 +00:00
136cf76a27
Pasto
...
llvm-svn: 33444
2007-01-22 23:01:22 +00:00
527faab942
Fix test case.
...
llvm-svn: 33432
2007-01-22 18:57:39 +00:00
fec133d2d1
Add test case extracted from lencod. Spiller was infinite looping in GetRegForReload().
...
llvm-svn: 33383
2007-01-19 22:43:14 +00:00
a5007faaa6
ARM test cases contributed by Apple.
...
llvm-svn: 33354
2007-01-19 09:20:23 +00:00
062a3b8241
For PR1028:
...
Ensure the CBE generates calls to GCC builtins for stack_save and
stack_restore when it encounters the corresponding intrinsics.
Patch by Gordon Henriksen.
llvm-svn: 33312
2007-01-17 23:20:43 +00:00
3f6d52834b
* Fix one more bug in PIC codegen: extra load is needed for *all*
...
non-statics.
* Introduce new option to output zero-initialized data to .bss section.
This can reduce size of binaries. Enable it by default for ELF &
Cygwin/Mingw targets. Probably, Darwin should be also added.
llvm-svn: 33299
2007-01-17 10:33:08 +00:00
83b3d82672
Regression is gone, don't try to find it on clean target.
...
llvm-svn: 33296
2007-01-17 07:59:14 +00:00
Chris Lattner