Commit Graph

411405 Commits

Author SHA1 Message Date
Carl Ritson ed4d8fdafd [AMDGPU] Autogenerate wqm.ll
Switch wqm.ll to be autogenerated.
Replace gfx6 and gfx8 targets with gfx9 (wave64) and gfx10 (wave32).

Reviewed By: kmitropoulou

Differential Revision: https://reviews.llvm.org/D117455
2022-01-18 16:04:40 +09:00
Mehdi Amini 79dffbadf6 Fix flang build after MLIR API change
In c8e047f5e1 the default for useDefault{Type/Attribute}PrinterParser
was changed in ODS, restore the old value explicitly for the FirDialect.
2022-01-18 07:00:51 +00:00
jacquesguan 1090000b63 [RISCV] Add patterns for vector widening floating-point multiply
Add patterns for vector widening floating-point multiply

Differential Revision: https://reviews.llvm.org/D117530
2022-01-18 14:52:43 +08:00
Mehdi Amini 78fdbdbf26 Use reference for large object passed by value at the moment in MLIR TableGen (NFC)
Also make the ODS Operator class have const iterator, and use const
references for existing API taking Operator by reference.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D117516
2022-01-18 06:48:33 +00:00
Mehdi Amini 7265688e09 Use more references in MLIR Diagnostic handling (NFC)
This saves some copies of non-trivial objects, flagged by Coverity.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D117525
2022-01-18 06:45:04 +00:00
John Ericson f16a4a034a [libcxx][libcxxabi][libunwind][cmake] Use `GNUInstallDirs` to support custom installation dirs
I am breaking apart D99484 so the cause of build failures is easier to
understand.

Differential Revision: https://reviews.llvm.org/D117417
2022-01-18 06:44:57 +00:00
Mehdi Amini c8e047f5e1 Enable useDefault{Type/Attribute}PrinterParser by default in ODS Dialect definition
The majority of dialects reimplement the same boilerplate over and over,
switching the default makes it for better discoverability and make it simpler
to implement new dialects.

Differential Revision: https://reviews.llvm.org/D117524
2022-01-18 06:36:34 +00:00
Lang Hames ade71641dc [ORC] Add Platform::teardownJITDylib method.
This is a counterpart to Platform::setupJITDylib, and is called when JITDylib
instances are removed (via ExecutionSession::removeJITDylib).

Upcoming MachOPlatform patches will use this to clear per-JITDylib data when
JITDylibs are removed.
2022-01-18 16:27:02 +11:00
Han-Kuan Chen ec9cb3a79c [RISCV] Provide VLOperand in td.
Currently, users expected VL is the last operand. However, since some
intrinsics has tail policy in the last operand, this rule cannot be used
anymore.

Reviewed By: craig.topper, frasercrmck

Differential Revision: https://reviews.llvm.org/D117452
2022-01-17 20:25:47 -08:00
Han-Kuan Chen 3fc4b5896a [RISCV] Make SplatOperand start from 0.
Current SplatOperand starts from 1 because operand 0 (or 1) is intrinsic
id in SelectionDAG.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117453
2022-01-17 20:14:59 -08:00
jacquesguan c29d6c410e [RISCV] Add patterns for vector widening floating-point add/subtract instructions
Add patterns for Vector Widening Floating-Point Add/Subtract Instructions

Differential Revision: https://reviews.llvm.org/D117466
2022-01-18 10:33:56 +08:00
Alexander Shaposhnikov 2bb7f226af [lld] Fix typo. NFC 2022-01-18 02:33:27 +00:00
Lang Hames b396a6dc0c [ORC] Fix a stale comment: lookupInitSymbolsAsync does not build a result map. 2022-01-18 11:55:23 +11:00
Shao-Ce SUN efd72ee23b [NFC][SDNode] Use `StringSwitch` instead of `if`
Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117448
2022-01-18 08:12:26 +08:00
Sanjay Patel ba6485e25f [SDAG] add demanded bits transform for bswap
A possible codegen regression for PowerPC is noted in D117406
because we don't recognize a pattern that demands only 1 byte
from a bswap.

This fold  has existed in IR since close to the beginning of LLVM:
https://github.com/llvm/llvm-project/blame/main/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp#L794
...so this patch copies that code as much as possible and adapts
it for SDAG.

The test for PowerPC that would change in D117406 is over-reduced
with undefs, so I recreated it for AArch64 and x86 by passing in
pointer args and renamed the values to make the logic clearer.

Differential Revision: https://reviews.llvm.org/D117508
2022-01-17 18:25:42 -05:00
Mehdi Amini e965d068e0 Pass options by const ref in TestLinalgCodegenStrategy (NFC)
These aren't small object, fix Coverity report.
2022-01-17 23:16:47 +00:00
Philip Reames 26049b8ce3 [GlobalOpt] Generalize malloc-to-global for any allocation function
We can generalize the malloc-to-global transform for other allocation functions which are both a) removable, and b) have a known initialization value.

One subtlety that I want to point out - mostly because I hadn't realized it was true until I took a closer look - is that the existing code doesn't prove that initialization/malloc happens only once. The initialization function can be called multiple times. This is correct without special handling for malloc as undef can map to any value previously written, but a non-undef initializing allocation it means we may end up memseting the new global repeatedly. In particular, this means it's not legal to fold the memset into the initializer of the global.

Differential Revision: https://reviews.llvm.org/D117503
2022-01-17 15:06:23 -08:00
Philip Reames 30715365d4 [test] precommit new test for D117503 2022-01-17 15:00:18 -08:00
Craig Topper 116af698e2 [RISCV] When expanding CONCAT_VECTORS, don't create INSERT_SUBVECTORS for undef subvectors.
For fixed vectors, the undef will get expanded to an all zeros
build_vector. We don't want that so suppress creating the
insert_subvector.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D117379
2022-01-17 14:40:59 -08:00
Craig Topper 9c410838d2 [RISCV] Legalize fixed length (insert_subvector undef, X, 0) to a scalable insert.
We were considering this legal, but later the undef would become an all
zeros vector. This would cause us to need to re-legalize the insert later
into a vslideup with zero vector.

This patch catches the case and directly legalizes it to a scalable
insert.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D117377
2022-01-17 14:31:30 -08:00
Joseph Huber 4869a22d1d [Libomptarget] Add `cold` to KeepAlive attributes
This patch adds the `cold` attribute to the keepAlive functions in the
RTL. This dummy function exists to keep certain RTL calls alive without
them being optimized out, but it is never called and can be declared
cold. This also helps some erroneous remarks being given on this
function because it has weak linkage and cannot be made internal.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D117513
2022-01-17 17:29:26 -05:00
Fangrui Song 83c7f5d3fb [ELF] EhInputSection::split: remove unneeded check 2022-01-17 13:59:52 -08:00
Arthur O'Dwyer 459b4b725f [libc++] [API BREAK] Change `fs::path::iterator::iterator_category` to `input_iterator_tag`.
This essentially reverts e02ed1c255 and puts in a new fix, which makes `path::iterator`
a true C++20 `bidirectional_iterator`, but downgrades it to an `input_iterator` in C++17.

Fixes #37852.

Differential Revision: https://reviews.llvm.org/D116489
2022-01-17 16:33:23 -05:00
Arthur O'Dwyer 5820322cb1 [libc++] [test] UNSUPPORTED my new uniform_int_distribution test on MinGW.
After 9fe67486cc, this test fails on MinGW for some reason.
https://buildkite.com/llvm-project/libcxx-ci/builds/7922#9e267294-441d-4b79-8a19-30fdb5599c1f
All it says in the build output is

    note: command had no output on stdout or stderr
    error: command failed with exit status: 4294967295
2022-01-17 16:32:44 -05:00
LLVM GN Syncbot bc17de79ee [gn build] Port e69a3d18f4 2022-01-17 21:32:04 +00:00
Michał Górny e69a3d18f4 [lldb] [gdb-remote] Support client fallback for servers without reg defs
Provide minimal register definition defaults for working with servers
that implement neither target.xml nor qRegisterInfo packets.  This is
useful e.g. when interacting with FreeBSD's kernel minimal gdbserver
that does not send target.xml but uses the same layout for its supported
register subset as GDB.

The prerequisite for this is the ability to determine the correct
architecture, e.g. from the target executable.

Differential Revision: https://reviews.llvm.org/D116896
2022-01-17 22:31:49 +01:00
Sean Fertile 10d3bf9518 [PowerPC][AIX] Fallback to DAG-ISEL if global has toc-data attribute.
FAST-ISEL should fall back to DAG-ISEL when a global variable has the
toc-data attribute. A number of the checks were duplicated in the lit
test becuase of
1) Slightly different output between -O0 and -O2 due to FAST-ISEL vs
   DAG-ISEL codegen.
2) In preperation of a peephole optimization that will run when
   optimizations are enabled.

Differential Revision: https://reviews.llvm.org/D115373
2022-01-17 16:21:38 -05:00
Benjamin Kramer 964dc368e7 [AsyncToLLVM] aligned_alloc requires the size to be a multiple of aignment, so round up
Fixes a crash with debug malloc.
2022-01-17 21:48:00 +01:00
Sanjay Patel 5fb39f0992 [AArch64][x86] add tests for bswap demanded bits; NFC 2022-01-17 15:43:02 -05:00
Philip Reames 6ca192de58 [LoopDeletion] Add back statistic update lost in 523573e
Caught by a couple of builders as an unused variable warning (e.g. https://lab.llvm.org/buildbot#builders/57/builds/13973).
2022-01-17 12:20:51 -08:00
Fabian Wolff 2cd2accc61 [clang-tidy] Fix false positives involving type aliases in `misc-unconventional-assign-operator` check
clang-tidy currently reports false positives even for simple cases such as:
```
struct S {
    using X = S;
    X &operator=(const X&) { return *this; }
};
```
This is due to the fact that the `misc-unconventional-assign-operator` check fails to look at the //canonical// types. This patch fixes this behavior.

Reviewed By: aaron.ballman, mizvekov

Differential Revision: https://reviews.llvm.org/D114197
2022-01-17 21:16:17 +01:00
Nikolas Klauser c10cbb243c [libc++] Install clang-tidy in docker containers
Install clang-tidy

Reviewed By: ldionne, #libc

Spies: sammccall, mgorny, libcxx-commits, arichardson

Differential Revision: https://reviews.llvm.org/D117268
2022-01-17 21:05:42 +01:00
John Ericson c90d136be4 [pstl][cmake] Use `GNUInstallDirs` to support custom installation dirs
I am breaking apart D99484 so the cause of build failures is easier to
understand.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D117418
2022-01-17 20:04:46 +00:00
Fangrui Song e5c944b47c [Support] Fix -Wreturn-type in LLVM_ENABLE_THREADS=OFF build after D116846 2022-01-17 12:04:30 -08:00
Fabian Wolff 42bc3275d3 [clang-tidy] Fix `readability-redundant-declaration` false positive for template friend declaration
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=48086 | PR#48086 ]]. The problem is that the current matcher uses `hasParent()` to detect friend declarations, but for a template friend declaration, the immediate parent of the `FunctionDecl` is a `FunctionTemplateDecl`, not the `FriendDecl`. Therefore, I have replaced the matcher with `hasAncestor()`.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D114299
2022-01-17 20:50:32 +01:00
Philip Reames 523573e90d [LoopDeletion] Revert 3af8a11 and add test coverage for breakage
This reverts 3af8a11 because I'd used an upper bound where an lower bound was required.  The included reduced test case demonstrates the issue.
2022-01-17 11:44:03 -08:00
Nicolas Vasilache f40a579bea Revert "[mlir][Linalg] NFC - Drop vectorization reliance on ConvolutionOpInterface"
This reverts commit c8f5735301.

The integration tests are broken.
2022-01-17 19:38:07 +00:00
Nikolas Klauser caf5548c7c [libc++] Introduce __debug_db_insert_i()
Introduce `__debug_db_insert_i()`

Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D117410
2022-01-17 20:31:21 +01:00
Arthur O'Dwyer 0e03c62b4c [libc++] [bench] Stop using uniform_int_distribution<char> in benchmarks.
Reviewed as part of D114920.
2022-01-17 14:31:33 -05:00
Arthur O'Dwyer 01193cae1c [libc++] [doc] Fix a Sphinx error in ReleaseNotes.rst (I hope) 2022-01-17 14:29:59 -05:00
Simon Pilgrim fea85d322d [X86] Add test case for PR53247
Test case from Issue #53247
2022-01-17 19:02:44 +00:00
Akshay Kumar 6f61fe7de9 [Aarch64] Customer lowering of COPYSIGN to SIMD should check for NEON availability
For the following test case, clang is crashing for ARM64 architecture
$ cat crash.c
double crash(double a, double b)
{
	return __builtin_copysign(a, b);
}

$ clang -O2 -march=armv8-a+nosimd --target=arm64 -S crash.c -o /dev/null
fatal error: error in backend: Cannot select: 0x7fae361bb4e8: v2i64 = AArch64ISD::BIT 0x7fae361bb210, 0x7fae361bb278, 0x7fae361bb480
Fix: PR51806

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D116581
2022-01-18 00:25:15 +05:30
Nikolas Klauser 311207bbea [libc++][P2321R2] Add specializations of basic_common_reference and common_type for tuple
Add specializations of `basic_common_reference` and `common_type` for `tuple`

Reviewed By: ldionne, Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D116538
2022-01-17 19:49:57 +01:00
Nikolas Klauser d7630b37ce [libc++][NFC] Use _LIBCPP_DEBUG_ASSERT in <vector>
Use `_LIBCPP_DEBUG_ASSERT` in `<vector>`

Reviewed By: Quuxplusone, ldionne, Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D117402
2022-01-17 19:28:16 +01:00
Fangrui Song ac0986f880 [ELF] Change std::vector<InputSectionBase *> to SmallVector
There is no remaining std::vector<InputSectionBase> now. My x86-64 lld
executable is 2KiB small.
2022-01-17 10:25:07 -08:00
Benjamin Kramer 5acd6e0522 [AsyncToLLVM] Align frames to 64 bytes
Coroutine lowering always takes the natural alignment when spilling to
the frame (issue #53148) so using AVX2 or AVX512 in a coroutine doesn't
work. Always overalign to 64 bytes to avoid this issue until we have a
better solution.

Differential Revision: https://reviews.llvm.org/D117501
2022-01-17 18:51:42 +01:00
Nicolas Vasilache 392e16c27f [mlir][Linalg] NFC - Cleanup conv1d generators
Differential Revision: https://reviews.llvm.org/D117330
2022-01-17 17:39:19 +00:00
Dmitry Preobrazhensky c7ca4c6365 [AMDGPU][GFX10][MC] Updated symbolic names of internal HW registers
GFX10 no longer support HW_ID. It has been replaced with HW_ID1 and HW_ID2.
See bug 52904: https://github.com/llvm/llvm-project/issues/52904

Differential Revision: https://reviews.llvm.org/D117313
2022-01-17 20:29:10 +03:00
Dmitry Preobrazhensky b5fb7e485e [AMDGPU][MC] Corrected disassembly of s_waitcnt
s_waitcnt with default expcnt, vmcnt and lgkmcnt values was disassembled without arguments.
See https://github.com/llvm/llvm-project/issues/52716

Differential Revision: https://reviews.llvm.org/D117305
2022-01-17 20:22:03 +03:00
Stephen Tozer 32417b3203 [DebugInfo] ValueMapper impl for DIArgList respects IgnoreMissingLocals
This patch fixes an issue in which SSA value reference within a
DIArgList would be unnecessarily dropped by llvm-link, even when
invoking on a single file (which should be a no-op). The reason for the
difference is that the ValueMapper does not refer to the
RF_IgnoreMissingLocals flag for LocalAsMetadata contained within a
DIArgList; this flag is used for direct LocalAsMetadata uses to preserve
SSA references even when the ValueMapper does not have an explicit
mapping for the referenced SSA value, which appears to always be the
case when using llvm-link in this manner.

Differential Revision: https://reviews.llvm.org/D114355
2022-01-17 17:17:32 +00:00