a5753b31be
X86FastISel support for conditional branches.
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llvm-svn: 55816
2008-09-05 01:06:14 +00:00
50288e3c99
Add initial support for selecting constant materializations that require constant
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pool loads on X86 in fast isel. This isn't actually used yet.
llvm-svn: 55814
2008-09-05 00:06:23 +00:00
09fdbcf400
X86FastISel support for ICmpInst and FCmpInst.
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llvm-svn: 55811
2008-09-04 23:26:51 +00:00
b8c7ba228f
Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
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llvm-svn: 55777
2008-09-04 16:48:33 +00:00
4f948bd87a
Add a first attempt at implementing stores for X86 fast isel using target hooks.
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Dan or Evan, please review.
llvm-svn: 55764
2008-09-04 07:08:58 +00:00
8d8f47d50b
Load from GV stub should be locally CSE'd.
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llvm-svn: 55763
2008-09-04 06:18:33 +00:00
7bda51f5a4
Create HandlePHINodesInSuccessorBlocksFast, a version of
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HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
llvm-svn: 55746
2008-09-03 23:12:08 +00:00
a41ee2974b
Add X86 target hook to implement load (even from GlobalAddress).
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llvm-svn: 55693
2008-09-03 06:44:39 +00:00
8f23ec96b0
Unbreak fast isel.
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llvm-svn: 55685
2008-09-03 01:04:47 +00:00
24422d4928
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
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llvm-svn: 55679
2008-09-03 00:03:49 +00:00
0673a8af14
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
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llvm-svn: 55545
2008-08-29 17:45:56 +00:00
d58f3e36d0
Add a target callback for FastISel.
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llvm-svn: 55512
2008-08-28 23:21:34 +00:00
49e19e906f
Factor out the predicate check code from DAGISelEmitter.cpp
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and use it in FastISelEmitter.cpp, and make FastISel
subtarget aware. Among other things, this lets it work
properly on x86 targets that don't have SSE, where it
successfully selects x87 instructions.
llvm-svn: 55156
2008-08-22 00:20:26 +00:00
daef7f43af
Instantiate FastISel for X86.
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llvm-svn: 55011
2008-08-19 21:45:35 +00:00
Dan Gohman