5e16c6a9b2
Implement byval structure argument passing. The following limitations or
...
deficiencies exist:
- Works only if ABI is o32.
- Zero-sized structures cannot be passed.
- There is a lot of redundancy in generated code.
llvm-svn: 131986
2011-05-24 19:18:33 +00:00
cb4a1a8d3f
Simplify offset calculation of stack frame objects for $gp restore location and
...
variable arguments in LowerCall and LowerFormalArguments. This should also fix
the bug in which handling of variable arguments is incorrect when the front-end
optimizes away unused fixed arguments.
llvm-svn: 131942
2011-05-24 00:23:52 +00:00
dfb8cda11f
Expand f64 FPOW.
...
llvm-svn: 131928
2011-05-23 22:23:58 +00:00
6af5bd2537
Add pattern for double-to-integer conversion. Patch by Sasa Stankovic.
...
llvm-svn: 131927
2011-05-23 22:16:43 +00:00
9dbb45b596
Fixes related to coding style.
...
llvm-svn: 131922
2011-05-23 21:13:59 +00:00
90d96f44ce
Fix MipsAsmPrinter::printSavedRegsBitmaskChange. Remove functions and variables
...
in MipsFunctionInfo that are no longer used.
llvm-svn: 131917
2011-05-23 20:34:30 +00:00
f9e5750fc8
Change StackDirection from StackGrowsUp to StackGrowsDown.
...
The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
the stack pointer) are set before instruction selection is completed. There is
no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
no longer necessary to assign negative offsets to fixed objects for incoming
arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in
MipsFrameLowering::adjustMipsStackFrame.
llvm-svn: 131915
2011-05-23 20:16:59 +00:00
2df6c010aa
Use the correct register to access stack frame objects.
...
llvm-svn: 131785
2011-05-21 03:01:03 +00:00
f084fcd7fe
Insert instructions that copy $sp to or from $fp at the right locations.
...
llvm-svn: 131784
2011-05-21 02:29:26 +00:00
0837692ac6
Change the order fixed objects are created in MipsTargetLowering::LowerCall in
...
preparation for reversing StackDirection.
Fixed objects are created in the following order:
1. Incoming arguments passed on stack.
2. va_arg objects (include both arguments that are passed in registers and
pointer to the location of the first va_arg argument).
3. $gp restore slot.
4. Outgoing arguments passed on stack.
5. Pointer to alloca'd space.
llvm-svn: 131767
2011-05-20 23:22:14 +00:00
7c619f174a
In CC_MipsO32, allocate a stack space regardless of whether the argument is
...
passed in register or on the stack.
llvm-svn: 131758
2011-05-20 21:39:54 +00:00
cae19e8671
Define functions that get/set maximum call frame size.
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llvm-svn: 131752
2011-05-20 20:11:17 +00:00
43407fe633
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
...
saving and restoring them.
llvm-svn: 131745
2011-05-20 18:39:33 +00:00
cc7a928885
Remove noisy semicolons.
...
llvm-svn: 131724
2011-05-20 09:20:25 +00:00
fe4f9d5977
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
...
llvm-svn: 131714
2011-05-20 02:30:51 +00:00
7489faa0c1
Remove code that creates unnecessary frame objects.
...
llvm-svn: 131711
2011-05-20 01:45:06 +00:00
d738c0f7c9
Define variables and functions in MipsFunctionInfo.
...
This is the first of a series of patches that attempt to simplify handling of
stack frame objects.
llvm-svn: 131710
2011-05-20 01:17:58 +00:00
9e6a8cca5d
Align i64 arguments to 64 bit boundaries.
...
llvm-svn: 131668
2011-05-19 20:29:48 +00:00
05fd5aa1d0
Increase number of available registers when target is MIPS32.
...
llvm-svn: 131660
2011-05-19 18:25:03 +00:00
92ab6db6c8
Simplify CC_MipsO32 and merge it with CC_MipsO32_VarArgs. Patch by Sasa Stankovic.
...
llvm-svn: 131657
2011-05-19 18:06:05 +00:00
d1465bd68b
Fix data layout string. i64 is aligned to 64 bit boundaries.
...
llvm-svn: 131642
2011-05-19 17:21:09 +00:00
e50a3d16e9
Fix setting of isCommutable flag.
...
llvm-svn: 131233
2011-05-12 17:42:08 +00:00
5dc19f916c
Fix td file comments for Mips.
...
Patch by Liu <proljc@gmail.com>!
llvm-svn: 131086
2011-05-09 18:16:46 +00:00
cbb7fa68ed
1. Keep lines in 80 columns.
...
2. Remove unused function.
3. Correct indentation.
llvm-svn: 131028
2011-05-06 22:11:29 +00:00
2518f8376d
Make the logic for determining function alignment more explicit. No functionality change.
...
llvm-svn: 131012
2011-05-06 20:34:06 +00:00
2998e6ce46
Fix cmake build.
...
llvm-svn: 130850
2011-05-04 18:46:56 +00:00
23e8ecf125
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp.
...
llvm-svn: 130847
2011-05-04 17:54:27 +00:00
22fc723818
Fix function MipsRegisterInfo::getRegisterNumbering.
...
llvm-svn: 130774
2011-05-03 18:41:54 +00:00
0e7ee666b7
Lower BlockAddress node when relocation-model is static.
...
llvm-svn: 130131
2011-04-25 17:10:45 +00:00
56ca6292dc
Fix comment typo. Noticed by Liu.
...
llvm-svn: 130120
2011-04-25 06:21:43 +00:00
e24891251c
Reverse unnecessary changes made in r129606 and r129608. There is no change in functionality.
...
llvm-svn: 129612
2011-04-15 21:51:11 +00:00
d56f2d910b
Fix lines that exceed 80 columns. There is no change in functionality.
...
llvm-svn: 129608
2011-04-15 21:06:38 +00:00
aef55c8801
Fix lines that have incorrect indentation or exceed 80 columns. There is no change in functionality.
...
llvm-svn: 129606
2011-04-15 21:00:26 +00:00
7583dbdc88
Fix cmake build.
...
llvm-svn: 129601
2011-04-15 20:34:45 +00:00
279169771b
Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.
...
llvm-svn: 129594
2011-04-15 19:52:08 +00:00
0ab5e2cded
Fix a ton of comment typos found by codespell. Patch by
...
Luis Felipe Strano Moraes!
llvm-svn: 129558
2011-04-15 05:18:47 +00:00
052163e6d3
Fix indentation.
...
llvm-svn: 129105
2011-04-07 20:25:10 +00:00
94ee37e487
Update ATUsed every time after expandRegLargeImmPair is called.
...
llvm-svn: 129104
2011-04-07 20:23:26 +00:00
d6f1c58914
Fix handling of functions with internal linkage.
...
llvm-svn: 129099
2011-04-07 19:51:44 +00:00
5ec2ead9b0
Move transformation of JmpLink and related nodes done during instruction selection to Legalize phase.
...
llvm-svn: 128830
2011-04-04 17:11:07 +00:00
4111db6575
Undo changes mistakenly made in revision 128750.
...
llvm-svn: 128751
2011-04-02 00:26:12 +00:00
977f555a76
Insert space before ';' to prevent warnings.
...
llvm-svn: 128750
2011-04-02 00:15:58 +00:00
3d9df607ba
Remove redundant code. There are assignments to variables Base and Offset right after the code that is removed.
...
llvm-svn: 128742
2011-04-01 21:56:02 +00:00
56d9ef53a2
Simplifies logic for printing target flags.
...
llvm-svn: 128741
2011-04-01 21:41:06 +00:00
e625ba46b7
Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly.
...
llvm-svn: 128724
2011-04-01 18:57:38 +00:00
93f898f643
Add code for analyzing FP branches. Clean up branch Analysis functions.
...
llvm-svn: 128718
2011-04-01 17:39:08 +00:00
a535270d91
Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons.
...
llvm-svn: 128650
2011-03-31 18:26:17 +00:00
4e9ca1b3ba
fixed typo
...
llvm-svn: 128574
2011-03-30 21:15:35 +00:00
05a23b1e61
silence a conditional assignment -Wuninitialized warning.
...
llvm-svn: 127453
2011-03-11 02:12:51 +00:00
048ffabe78
Improve varags handling, with testcases. Patch by Sasa Stankovic
...
llvm-svn: 127349
2011-03-09 19:22:22 +00:00
88842e4574
Initialize variable.
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llvm-svn: 127038
2011-03-04 21:38:47 +00:00
434248a62c
Improve div/rem node handling on mips. Patch by Akira Hatanaka
...
llvm-svn: 127034
2011-03-04 21:03:24 +00:00
a744ef3f90
Expands register/immediate pairs when the immediate is too large to fit in 16-bit field. Patch by Akira Hatanaka
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llvm-svn: 127032
2011-03-04 20:48:08 +00:00
8887d6593f
Rewrite and simplify o32 vaarg passing, no functional changes. Patch by Sasa Stankovic
...
llvm-svn: 127029
2011-03-04 20:27:44 +00:00
f8198e4311
Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka
...
llvm-svn: 127027
2011-03-04 20:01:52 +00:00
328e2ce043
Fix an old copy-n-paste
...
llvm-svn: 127020
2011-03-04 19:20:24 +00:00
22b69db8dd
Expands FCOS and FSIN nodes when type is f64.
...
llvm-svn: 127017
2011-03-04 18:54:14 +00:00
db93ddb41b
Fixes addc pattern when immediate cannot be represented with 16-bit. Patch by Akira Hatanaka
...
llvm-svn: 127005
2011-03-04 17:59:18 +00:00
ed874eff93
Remove (hopefully) all trailing whitespaces from the mips backend. Patch by Hatanaka, Akira
...
llvm-svn: 127003
2011-03-04 17:51:39 +00:00
ba1186c23e
Use explicit add_subdirectory's for LLVM target sublibraries instead
...
of testing for its presence at cmake time.
This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.
llvm-svn: 126068
2011-02-20 02:55:27 +00:00
61a61e9da3
Fix a lot of o32 CC issues and add a bunch of tests. Patch by Akira Hatanaka with some small modifications by me.
...
llvm-svn: 125292
2011-02-10 18:05:10 +00:00
0e7e34e476
Remove more duplicated code.
...
llvm-svn: 124056
2011-01-23 04:43:11 +00:00
aea4958ea6
Remove duplicated code.
...
llvm-svn: 124054
2011-01-23 04:28:49 +00:00
95dbfac459
Ensure Mips::GP is properly reloaded after a function call. Patch by Sasa Stankovic
...
llvm-svn: 123768
2011-01-18 19:50:18 +00:00
b02a9dfa55
Negative zero is not legal on mips. Patch by Sasa Stankovic
...
llvm-svn: 123766
2011-01-18 19:41:41 +00:00
ac517fa9f7
Handle (i32,i32) => f64 in a cleaner way. Patch by Sasa Stankovic
...
llvm-svn: 123763
2011-01-18 19:38:25 +00:00
4dc73fa075
Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka
...
llvm-svn: 123760
2011-01-18 19:29:17 +00:00
4bc5e38960
Teach frame lowering to ignore debug values after the terminators.
...
llvm-svn: 123399
2011-01-13 21:28:52 +00:00
441ae5b88c
Update CMake stuff
...
llvm-svn: 123171
2011-01-10 12:39:23 +00:00
2f93128109
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
...
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
2a0a3b43d7
Flag -> Glue, the ongoing saga
...
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
9b43f33620
Change all self assignments X=X to (void)X, so that we can turn on a
...
new gcc warning that complains on self-assignments and
self-initializations.
llvm-svn: 122458
2010-12-23 00:58:24 +00:00
3e5fbd74ed
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
d47180e45e
Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka
...
llvm-svn: 121377
2010-12-09 17:32:30 +00:00
fde21cfa64
Fix delay slot filler for non mips1 targets. Patch by Akira Hatanaka
...
llvm-svn: 121376
2010-12-09 17:31:11 +00:00
b9bfd0945a
Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again
...
llvm-svn: 121164
2010-12-07 19:04:14 +00:00
f0c6e3780d
Match a pattern generated by a dag combiner opt where:
...
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))
Thanks to Akira for pointing that.
llvm-svn: 121163
2010-12-07 19:00:20 +00:00
527da1b6e2
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
...
llvm-svn: 119990
2010-11-23 03:31:01 +00:00
0eecf5d201
Move hasFP() and few related hooks to TargetFrameInfo.
...
llvm-svn: 119740
2010-11-18 21:19:35 +00:00
51d2e9ca29
Attempt to unbreak cmake-based builds
...
llvm-svn: 119098
2010-11-15 00:48:12 +00:00
f7183edb59
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
...
llvm-svn: 119097
2010-11-15 00:06:54 +00:00
66031ed839
move all the target's asmprinters into the main target. The piece
...
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.
llvm-svn: 119056
2010-11-14 18:43:56 +00:00
03c0330176
Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com>
...
llvm-svn: 118864
2010-11-12 00:38:32 +00:00
67fc18a493
Add clo instruction. Patch by Akira Hatanaka (ahatanaka@mips.com) with some minor tweaks
...
llvm-svn: 118667
2010-11-10 02:13:22 +00:00
9c5c829d9a
Fix trailing whitespace and style, no functionality change
...
llvm-svn: 118515
2010-11-09 17:25:34 +00:00
9c656fe815
Initial support for Mips32 and Mips32r2. Patch contributed by Akira Hatanaka (ahatanaka@mips.com)
...
llvm-svn: 118447
2010-11-08 21:42:32 +00:00
71049f78ed
In the calling convention logic, ValVT is always a legal type,
...
and as such can be represented by an MVT - the more complicated
EVT is not needed. Use MVT for ValVT everywhere.
llvm-svn: 118245
2010-11-04 10:49:57 +00:00
f5dda01f33
Inside the calling convention logic LocVT is always a simple
...
value type, so there is no point in passing it around using
an EVT. Use the simpler MVT everywhere. Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.
llvm-svn: 118167
2010-11-03 11:35:31 +00:00
e8360b7182
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
...
llvm-svn: 117667
2010-10-29 17:29:13 +00:00
0097dd0d5a
Add support to model pipeline bypass / forwarding.
...
llvm-svn: 115005
2010-09-28 23:50:49 +00:00
b4b12535e8
Removed a bunch of unnecessary target_link_libraries.
...
llvm-svn: 114999
2010-09-28 22:39:14 +00:00
e084cff9aa
Remove trailing spaces of MipsMachineFunction.h
...
llvm-svn: 114948
2010-09-28 10:06:53 +00:00
bb033893ca
Remove trailing spaces of MipsTargetObjectFile.cpp
...
llvm-svn: 114947
2010-09-28 09:55:24 +00:00
0e023ea02a
fix a long standing wart: all the ComplexPattern's were being
...
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
llvm-svn: 114471
2010-09-21 20:31:19 +00:00
802527adad
eliminate some uses of the getStore overload.
...
llvm-svn: 114453
2010-09-21 17:50:43 +00:00
7727d05dbb
convert the targets off the non-MachinePointerInfo of getLoad.
...
llvm-svn: 114410
2010-09-21 06:44:06 +00:00
44a2797e02
Remove Predicate_* calls from Mips
...
llvm-svn: 112919
2010-09-03 00:35:13 +00:00
6a77066913
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
...
to try to re-use scavenged frame index reference registers. rdar://8277890
llvm-svn: 112241
2010-08-26 23:32:16 +00:00
92d57cee61
Don't call Predicate_* in Mips.
...
llvm-svn: 111468
2010-08-18 23:56:46 +00:00
72a364c107
fix emacs language spec's, patch by Edmund Grimley-Evans!
...
llvm-svn: 111241
2010-08-17 16:20:04 +00:00
a7aed18624
Reapply r110396, with fixes to appease the Linux buildbot gods.
...
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
bda59bd247
Revert r110396 to fix buildbots.
...
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
755aceb5d0
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
...
ID member as the sole unique type identifier. Clean up APIs related to this change.
llvm-svn: 110396
2010-08-05 23:42:04 +00:00
160695fecb
Fix PR7174, a couple o Mips fixes:
...
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.
Patch by stetorvs@gmail.com
llvm-svn: 108820
2010-07-20 08:37:04 +00:00
ea7863647b
Fix Mips PR7473. Patch by stetorvs@gmail.com
...
llvm-svn: 108816
2010-07-20 07:58:51 +00:00
8289f78569
Remove the isMoveInstr() hook.
...
llvm-svn: 108567
2010-07-16 22:35:46 +00:00
92d8998348
Don't pass StringRef by reference.
...
llvm-svn: 108366
2010-07-14 22:38:02 +00:00
0961c55161
RISC architectures get their memory operand folding for free.
...
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
7002c31480
Replace copyRegToReg with copyPhysReg for Mips.
...
llvm-svn: 108066
2010-07-11 01:08:31 +00:00
60af0681cb
Use COPY in targets
...
llvm-svn: 108063
2010-07-10 22:43:03 +00:00
fe7532a308
Split the SDValue out of OutputArg so that SelectionDAG-independent
...
code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
a3ca21b228
Propagate debug loc.
...
llvm-svn: 107710
2010-07-06 22:08:15 +00:00
3439629239
Reapply r107655 with fixes; insert the pseudo instruction into
...
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
llvm-svn: 107691
2010-07-06 20:24:04 +00:00
f4f04107ef
Revert r107655.
...
llvm-svn: 107668
2010-07-06 15:49:48 +00:00
12205645a6
Fix a bunch of custom-inserter functions to handle the case where
...
the pseudo instruction is not at the end of the block.
llvm-svn: 107655
2010-07-06 15:18:19 +00:00
0664a67fe1
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
...
llvm-svn: 107550
2010-07-03 00:40:23 +00:00
c7927f2013
Remove isTwoAddress from Mips.
...
llvm-svn: 106465
2010-06-21 20:19:21 +00:00
0125b6410a
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
...
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
f2dffcef82
Remove the TargetRegisterClass member from CalleeSavedInfo
...
llvm-svn: 105344
2010-06-02 20:02:30 +00:00
ef2b6ce00a
cleanup
...
llvm-svn: 105322
2010-06-02 13:53:17 +00:00
7de379467e
Replace the SubRegSet tablegen class with a less error-prone mechanism.
...
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
llvm-svn: 104704
2010-05-26 17:27:12 +00:00
50eec620f4
Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
...
This reverts commit 104654.
llvm-svn: 104660
2010-05-26 01:21:14 +00:00
0b0274524c
Replace the SubRegSet tablegen class with a less error-prone mechanism.
...
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.
CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.
It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.
llvm-svn: 104654
2010-05-26 00:28:19 +00:00
673e7e0f37
Remove NumberHack entirely.
...
SubRegIndex instances are now numbered uniquely the same way Register instances
are - in lexicographical order by name.
llvm-svn: 104627
2010-05-25 19:49:33 +00:00
fdb25de17e
Switch SubRegSet to using symbolic SubRegIndices
...
llvm-svn: 104571
2010-05-24 23:03:18 +00:00
edab242488
Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
...
structure that represents a mapping without any dependencies on SubRegIndex
numbering.
This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.
llvm-svn: 104563
2010-05-24 21:46:58 +00:00
5d56769fb6
SubRegIndex'ize Mips
...
llvm-svn: 104514
2010-05-24 17:42:58 +00:00
95f6ebcb37
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
...
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
llvm-svn: 103802
2010-05-14 21:14:32 +00:00
bb919dfb6b
Implement a bunch more TargetSelectionDAGInfo infrastructure.
...
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
...
doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
...
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
f62cd20b62
No-ops emitted for scheduling don't correspond with anything in the
...
user's source, so don't arbitrarily assign them a debug location.
llvm-svn: 103121
2010-05-05 20:58:01 +00:00
2094488d81
fix some inconsistent line endings, patch by Jakub Staszak!
...
llvm-svn: 102852
2010-05-01 17:36:49 +00:00
25c1653700
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
...
changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
12f6855f85
Use MachineOperand::is* predicates.
...
llvm-svn: 102472
2010-04-27 22:24:37 +00:00
4158a0ff6b
Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
...
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
llvm-svn: 101984
2010-04-21 03:18:23 +00:00
7d62e33291
Make processor FUs unique for given itinerary. This extends the limit of 32
...
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
21cea8ac2e
Use const qualifiers with TargetLowering. This eliminates several
...
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
31ae586c74
Move per-function state out of TargetLowering subclasses and into
...
MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
9becdddc49
Add skeleton target-specific SelectionDAGInfo files.
...
llvm-svn: 101564
2010-04-16 23:04:22 +00:00
bcaf681cde
Add const qualifiers to CodeGen's use of LLVM IR constructs.
...
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
80c345927e
delete a forwarding function.
...
llvm-svn: 100815
2010-04-08 21:34:17 +00:00
5109d3e55d
add newlines at end of files.
...
llvm-svn: 100706
2010-04-07 22:54:55 +00:00
0151d7b025
Disambiguate else.
...
llvm-svn: 100423
2010-04-05 10:17:15 +00:00
a49ac8ace0
prune some #includes.
...
llvm-svn: 100399
2010-04-05 04:04:10 +00:00
b93331f3be
Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
...
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
llvm-svn: 100384
2010-04-05 03:10:20 +00:00
d20699bc87
Momentous day: remove the "O" member from AsmPrinter. Now all
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"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
llvm-svn: 100327
2010-04-04 08:18:47 +00:00
5e5961864f
mcize a bunch more stuff, using EmitRawText for things we
...
don't have mcstreamer support for yet.
llvm-svn: 100319
2010-04-04 07:05:53 +00:00
3d86cd6710
convert the non-MCInstPrinter'ized EmitInstruction
...
implementations to use EmitRawText instead of writing
directly to "O".
llvm-svn: 100318
2010-04-04 06:12:20 +00:00
3bb09768cb
fix PrintAsmOperand and PrintAsmMemoryOperand to pass down
...
raw_ostream to print to.
llvm-svn: 100313
2010-04-04 05:29:35 +00:00
Akira Hatanaka