d3b504ae10
Implement support for the formal_arguments node. To get this, targets shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload
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llvm-svn: 27604
2006-04-12 16:20:43 +00:00
02274a5265
Add code generator support for VSELECT
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llvm-svn: 27542
2006-04-08 22:22:57 +00:00
098c01e94e
Codegen shufflevector as VVECTOR_SHUFFLE
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llvm-svn: 27529
2006-04-08 04:15:24 +00:00
aa3185f12e
Stub out shufflevector
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llvm-svn: 27514
2006-04-08 01:19:25 +00:00
4a2413a590
Make a vector live across blocks have the correct Vec type. This fixes
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CodeGen/X86/2006-04-04-CrossBlockCrash.ll
llvm-svn: 27436
2006-04-05 06:54:42 +00:00
a9c59156be
Intrinsics that just load from memory can be treated like loads: they don't
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have to serialize against each other. This allows us to schedule lvx's
across each other, for example.
llvm-svn: 27346
2006-04-02 03:41:14 +00:00
ef598059f2
Add a new -view-legalize-dags command line option
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llvm-svn: 27342
2006-04-02 03:07:27 +00:00
bec582f4cd
Prefer larger register classes over smaller ones when a register occurs in
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multiple register classes. This fixes PowerPC/2006-04-01-FloatDoubleExtend.ll
llvm-svn: 27334
2006-04-02 00:24:45 +00:00
ba38035e21
Make sure to pass enough values to phi nodes when we are dealing with
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decimated vectors. This fixes UnitTests/Vector/sumarray-dbl.c
llvm-svn: 27280
2006-03-31 02:12:18 +00:00
5fe1f54c17
Significantly improve handling of vectors that are live across basic blocks,
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handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.
llvm-svn: 27278
2006-03-31 02:06:56 +00:00
67271869a8
Bug fixes: handle constantexpr insert/extract element operations
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Handle constantpacked vectors with constantexpr elements.
This fixes CodeGen/Generic/vector-constantexpr.ll
llvm-svn: 27241
2006-03-29 00:11:43 +00:00
67a636c587
More bulletproofing of llvm.dbg.declare.
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llvm-svn: 27224
2006-03-28 13:45:20 +00:00
e55d171ccd
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
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llvm-svn: 27201
2006-03-28 00:40:33 +00:00
d387cc5cde
Reactivate llvm.dbg.declare.
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llvm-svn: 27192
2006-03-27 23:31:10 +00:00
5bb1d90afd
Disable dbg_declare, it currently breaks the CFE build
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llvm-svn: 27182
2006-03-27 21:36:03 +00:00
ed728c1291
SelectionDAGISel can now natively handle Switch instructions, in the same
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manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
llvm-svn: 27156
2006-03-27 01:32:24 +00:00
7092888bcc
Bullet proof against undefined args produced by upgrading ols-style debug info.
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llvm-svn: 27155
2006-03-26 22:46:27 +00:00
313229c74b
fix inverted conditional
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llvm-svn: 27089
2006-03-24 22:49:42 +00:00
53f1ecc560
Rename for truth in advertising.
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llvm-svn: 27063
2006-03-24 09:50:27 +00:00
d96b09a7b9
Lower target intrinsics into an INTRINSIC node
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llvm-svn: 27035
2006-03-24 02:22:33 +00:00
a8bdac875d
Handle new forms of llvm.dbg intrinsics.
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llvm-svn: 26988
2006-03-23 18:06:46 +00:00
b893d04a67
Fix a typo
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llvm-svn: 26965
2006-03-22 22:20:49 +00:00
2f4119a608
Implement simple support for vector casting. This can currently only handle
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casts between legal vector types.
llvm-svn: 26961
2006-03-22 20:09:35 +00:00
7c0cd8cafc
add some trivial support for extractelement.
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llvm-svn: 26928
2006-03-21 20:44:12 +00:00
672a42d731
Add a hacky workaround for crashes due to vectors live across blocks.
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Note that this code won't work for vectors that aren't legal on the
target. Improvements coming.
llvm-svn: 26925
2006-03-21 19:20:37 +00:00
29b2301460
implement basic support for INSERT_VECTOR_ELT.
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llvm-svn: 26849
2006-03-19 01:17:20 +00:00
f4e1a53647
Rename ConstantVec -> BUILD_VECTOR and VConstant -> VBUILD_VECTOR. Allow*BUILD_VECTOR to take variable inputs.
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llvm-svn: 26847
2006-03-19 00:52:58 +00:00
c16b05e67d
implement vector.ll:test_undef
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llvm-svn: 26845
2006-03-19 00:20:20 +00:00
32206f54c6
Change the structure of lowering vector stuff. Note: This breaks some
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things.
llvm-svn: 26840
2006-03-18 01:44:44 +00:00
bb01d4f272
Remove BRTWOWAY*
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Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
llvm-svn: 26814
2006-03-17 01:40:33 +00:00
7ececaad83
Fix a problem fully scalarizing values.
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llvm-svn: 26811
2006-03-16 23:05:19 +00:00
8471b15706
Add support for CopyFromReg from vector values. Note: this doesn't support
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illegal vector types yet!
llvm-svn: 26799
2006-03-16 19:57:50 +00:00
49409cb925
Teach CreateRegForValue how to handle vector types.
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llvm-svn: 26798
2006-03-16 19:51:18 +00:00
4024c00ce7
add support for vector->vector casts
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llvm-svn: 26788
2006-03-15 22:19:46 +00:00
acb6e34277
Handle the removal of the debug chain.
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llvm-svn: 26729
2006-03-13 13:07:37 +00:00
38280c0020
Added a parameter to control whether Constant::getStringValue() would chop
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off the result string at the first null terminator.
llvm-svn: 26704
2006-03-10 23:52:03 +00:00
d3ef6c290a
scrape out bits of llvm-db
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llvm-svn: 26701
2006-03-10 22:48:19 +00:00
5255d04357
Simplify the interface to the schedulers, to not pass the selected heuristicin.
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llvm-svn: 26692
2006-03-10 07:49:12 +00:00
213209a248
remove dbg_declare, it's not used yet.
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llvm-svn: 26659
2006-03-09 20:02:42 +00:00
2698f0de7a
Get rid of the multiple copies of getStringValue. Now a Constant:: method.
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llvm-svn: 26616
2006-03-08 18:11:07 +00:00
543832d39d
Change the interface for getting a target HazardRecognizer to be more clean.
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llvm-svn: 26608
2006-03-08 04:25:59 +00:00
47639dbb93
Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where
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targets can implement them. Make the top-down scheduler non-g5-specific.
Remove the old testing hazard recognizer.
llvm-svn: 26569
2006-03-06 00:22:00 +00:00
98ecb8ec61
Split the list scheduler into top-down and bottom-up pieces. The priority
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function of the top-down scheduler are completely bogus currently, and
having (future) PPC specific in this file is also wrong, but this is a
small incremental step.
llvm-svn: 26552
2006-03-05 21:10:33 +00:00
5c1ba2ac08
Codegen copysign[f] into a FCOPYSIGN node
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llvm-svn: 26542
2006-03-05 05:09:38 +00:00
3bf916ddd9
Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR.
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llvm-svn: 26504
2006-03-03 07:01:07 +00:00
ad3c974a77
remove the read/write port/io intrinsics.
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llvm-svn: 26479
2006-03-03 00:19:58 +00:00
093c159efb
Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving
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PR709, and paving the way for future progress.
llvm-svn: 26476
2006-03-03 00:00:25 +00:00
b97aab4371
Vector ops lowering.
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llvm-svn: 26436
2006-03-01 01:09:54 +00:00
9fed5b6122
Add support for output memory constraints.
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llvm-svn: 26410
2006-02-27 23:45:39 +00:00
83c22e0d75
Get VC++ building again.
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llvm-svn: 26351
2006-02-24 02:52:40 +00:00
Chris Lattner