OSchip
/
llvm-project
mirror of https://github.com/THU-DSP-LAB/llvm-project.git
13
0
Fork 6
Code Issues Packages Projects Releases Wiki Activity
24,241 Commits 31 Branches 0 Tags 2.2 GiB
Commit Graph

2481 Commits

Author SHA1 Message Date
Chris Lattner e015178de1 prune #includes 
llvm-svn: 26689
 2006-03-10 07:37:35 +00:00
Chris Lattner 4b70ff7876 move some simple scheduler methods into the simple scheduler 
llvm-svn: 26688
 2006-03-10 07:35:21 +00:00
Chris Lattner dc2f135f5c Make EmitNode take a SDNode instead of a NodeInfo* 
llvm-svn: 26687
 2006-03-10 07:28:36 +00:00
Chris Lattner b9d8fa0342 Move the VRBase field from NodeInfo to being a separate, explicit, map. 
llvm-svn: 26686
 2006-03-10 07:25:12 +00:00
Chris Lattner c48cfba44b no need to build groups anymore 
llvm-svn: 26684
 2006-03-10 07:15:58 +00:00
Chris Lattner 6f82fe8106 Create SUnits directly from the SelectionDAG. 
llvm-svn: 26683
 2006-03-10 07:13:32 +00:00
Chris Lattner 2f8c7c3d55 Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchy 
llvm-svn: 26682
 2006-03-10 06:34:51 +00:00
Chris Lattner 349e9ddccc Teach the latency scheduler some new tricks. In particular, to break ties, 
keep track of a sense of "mobility", i.e. how many other nodes scheduling one
node will free up.  For something like this:

float testadd(float *X, float *Y, float *Z, float *W, float *V) {
  return (*X+*Y)*(*Z+*W)+*V;
}

For example, this makes us schedule *X then *Y, not *X then *Z.  The former
allows us to issue the add, the later only lets us issue other loads.

This turns the above code from this:

_testadd:
        lfs f0, 0(r3)
        lfs f1, 0(r6)
        lfs f2, 0(r4)
        lfs f3, 0(r5)
        fadds f0, f0, f2
        fadds f1, f3, f1
        lfs f2, 0(r7)
        fmadds f1, f0, f1, f2
        blr

into this:

_testadd:
        lfs f0, 0(r6)
        lfs f1, 0(r5)
        fadds f0, f1, f0
        lfs f1, 0(r4)
        lfs f2, 0(r3)
        fadds f1, f2, f1
        lfs f2, 0(r7)
        fmadds f1, f1, f0, f2
        blr

llvm-svn: 26680
 2006-03-10 05:51:05 +00:00
Chris Lattner 25e2556b71 add an aggregate method for reinserting scheduled nodes, add a callback for 
priority impls that want to be notified when a node is scheduled

llvm-svn: 26678
 2006-03-10 04:32:49 +00:00
Jeff Cohen 6ce97687f7 Fix VC++ build breakage. 
llvm-svn: 26676
 2006-03-10 03:57:45 +00:00
Chris Lattner 213209a248 remove dbg_declare, it's not used yet. 
llvm-svn: 26659
 2006-03-09 20:02:42 +00:00
Chris Lattner f0fc6bbaf3 back out my previous hack 
llvm-svn: 26650
 2006-03-09 17:48:46 +00:00
Chris Lattner c6c9e65301 remove temporary option 
llvm-svn: 26646
 2006-03-09 17:31:22 +00:00
Chris Lattner c44be2c4ef temporary hack to get the build working again, apparently a header 
commit was forgotten

llvm-svn: 26642
 2006-03-09 17:11:08 +00:00
Jim Laskey 4b0e1d9e6c Move bit field endianness to backend. 
llvm-svn: 26639
 2006-03-09 13:28:47 +00:00
Chris Lattner d17d77aa1d yes yes, enabled debug output is bad 
llvm-svn: 26637
 2006-03-09 07:39:25 +00:00
Chris Lattner 6398c13128 switch the t-d scheduler to use a really dumb and trivial critical path 
latency priority function.

llvm-svn: 26636
 2006-03-09 07:38:27 +00:00
Chris Lattner d4130375c0 Pull latency information for target instructions out of the latency tables. :) 
Only enable this with -use-sched-latencies, I'll enable it by default with a
clean nightly tester run tonight.

PPC is the only target that provides latency info currently.

llvm-svn: 26634
 2006-03-09 07:15:18 +00:00
Chris Lattner da6aafeef4 don't copy all itinerary data 
llvm-svn: 26633
 2006-03-09 07:13:00 +00:00
Chris Lattner 399bee27f0 PriorityQueue is an instance var, use it. 
llvm-svn: 26632
 2006-03-09 06:48:37 +00:00
Chris Lattner 9e95accf4e add some comments 
llvm-svn: 26631
 2006-03-09 06:37:29 +00:00
Chris Lattner 9df647539d Refactor the priority mechanism one step further: now that it is a separate 
class, sever its implementation from the interface.  Now we can provide new
implementations of the same interface (priority computation) without touching
the scheduler itself.

llvm-svn: 26630
 2006-03-09 06:35:14 +00:00
Jim Laskey 2698f0de7a Get rid of the multiple copies of getStringValue. Now a Constant:: method. 
llvm-svn: 26616
 2006-03-08 18:11:07 +00:00
Chris Lattner fd22d42945 Split the priority function computation and priority queue management out 
of the ScheduleDAGList class into a new SchedulingPriorityQueue class.

llvm-svn: 26613
 2006-03-08 05:18:27 +00:00
Chris Lattner 42e2026cb0 switch from an explicitly managed list of SUnits to a simple vector of sunits 
llvm-svn: 26612
 2006-03-08 04:54:34 +00:00
Chris Lattner 12c6d89204 Shrinkify some fields, fit to 80 columns 
llvm-svn: 26611
 2006-03-08 04:41:06 +00:00
Chris Lattner 3fe975b846 revert the previous patch, didn't mean to check it in yet 
llvm-svn: 26610
 2006-03-08 04:39:05 +00:00
Chris Lattner af5e26c980 remove "Slot", it is dead 
llvm-svn: 26609
 2006-03-08 04:37:58 +00:00
Chris Lattner 543832d39d Change the interface for getting a target HazardRecognizer to be more clean. 
llvm-svn: 26608
 2006-03-08 04:25:59 +00:00
Jim Laskey 2370265550 libstdc++-v3 was failing to build. Needed to handle composite types with empty 
members (running into a zero initializer.)

llvm-svn: 26607
 2006-03-08 02:07:02 +00:00
Jim Laskey 313570fb17 Use "llvm.metadata" section for debug globals. Filter out these globals in the 
asm printer.

llvm-svn: 26599
 2006-03-07 22:00:35 +00:00
Jim Laskey 69effa2325 Switch to using a numeric id for anchors. 
llvm-svn: 26598
 2006-03-07 20:53:47 +00:00
Jim Laskey 3bad199894 Bitfield support. 
llvm-svn: 26593
 2006-03-07 15:51:33 +00:00
Chris Lattner 0c801bd1cf Fix some formatting, when looking for hazards, prefer target nodes over 
things like copyfromreg.

llvm-svn: 26586
 2006-03-07 05:40:43 +00:00
Chris Lattner 01aa752a36 update file comment 
llvm-svn: 26573
 2006-03-06 17:58:04 +00:00
Evan Cheng a00c61932d Remove some code that doesn't make sense 
llvm-svn: 26572
 2006-03-06 07:31:44 +00:00
Evan Cheng c5c0658aa6 Remove SUnit::Priority1: it is re-calculated on demand as number of live 
range to be generated.

llvm-svn: 26570
 2006-03-06 06:08:54 +00:00
Chris Lattner 47639dbb93 Hoist the HazardRecognizer out of the ScheduleDAGList.cpp file to where 
targets can implement them.  Make the top-down scheduler non-g5-specific.

Remove the old testing hazard recognizer.

llvm-svn: 26569
 2006-03-06 00:22:00 +00:00
Chris Lattner 00b52ea8f9 Comment fixes 
llvm-svn: 26567
 2006-03-05 23:59:20 +00:00
Chris Lattner 80268aaeed Don't depend on the C99 copysign function, implement it ourselves. 
llvm-svn: 26566
 2006-03-05 23:57:58 +00:00
Chris Lattner 2d945ba4c7 When a hazard recognizer needs noops to be inserted, do so. This represents 
noops as null pointers in the instruction sequence.

llvm-svn: 26564
 2006-03-05 23:51:47 +00:00
Chris Lattner fa5e1c9c26 Implement G5HazardRecognizer as a trivial thing that wants 5 cycles between 
copyfromreg nodes.  Clearly useful!

llvm-svn: 26559
 2006-03-05 23:13:56 +00:00
Chris Lattner e50c092b7c Add basic hazard recognizer support. noop insertion isn't complete yet though. 
llvm-svn: 26558
 2006-03-05 22:45:01 +00:00
Jeff Cohen 55e2aac24b Fix VC++ compilation error. 
llvm-svn: 26554
 2006-03-05 21:43:37 +00:00
Chris Lattner 98ecb8ec61 Split the list scheduler into top-down and bottom-up pieces. The priority 
function of the top-down scheduler are completely bogus currently, and
having (future) PPC specific in this file is also wrong, but this is a
small incremental step.

llvm-svn: 26552
 2006-03-05 21:10:33 +00:00
Chris Lattner 7a36d97518 Move the available queue to being inside the ListSchedule method, since it 
bounds its lifetime.

llvm-svn: 26550
 2006-03-05 20:21:55 +00:00
Chris Lattner bdaf4f38b5 Reinstate this now that the offending opposite xform has been removed. 
llvm-svn: 26548
 2006-03-05 19:53:55 +00:00
Chris Lattner c610e62e46 print arbitrary constant pool entries 
llvm-svn: 26545
 2006-03-05 09:38:03 +00:00
Evan Cheng d428e22c07 Back out fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2) for now. 
It's causing an infinite loop compiling ldecod on x86 / Darwin.

llvm-svn: 26544
 2006-03-05 07:30:16 +00:00
Chris Lattner 3bc4050217 Add some simple copysign folds 
llvm-svn: 26543
 2006-03-05 05:30:57 +00:00
Chris Lattner 5c1ba2ac08 Codegen copysign[f] into a FCOPYSIGN node 
llvm-svn: 26542
 2006-03-05 05:09:38 +00:00
Chris Lattner f29f5204cc fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2) 
fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)

This allows us to compile CodeGen/PowerPC/addi-reassoc.ll into:

_test1:
        slwi r2, r4, 4
        add r2, r2, r3
        lwz r3, 36(r2)
        blr
_test2:
        mulli r2, r4, 5
        add r2, r2, r3
        lbz r2, 11(r2)
        extsb r3, r2
        blr

instead of:

_test1:
        addi r2, r4, 2
        slwi r2, r2, 4
        add r2, r3, r2
        lwz r3, 4(r2)
        blr
_test2:
        addi r2, r4, 2
        mulli r2, r2, 5
        add r2, r3, r2
        lbz r2, 1(r2)
        extsb r3, r2
        blr

llvm-svn: 26535
 2006-03-04 23:33:26 +00:00
Jim Laskey c44f05d624 Added support for dwarf block data entries. 
llvm-svn: 26509
 2006-03-03 21:00:14 +00:00
Jim Laskey 88f0fe15a2 Adding basic structure support. 
llvm-svn: 26505
 2006-03-03 15:06:57 +00:00
Evan Cheng 3bf916ddd9 Add more vector NodeTypes: VSDIV, VUDIV, VAND, VOR, and VXOR. 
llvm-svn: 26504
 2006-03-03 07:01:07 +00:00
Evan Cheng 23e75f5b49 SDOperand::isOperand should not be a forwarding. It must check *this against N's operands. 
llvm-svn: 26502
 2006-03-03 06:42:32 +00:00
Evan Cheng 6b08ae8497 Added isOperand(N): true if this is an operand of N 
llvm-svn: 26501
 2006-03-03 06:24:54 +00:00
Evan Cheng 5e9a695026 A bit more tweaking 
llvm-svn: 26500
 2006-03-03 06:23:43 +00:00
Jeff Cohen 55c1173a6c Fix VC++ compilation errors. 
llvm-svn: 26498
 2006-03-03 03:25:07 +00:00
Evan Cheng 993e9cf26e Move #include "llvm/CodeGen/AsmPrinter.h" to top since it's the interface. 
llvm-svn: 26493
 2006-03-03 02:04:29 +00:00
Chris Lattner ad3c974a77 remove the read/write port/io intrinsics. 
llvm-svn: 26479
 2006-03-03 00:19:58 +00:00
Chris Lattner 093c159efb Split memcpy/memset/memmove intrinsics into i32/i64 versions, resolving 
PR709, and paving the way for future progress.

llvm-svn: 26476
 2006-03-03 00:00:25 +00:00
Evan Cheng 4e3904f637 - Fixed some priority calculation bugs that were causing bug 478. Among them: 
a predecessor appearing more than once in the operand list was counted as
  multiple predecessor; priority1 should be updated during scheduling;
  CycleBound was updated after the node is inserted into priority queue; one
  of the tie breaking condition was flipped.
- Take into consideration of two address opcodes. If a predecessor is a def&use
  operand, it should have a higher priority.
- Scheduler should also favor floaters, i.e. nodes that do not have real
  predecessors such as MOV32ri.
- The scheduling fixes / tweaks fixed bug 478:
        .text
        .align  4
        .globl  _f
_f:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        movl %eax, %edx
        imull %ecx, %edx
        imull %eax, %eax
        imull %ecx, %ecx
        addl %eax, %ecx
        leal (%ecx,%edx,2), %eax
        ret

  It is also a slight performance win (1% - 3%) for most tests.

llvm-svn: 26470
 2006-03-02 21:38:29 +00:00
Jim Laskey 862001ad75 Support for enumerations. 
llvm-svn: 26466
 2006-03-01 23:52:37 +00:00
Evan Cheng 38d5e768b2 Don't print llvm constant in assmebly file. Assembler won't like comments that 
span multiple lines.

llvm-svn: 26463
 2006-03-01 22:18:09 +00:00
Chris Lattner 0db2f2c689 Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loop 
in the dag combiner on 176.gcc on x86.

llvm-svn: 26459
 2006-03-01 21:47:21 +00:00
Jim Laskey 4e71db13d6 Switch back to using actual dwarf tags. Simplifies code without loss to other 
debug forms.

llvm-svn: 26455
 2006-03-01 20:39:36 +00:00
Chris Lattner 232024edb8 Fix a typo evan noticed 
llvm-svn: 26454
 2006-03-01 19:55:35 +00:00
Jim Laskey f770cf5b90 Use context and not compile unit. 
llvm-svn: 26453
 2006-03-01 18:20:30 +00:00
Jim Laskey 1246d5c054 I guess I can handle large type sizes. 
llvm-svn: 26452
 2006-03-01 18:13:05 +00:00
Jim Laskey b9ac4cba66 Basic array support. 
llvm-svn: 26451
 2006-03-01 17:53:02 +00:00
Chris Lattner bc1c85beea Add support for target-specific dag combines 
llvm-svn: 26443
 2006-03-01 04:53:38 +00:00
Chris Lattner fbcd62d3bb Add a new AddToWorkList method, start using it 
llvm-svn: 26441
 2006-03-01 04:03:14 +00:00
Chris Lattner 324871ef1a Pull shifts by a constant through multiplies (a form of reassociation), 
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll

llvm-svn: 26440
 2006-03-01 03:44:24 +00:00
Evan Cheng b97aab4371 Vector ops lowering. 
llvm-svn: 26436
 2006-03-01 01:09:54 +00:00
Evan Cheng be85e89ec4 - Added VConstant as an abstract version of ConstantVec. 
- All abstrct vector nodes must have # of elements and element type as their
first two operands.

llvm-svn: 26432
 2006-03-01 00:51:13 +00:00
Jim Laskey 716edb9754 Add const, volatile, restrict support. 
Add array of debug descriptor support.

llvm-svn: 26428
 2006-02-28 20:15:07 +00:00
Chris Lattner f0032b350c Compile: 
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }

to:

_foo4:
        lbz r3,1(r3)
        blr
_foo5:
        lbz r3,1(r3)
        blr

not:

_foo4:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr
_foo5:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

llvm-svn: 26419
 2006-02-28 06:49:37 +00:00
Chris Lattner bdbc4476d9 Fold "and (LOAD P), 255" -> zextload. This allows us to compile: 
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
        lbz r3, 3(r3)
        blr

instead of:

_foo3:
        lwz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

and:

unsigned short foo2(float a) { return a; }

as:
_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lhz r3, -2(r1)
        blr

instead of:

_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26417
 2006-02-28 06:35:35 +00:00
Chris Lattner 0f8a727c49 fold (sra (sra x, c1), c2) -> (sra x, c1+c2) 
llvm-svn: 26416
 2006-02-28 06:23:04 +00:00
Chris Lattner 9fed5b6122 Add support for output memory constraints. 
llvm-svn: 26410
 2006-02-27 23:45:39 +00:00
Jim Laskey 6d5c2a0156 Qualify dwarf namespace inside llvm namespace. 
llvm-svn: 26409
 2006-02-27 22:37:23 +00:00
Jim Laskey bc7a3832e8 Partial enabling of functions. 
llvm-svn: 26404
 2006-02-27 20:37:42 +00:00
Jim Laskey 72b66d6d8a Supporting multiple compile units. 
llvm-svn: 26402
 2006-02-27 17:27:12 +00:00
Jim Laskey 22e47b9f4e Re-orging file. 
llvm-svn: 26401
 2006-02-27 12:43:29 +00:00
Chris Lattner 47ee42829d remove some completed notes 
llvm-svn: 26390
 2006-02-27 00:39:31 +00:00
Evan Cheng 9f9662b86e Print ConstantPoolSDNode offset field. 
llvm-svn: 26381
 2006-02-26 08:36:57 +00:00
Evan Cheng ed169db8a5 Added an offset field to ConstantPoolSDNode. 
llvm-svn: 26371
 2006-02-25 09:54:52 +00:00
Chris Lattner 7d01f95a57 Fix a bug that Evan exposed with some changes he's making, and that was 
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.

llvm-svn: 26369
 2006-02-25 02:17:31 +00:00
Chris Lattner 28a0b8bec7 Remove debugging printout :) 
Add a minor compile time win, no codegen change.

llvm-svn: 26368
 2006-02-25 02:03:40 +00:00
Chris Lattner 525522e429 Refactor some code from being inline to being out in a new class with methods. 
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.

llvm-svn: 26367
 2006-02-25 01:51:33 +00:00
Chris Lattner 1d08c6534c Use the PrintAsmMemoryOperand to print addressing modes. 
llvm-svn: 26364
 2006-02-24 20:21:58 +00:00
Chris Lattner 5af3fdec12 Pass all the flags to the asm printer, not just the # operands. 
llvm-svn: 26362
 2006-02-24 19:50:58 +00:00
Chris Lattner 2f8a794b13 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope. 
Add support for addressing modes.

llvm-svn: 26361
 2006-02-24 19:18:20 +00:00
Chris Lattner 86c51000db Refactor operand adding out to a new AddOperand method 
llvm-svn: 26358
 2006-02-24 18:54:03 +00:00
Jim Laskey 723d3e0746 Add pointer and reference types. Added short-term code to ignore NULL types 
(to allow llvm-gcc4 to build.)

llvm-svn: 26355
 2006-02-24 16:46:40 +00:00
Jeff Cohen 83c22e0d75 Get VC++ building again. 
llvm-svn: 26351
 2006-02-24 02:52:40 +00:00
Chris Lattner dcf785bf46 Implement (most of) selection of inline asm memory operands. 
llvm-svn: 26350
 2006-02-24 02:13:54 +00:00
Chris Lattner 7ef7a64ebb Lower C_Memory operands. 
llvm-svn: 26346
 2006-02-24 01:11:24 +00:00
Jim Laskey e5386d4d98 Added basic support for typedefs. 
llvm-svn: 26339
 2006-02-23 22:37:30 +00:00
Chris Lattner e7c0ffb3a0 Fix an endianness problem on big-endian targets with expanded operands 
to inline asms.  Mark some methods const.

llvm-svn: 26334
 2006-02-23 20:06:57 +00:00
Chris Lattner 571d9647c6 Record all of the expanded registers in the DAG and machine instr, fixing 
several bugs in inline asm expanded operands.

llvm-svn: 26332
 2006-02-23 19:21:04 +00:00
Jim Laskey 69b9e26186 DwarfWriter reading basic type information from llvm-gcc4 code. 
llvm-svn: 26331
 2006-02-23 16:58:18 +00:00
Chris Lattner 2988921dc4 Code cleanups, no functionality change 
llvm-svn: 26328
 2006-02-23 06:44:17 +00:00
Chris Lattner b1124f3c76 This fixes a couple of problems with expansion 
llvm-svn: 26318
 2006-02-22 23:09:03 +00:00
Chris Lattner 6f87d18be9 Change a whole bunch of code to be built around RegsForValue instead of 
a single register number.  This fully implements promotion for inline asms,
expand is close but not quite right yet.

llvm-svn: 26316
 2006-02-22 22:37:12 +00:00
Jim Laskey 2fa33a989d Coordinate activities with llvm-gcc4 and dwarf. 
llvm-svn: 26314
 2006-02-22 19:02:11 +00:00
Chris Lattner 7ad77dfc2a split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner 5c79f98f15 Adjust to changes in getRegForInlineAsmConstraint prototype 
llvm-svn: 26306
 2006-02-21 23:12:12 +00:00
Evan Cheng 43070b7541 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294
 2006-02-20 22:34:53 +00:00
Chris Lattner 301f45cf6f Fix a problem Nate and Duraid reported where simplifying nodes can cause 
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.

llvm-svn: 26291
 2006-02-20 06:51:04 +00:00
Chris Lattner 486d1bc5ed Fix a problem on itanium with memset. The value to set has been promoted to 
i64 before this code, so zero_ext doesn't work.

llvm-svn: 26290
 2006-02-20 06:38:35 +00:00
Nate Begeman abac61603f Add checks to make sure we don't create bogus extend nodes, and fix a bug 
where we were doing exactly that which was causing failures on x86 and
alpha.

llvm-svn: 26284
 2006-02-18 02:40:58 +00:00
Chris Lattner 375e1a71cc Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't 
exactly the API we wanted to call into.  This fixes the crash on crafty last
night.

llvm-svn: 26269
 2006-02-17 21:58:01 +00:00
Nate Begeman fb5dbadf15 Clean up DemandedBitsAreZero interface 
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal

llvm-svn: 26263
 2006-02-17 19:54:08 +00:00
Nate Begeman 57b3567552 Don't expand sdiv by power of two before legalize, since it will likely 
generate illegal nodes.

llvm-svn: 26261
 2006-02-17 07:26:20 +00:00
Nate Begeman 5965bd19f8 kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner 9ec392b2aa Fix another miscompilation exposed by lencode, where we lowered i64->f32 
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).

llvm-svn: 26254
 2006-02-17 04:32:33 +00:00
Evan Cheng c3dcf5a4d7 Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it 
turns out not to point to a constant string but it forgot change the offset
back.

llvm-svn: 26242
 2006-02-16 23:11:42 +00:00
Nate Begeman 8a77efe4f7 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Evan Cheng 42c01c8d39 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00
Chris Lattner 471627c49d Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written 
by Nate, I'm just committing it for him.

llvm-svn: 26230
 2006-02-16 08:02:36 +00:00
Evan Cheng 93e4865d4b Remove an unused function parameter. 
llvm-svn: 26221
 2006-02-15 22:12:35 +00:00
Evan Cheng 6781b6e62e Turn a memcpy from string constant into a series of stores of constant values. 
llvm-svn: 26219
 2006-02-15 21:59:04 +00:00
Jim Laskey 2eea436192 Should not combine ISD::LOCATIONs until we have scheme to remove from 
MachineDebugInfo tables.

llvm-svn: 26216
 2006-02-15 19:34:44 +00:00
Evan Cheng e2038bdeee Lower memcpy with small constant size operand into a series of load / store 
ops.

llvm-svn: 26195
 2006-02-15 01:54:51 +00:00
Evan Cheng 0451499b3c Doh again! 
llvm-svn: 26188
 2006-02-14 23:05:54 +00:00
Jim Laskey ebb50a61d2 Using wrong DW_FORM. 
llvm-svn: 26184
 2006-02-14 22:01:57 +00:00
Evan Cheng db2a7a736a Keep to < 80 cols 
llvm-svn: 26177
 2006-02-14 20:12:38 +00:00
Evan Cheng 038521ef76 Missed a break so memcpy cases fell through to memset. Doh. 
llvm-svn: 26176
 2006-02-14 19:45:56 +00:00
Evan Cheng d502610604 Fixed a build breakage. 
llvm-svn: 26175
 2006-02-14 09:11:59 +00:00
Evan Cheng 4b40a42653 Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
llvm-svn: 26174
 2006-02-14 08:38:30 +00:00
Evan Cheng 81fcea8aa2 Expand memset dst, c, size to a series of stores if size falls below the 
target specific theshold, e.g. 16 for x86.

llvm-svn: 26171
 2006-02-14 08:22:34 +00:00
Chris Lattner 1784a9d267 now that libcalls don't suck, we can remove this hack 
llvm-svn: 26164
 2006-02-14 05:39:35 +00:00
Chris Lattner 8e2ee7358f Fix a latent bug in the call sequence handling stuff. Some targets (e.g. x86) 
create these nodes with flag results.  Remember that we legalized them.

llvm-svn: 26156
 2006-02-14 00:55:02 +00:00
Jim Laskey 390c63e9d9 Rename to better reflect usage (current and planned.) 
llvm-svn: 26145
 2006-02-13 12:50:39 +00:00
Chris Lattner 462505fc5f Completely rewrite libcall insertion by the legalizer, providing the 
following handy-dandy properties:

1. it is always correct now
2. it is much faster than before
3. it is easier to understand

This implementation builds off of the recent simplifications of the
legalizer that made it single-pass instead of iterative.

This fixes JM/lencod, JM/ldecod, and
CodeGen/Generic/2006-02-12-InsertLibcall.ll (at least on PPC).

llvm-svn: 26144
 2006-02-13 09:18:02 +00:00
Jim Laskey 5995d0160c Reorg for integration with gcc4. Old style debug info will not be passed though 
to SelIDAG.

llvm-svn: 26115
 2006-02-11 01:01:30 +00:00
Evan Cheng a1ef3ec5b5 Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc 
problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).

llvm-svn: 26094
 2006-02-09 22:11:03 +00:00
Evan Cheng d3f1db93c1 More changes to reduce frame size. 
Move all getTargetNode() out of SelectionDAG.h into SelectionDAG.cpp. This
prevents them from being inlined.
Change getTargetNode() so they return SDNode * instead of SDOperand to prevent
copying. It should also help compilation speed.

llvm-svn: 26083
 2006-02-09 07:15:23 +00:00
Chris Lattner f6190821da Adjust to MachineConstantPool interface change: instead of keeping a 
value/alignment pair for each constant, keep a value/offset pair.

llvm-svn: 26078
 2006-02-09 04:46:04 +00:00
Chris Lattner ba97264e72 rename fields of constant pool entries 
llvm-svn: 26076
 2006-02-09 04:22:52 +00:00
Chris Lattner 47f7319f00 Simplify code, alignment must be specified now. 
llvm-svn: 26074
 2006-02-09 02:26:04 +00:00
Chris Lattner 4576bb74d5 Make MachineConstantPool entries alignments explicit 
llvm-svn: 26071
 2006-02-09 02:23:13 +00:00
Chris Lattner ed87dcd45f Add support for assembler directives that wrap inline asm 
llvm-svn: 26065
 2006-02-08 23:41:56 +00:00
Chris Lattner a10e23c19f Compile this: 
xori r6, r2, 1
        rlwinm r6, r6, 0, 31, 31
        cmpwi cr0, r6, 0
        bne cr0, LBB1_3 ; endif

to this:

        rlwinm r6, r2, 0, 31, 31
        cmpwi cr0, r6, 0
        beq cr0, LBB1_3 ; endif

llvm-svn: 26047
 2006-02-08 02:13:15 +00:00
Chris Lattner 34f74c180a Add support for modifier characters to operand printers 
llvm-svn: 26021
 2006-02-06 22:17:23 +00:00
Jim Laskey 0458fb76fd Goodbye nasty macro. 
llvm-svn: 26019
 2006-02-06 21:54:05 +00:00
Jim Laskey b643ff5546 Edit requests from Sabre. 
llvm-svn: 26018
 2006-02-06 19:12:02 +00:00
Jim Laskey 85263234a8 Changing model for the construction of debug information. 
llvm-svn: 26016
 2006-02-06 15:33:21 +00:00
Nate Begeman 8c9cd461df Back out previous commit, it isn't safe. 
llvm-svn: 26006
 2006-02-05 08:23:00 +00:00
Nate Begeman 3dc8b89493 fold c1 << (x + c2) into (c1 << c2) << x. fix a warning. 
llvm-svn: 26005
 2006-02-05 08:07:24 +00:00
Nate Begeman c89fdf1eb3 Handle urem by shifted powers of 2. 
llvm-svn: 26001
 2006-02-05 07:36:48 +00:00
Nate Begeman 25d178bece handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2 
llvm-svn: 26000
 2006-02-05 07:20:23 +00:00
Evan Cheng d37645c07d * Added SDNode::isOnlyUse(). 
* Fix hasNUsesOfValue(), it should be const.

llvm-svn: 25990
 2006-02-05 06:29:23 +00:00
Chris Lattner cbab28414e make sure that global doubles are aligned to 8 bytes 
llvm-svn: 25981
 2006-02-05 01:46:49 +00:00
Chris Lattner a9b2525d3e Implement the AsmPrinter::getPreferredAlignmentLog method. 
llvm-svn: 25978
 2006-02-05 01:29:18 +00:00
Jeff Cohen 95ae171d5b Fix VC++ warning. 
llvm-svn: 25975
 2006-02-04 16:20:31 +00:00
Evan Cheng f9adce90bf Get rid of some memory leaks identified by Valgrind 
llvm-svn: 25960
 2006-02-04 06:49:00 +00:00
Jeff Cohen 57a004abfe Fix VC++ warning. 
llvm-svn: 25957
 2006-02-04 03:27:39 +00:00
Chris Lattner 3b48431333 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
 2006-02-04 02:26:14 +00:00
Chris Lattner 65ad53feb3 Initial early support for non-register operands, like immediates 
llvm-svn: 25952
 2006-02-04 02:16:44 +00:00
Chris Lattner c93403a7fb Handle another case exposed on X86. 
llvm-svn: 25949
 2006-02-03 23:50:46 +00:00
Chris Lattner 71d20c4e18 Fix a nasty problem on two-address machines in the following situation: 
store EAX -> [ss#0]
[ss#0] += 1
...
use(EAX)

In this case, it is not valid to rewrite this as:


store EAX -> [ss#0]
EAX += 1
store EAX -> [ss#0]  ;;; this would also delete the store above
...
use(EAX)

... because EAX is not a dead at that point.  Keep track of which registers
we are allowed to clobber, and which ones we aren't, and don't clobber the
ones we're not supposed to.  :)

This should resolve the issues on X86 last night.

llvm-svn: 25948
 2006-02-03 23:28:46 +00:00
Chris Lattner 507a3a7bd1 significantly simplify the VirtRegMap code by pulling the SpillSlotsAvailable 
and PhysRegsAvailable maps out into a new AvailableSpills struct.  No
functionality change.

This paves the way for a bugfix, coming up next.

llvm-svn: 25947
 2006-02-03 23:13:58 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits. 
llvm-svn: 25945
 2006-02-03 22:24:05 +00:00
Chris Lattner f68fd20286 remove some #ifdef'd out code, which should properly be in the dag combiner anyway. 
llvm-svn: 25941
 2006-02-03 20:13:59 +00:00
Chris Lattner 6091407783 remove dead fn 
llvm-svn: 25935
 2006-02-03 06:51:34 +00:00
Nate Begeman 22e251abf1 Add common code for reassociating ops in the dag combiner 
llvm-svn: 25934
 2006-02-03 06:46:56 +00:00
Jeff Cohen 3276ff7ac6 Fix VC++ compilation error caused by using a std::map iterator variable to receive 
a std::multimap iterator value.  For some reason, GCC doesn't have a problem with this.

llvm-svn: 25927
 2006-02-03 03:48:54 +00:00
Chris Lattner e18ef0d4a6 Remove move copies and dead stuff by not clobbering the result reg of a noop copy. 
llvm-svn: 25926
 2006-02-03 03:16:14 +00:00
Chris Lattner 774d4a190b Simplify some code 
llvm-svn: 25924
 2006-02-03 03:06:49 +00:00
Chris Lattner 1ef239afb4 Add code that checks for noop copies, which triggers when either: 
1. a target doesn't know how to fold load/stores into copies, or
2. the spiller rewrites the input to a copy to the same register as the dest
   instead of to the reloaded reg.

This will be moved/improved in the near future, but allows elimination of
some ancient x86 hacks.  This eliminates 92 copies from SMG2000 on X86 and
163 copies from 252.eon.

llvm-svn: 25922
 2006-02-03 02:02:59 +00:00
Evan Cheng 02b5b9cdd6 Added case HANDLENODE to getOperationName(). 
llvm-svn: 25920
 2006-02-03 01:33:01 +00:00
Chris Lattner b7f24de4c8 Physregs may hold multiple stack slot values at the same time. Keep track 
of this, and use it to our advantage (bwahahah).  This allows us to eliminate another
60 instructions from smg2000 on PPC (probably significantly more on X86).  A common
old-new diff looks like this:

        stw r2, 3304(r1)
-       lwz r2, 3192(r1)
        stw r2, 3300(r1)
-       lwz r2, 3192(r1)
        stw r2, 3296(r1)
-       lwz r2, 3192(r1)
        stw r2, 3200(r1)
-       lwz r2, 3192(r1)
        stw r2, 3196(r1)
-       lwz r2, 3192(r1)
+       or r2, r2, r2
        stw r2, 3188(r1)

and

-       lwz r31, 604(r1)
-       lwz r13, 604(r1)
-       lwz r14, 604(r1)
-       lwz r15, 604(r1)
-       lwz r16, 604(r1)
-       lwz r30, 604(r1)
+       or r31, r30, r30
+       or r13, r30, r30
+       or r14, r30, r30
+       or r15, r30, r30
+       or r16, r30, r30
+       or r30, r30, r30

Removal of the R = R copies is coming next...

llvm-svn: 25919
 2006-02-03 00:36:31 +00:00
Chris Lattner f3aef1b004 Fix a deficiency in the spiller that Evan noticed. In particular, consider 
this code:

  store [stack slot #0],  R10
    = add R14, [stack slot #0]

The spiller didn't know that the store made the value of [stackslot#0] available
in R10 *IF* the store came from a copy instruction with the store folded into it.

This patch teaches VirtRegMap to look at these stores and recognize the values
they make available.  In one case Evan provided, this code:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
1)      movsd QWORD PTR [%ESP + 48], %XMM1
2)      movsd %XMM1, QWORD PTR [%ESP + 48]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

turns into:

        divsd %XMM0, %XMM1
        movsd %XMM1, QWORD PTR [%ESP + 40]
        addsd %XMM1, %XMM0
3)      movsd QWORD PTR [%ESP + 48], %XMM1
        movsd QWORD PTR [%ESP + 4], %XMM0

In this case, instruction #2 was removed because of the value made
available by #1, and inst #1 was later deleted because it is now
never used before the stack slot is redefined by #3.

This occurs here and there in a lot of code with high spilling, on PPC
most of the removed loads/stores are LSU-reject-causing loads, which is
nice.

On X86, things are much better (because it spills more), where we nuke
about 1% of the instructions from SMG2000 and several hundred from eon.

More improvements to come...

llvm-svn: 25917
 2006-02-02 23:29:36 +00:00
Chris Lattner bb53acd03c Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) 
llvm-svn: 25913
 2006-02-02 20:12:32 +00:00
Chris Lattner 49beaf40fc Turn any_extend nodes into zero_extend nodes when it allows us to remove an 
and instruction.  This allows us to compile stuff like this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

to this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        ret

instead of this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

This occurs quite a bit with the X86 backend.  For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel,  70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.

llvm-svn: 25901
 2006-02-02 07:17:31 +00:00
Chris Lattner 49ce35542f add two dag combines: 
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1

This allows us to compile this:

bool %X(int %X) {
        %Y = add int %X, 14
        %Z = setne int %Y, 12345
        ret bool %Z
}

into this:

_X:
        cmpl $12331, 4(%esp)
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

not this:

_X:
        movl $14, %eax
        addl 4(%esp), %eax
        cmpl $12345, %eax
        setne %al
        movzbl %al, %eax
        andl $1, %eax
        ret

Testcase here: Regression/CodeGen/X86/compare-add.ll

nukage of the and coming up next.

llvm-svn: 25898
 2006-02-02 06:36:13 +00:00
Chris Lattner 0bd74558ae make -debug output less newliney 
llvm-svn: 25895
 2006-02-02 00:38:08 +00:00
Chris Lattner 7f5880b1c7 Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------

llvm-svn: 25893
 2006-02-02 00:25:23 +00:00
Chris Lattner aa23fa9f43 Implement smart printing of inline asm strings, handling variants and 
substituted operands.  For this testcase:

int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

we now emit:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz r2, r2, r3  ;; look here
        or r3, r2, r2
        blr

... note the substituted operands. :)

llvm-svn: 25886
 2006-02-01 22:41:11 +00:00
Nate Begeman 01bd9d9911 *** empty log message *** 
llvm-svn: 25879
 2006-02-01 19:05:15 +00:00
Chris Lattner 1558fc64f9 Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr

llvm-svn: 25878
 2006-02-01 18:59:47 +00:00
Nate Begeman 7e7f439f85 Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875
 2006-02-01 07:19:44 +00:00
Chris Lattner 3a5ed55187 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
llvm-svn: 25865
 2006-02-01 01:28:23 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Evan Cheng 2443ab932d Allow custom lowering of fabs. I forgot to check in this change which 
caused several test failures.

llvm-svn: 25852
 2006-01-31 18:14:25 +00:00
Chris Lattner e9721b2984 Only insert an AND when converting from BR_COND to BRCC if needed. 
llvm-svn: 25832
 2006-01-31 05:04:52 +00:00
Chris Lattner 2e56e89452 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
 2006-01-31 02:03:41 +00:00
Chris Lattner 57ecb561c6 Print the most trivial inline asms. 
llvm-svn: 25822
 2006-01-30 23:00:08 +00:00
Chris Lattner f263a23735 Fix a bug in my legalizer reworking that caused the X86 backend to not get 
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll

llvm-svn: 25821
 2006-01-30 22:43:50 +00:00
Chris Lattner d6f5ae4455 don't insert an and node if it isn't needed here, this can prevent folding 
of lowered target nodes.

llvm-svn: 25804
 2006-01-30 04:22:28 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner 3b40e64aa3 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode, 
to permit recursion

llvm-svn: 25799
 2006-01-30 03:49:37 +00:00
Chris Lattner 4d1ea71a31 Fix RET of promoted values on targets that custom expand RET to a target node. 
llvm-svn: 25794
 2006-01-29 21:02:23 +00:00
Chris Lattner 2c748afd6c cleanups to the ValueTypeActions interface 
llvm-svn: 25785
 2006-01-29 08:42:06 +00:00
Chris Lattner ccb4476c87 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands 
instead.

llvm-svn: 25780
 2006-01-29 07:58:15 +00:00
Chris Lattner 2f292789dc Allow custom expansion of ConstantVec nodes. PPC will use this in the future. 
llvm-svn: 25774
 2006-01-29 06:34:16 +00:00
Chris Lattner 758b0ac54b Legalize ConstantFP into TargetConstantFP when the target allows. Implement 
custom expansion of ConstantFP nodes.

llvm-svn: 25772
 2006-01-29 06:26:56 +00:00