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5185 Commits

Author SHA1 Message Date
Evan Cheng 91944e8699 pslldrm, psrawrm, etc. encoding bug 
llvm-svn: 27721
 2006-04-15 05:59:08 +00:00
Evan Cheng 1220b31a31 hsubp{s|d} encoding bug 
llvm-svn: 27720
 2006-04-15 05:52:42 +00:00
Evan Cheng 6222cf2a36 Silly bug 
llvm-svn: 27719
 2006-04-15 05:37:34 +00:00
Evan Cheng 65bb720a8b Do not use movs{h|l}dup for a shuffle with a single non-undef node. 
llvm-svn: 27718
 2006-04-15 03:13:24 +00:00
Evan Cheng 0ba896c75b Added SSE (and other) entries to foldMemoryOperand(). 
llvm-svn: 27716
 2006-04-14 23:33:27 +00:00
Evan Cheng 00a5b3d9d3 Some clean up 
llvm-svn: 27715
 2006-04-14 23:32:40 +00:00
Chris Lattner 559c8ba466 Allow undef in a shuffle mask 
llvm-svn: 27714
 2006-04-14 23:19:08 +00:00
Evan Cheng 5d247f81c1 Last few SSE3 intrinsics. 
llvm-svn: 27711
 2006-04-14 21:59:03 +00:00
Evan Cheng 3bd605397b Misc. SSE2 intrinsics: clflush, lfench, mfence 
llvm-svn: 27699
 2006-04-14 07:43:12 +00:00
Evan Cheng e349d01acf We were not adjusting the frame size to ensure proper alignment when alloca / 
vla are present in the function. This causes a crash when a leaf function
allocates space on the stack used to store / load with 128-bit SSE
instructions.

llvm-svn: 27698
 2006-04-14 07:26:43 +00:00
Evan Cheng 8d76f3922b New entry 
llvm-svn: 27697
 2006-04-14 07:24:04 +00:00
Chris Lattner 4211ca9108 Move the rest of the PPCTargetLowering::LowerOperation cases out into 
separate functions, for simplicity and code clarity.

llvm-svn: 27693
 2006-04-14 06:01:58 +00:00
Chris Lattner 19e9055eb5 Pull the VECTOR_SHUFFLE and BUILD_VECTOR lowering code out into separate 
functions, which makes the code much cleaner :)

llvm-svn: 27692
 2006-04-14 05:19:18 +00:00
Evan Cheng eb0063a34f pcmpeq* and pcmpgt* intrinsics. 
llvm-svn: 27685
 2006-04-14 01:39:53 +00:00
Evan Cheng 16287444ff psll*, psrl*, and psra* intrinsics. 
llvm-svn: 27684
 2006-04-14 00:14:05 +00:00
Reid Spencer 64f6c11c59 Remove the .cvsignore file so this directory can be pruned. 
llvm-svn: 27683
 2006-04-13 22:00:10 +00:00
Reid Spencer 497ecf6840 Remove .cvsignore so that this directory can be pruned. 
llvm-svn: 27682
 2006-04-13 21:59:03 +00:00
Evan Cheng a84319719c Doh. PANDrm, etc. are not commutable. 
llvm-svn: 27668
 2006-04-13 18:11:28 +00:00
Chris Lattner 883fb053bd Force non-darwin targets to use a static relo model. This fixes PR734, 
tested by CodeGen/Generic/vector.ll

llvm-svn: 27657
 2006-04-13 17:10:48 +00:00
Chris Lattner 5879efe0c8 add a note, move an altivec todo to the altivec list. 
llvm-svn: 27654
 2006-04-13 16:48:00 +00:00
Reid Spencer 9857229aba Add the README files to the distribution. 
llvm-svn: 27651
 2006-04-13 06:39:24 +00:00
Evan Cheng ed3996743f psad, pmax, pmin intrinsics. 
llvm-svn: 27647
 2006-04-13 06:11:45 +00:00
Evan Cheng 58dad55959 Various SSE2 packed integer intrinsics: pmulhuw, pavgw, etc. 
llvm-svn: 27645
 2006-04-13 05:24:54 +00:00
Evan Cheng e4f97ccf7f X86 SSE2 supports v8i16 multiplication 
llvm-svn: 27644
 2006-04-13 05:10:25 +00:00
Evan Cheng d2eb662415 Update 
llvm-svn: 27643
 2006-04-13 05:09:45 +00:00
Evan Cheng b3fe00bdc6 padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics. 
llvm-svn: 27639
 2006-04-13 00:43:35 +00:00
Evan Cheng 0aab735a1a Naming inconsistency. 
llvm-svn: 27638
 2006-04-13 00:00:23 +00:00
Evan Cheng c88afc36a9 SSE / SSE2 conversion intrinsics. 
llvm-svn: 27637
 2006-04-12 23:42:44 +00:00
Evan Cheng 92232307d0 All "integer" logical ops (pand, por, pxor) are now promoted to v2i64. 
Clean up and fix various logical ops issues.

llvm-svn: 27633
 2006-04-12 21:21:57 +00:00
Chris Lattner 147e50e1c5 Add a new way to match vector constants, which make it easier to bang bits of 
different types.

Codegen spltw(0x7FFFFFFF) and spltw(0x80000000) without a constant pool load,
implementing PowerPC/vec_constants.ll:test1.  This compiles:

typedef float vf __attribute__ ((vector_size (16)));
typedef int vi __attribute__ ((vector_size (16)));
void test(vi *P1, vi *P2, vf *P3) {
  *P1 &= (vi){0x80000000,0x80000000,0x80000000,0x80000000};
  *P2 &= (vi){0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF};
  *P3 = vec_abs((vector float)*P3);
}

to:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        vspltisw v0, -1
        vslw v0, v0, v0
        lvx v1, 0, r3
        vand v1, v1, v0
        stvx v1, 0, r3
        lvx v1, 0, r4
        vandc v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vandc v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

instead of (with two constant pool entries):

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        li r6, lo16(LCPI1_0)
        lis r7, ha16(LCPI1_0)
        li r8, lo16(LCPI1_1)
        lis r9, ha16(LCPI1_1)
        lvx v0, r7, r6
        lvx v1, 0, r3
        vand v0, v1, v0
        stvx v0, 0, r3
        lvx v0, r9, r8
        lvx v1, 0, r4
        vand v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vand v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

GCC produces (with 2 cp entries):

_test:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc00c
        mtspr 256,r0
        lis r2,ha16(LC0)
        lis r9,ha16(LC1)
        la r2,lo16(LC0)(r2)
        lvx v0,0,r3
        lvx v1,0,r5
        la r9,lo16(LC1)(r9)
        lwz r12,-4(r1)
        lvx v12,0,r2
        lvx v13,0,r9
        vand v0,v0,v12
        stvx v0,0,r3
        vspltisw v0,-1
        vslw v12,v0,v0
        vandc v1,v1,v12
        stvx v1,0,r5
        lvx v0,0,r4
        vand v0,v0,v13
        stvx v0,0,r4
        mtspr 256,r12
        blr

llvm-svn: 27624
 2006-04-12 19:07:14 +00:00
Chris Lattner 74cf9ff761 Rename get_VSPLI_elt -> get_VSPLTI_elt 
Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each
form, eliminating a bunch of Pat patterns in the .td file and allowing us to
CSE stuff more aggressively.  This implements
PowerPC/buildvec_canonicalize.ll:VSPLTI

llvm-svn: 27614
 2006-04-12 17:37:20 +00:00
Evan Cheng e2157c6e41 Promote v4i32, v8i16, v16i8 load to v2i64 load. 
llvm-svn: 27612
 2006-04-12 17:12:36 +00:00
Chris Lattner e318a7574e Ensure that zero vectors are always v4i32, which forces them to CSE with 
each other.  This implements CodeGen/PowerPC/vxor-canonicalize.ll

llvm-svn: 27609
 2006-04-12 16:53:28 +00:00
Evan Cheng 29be057d92 Various SSE2 conversion intrinsics 
llvm-svn: 27603
 2006-04-12 05:20:24 +00:00
Evan Cheng 70c74a3ced Added __builtin_ia32_storelv4si, __builtin_ia32_movqv4si, 
__builtin_ia32_loadlv4si, __builtin_ia32_loaddqu, __builtin_ia32_storedqu.

llvm-svn: 27599
 2006-04-11 22:28:25 +00:00
Nate Begeman f19bcd5177 Fix SingleSource/UnitTests/Vector/sumarray-dbl 
llvm-svn: 27594
 2006-04-11 19:44:43 +00:00
Nate Begeman 1bb132099f Fix PR727, correctly handling large stack aligments on ppc 
llvm-svn: 27593
 2006-04-11 19:29:21 +00:00
Chris Lattner aaa04230bd we have a shuffle instr, add an example. 
llvm-svn: 27592
 2006-04-11 18:47:03 +00:00
Evan Cheng 6b60357f4a gcc lower SSE prefetch into generic prefetch intrinsic. Need to add support 
later.

llvm-svn: 27591
 2006-04-11 18:04:57 +00:00
Evan Cheng 6ea715af28 Misc. intrinsics. 
llvm-svn: 27590
 2006-04-11 17:35:57 +00:00
Jim Laskey 02b3b72bfc Suppress debug label when not debug. 
llvm-svn: 27588
 2006-04-11 08:11:53 +00:00
Evan Cheng 09a956271a movnt* and maskmovdqu intrinsics 
llvm-svn: 27587
 2006-04-11 06:57:30 +00:00
Chris Lattner e4db08a2f1 Vector function results go into V2 according to GCC. The darwin ABI doc 
doesn't say where they go :-/

llvm-svn: 27579
 2006-04-11 01:38:39 +00:00
Chris Lattner 92533cfb4a Move some return-handling code from lowerarguments to the ISD::RET handling stuff. 
No functionality change.

llvm-svn: 27577
 2006-04-11 01:21:43 +00:00
Evan Cheng 12ba3e23d0 Added support for _mm_move_ss and _mm_move_sd. 
llvm-svn: 27575
 2006-04-11 00:19:04 +00:00
Jim Laskey dca2655daa Use existing information. 
llvm-svn: 27574
 2006-04-10 23:09:19 +00:00
Evan Cheng f8ac02283c Remove some bogus patterns; clean up. 
llvm-svn: 27569
 2006-04-10 22:35:16 +00:00
Chris Lattner d99f57c1e1 add a note 
llvm-svn: 27567
 2006-04-10 21:51:03 +00:00
Evan Cheng 051de9a82b Remove an entry that is now done. 
llvm-svn: 27565
 2006-04-10 21:42:57 +00:00
Evan Cheng 76112c3cb8 Added some missing shuffle patterns. 
llvm-svn: 27564
 2006-04-10 21:42:19 +00:00
Evan Cheng 664fcba5fa Correct an entry 
llvm-svn: 27563
 2006-04-10 21:41:39 +00:00
Evan Cheng 395fa3d2a6 movups / movupd 
llvm-svn: 27562
 2006-04-10 21:11:06 +00:00
Evan Cheng 617a6a812e Conditional move of vector types. 
llvm-svn: 27556
 2006-04-10 07:23:14 +00:00
Evan Cheng 014849e121 New entries 
llvm-svn: 27555
 2006-04-10 07:22:03 +00:00
Evan Cheng c9ed8e4c1a Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1. 
llvm-svn: 27554
 2006-04-10 07:21:31 +00:00
Chris Lattner 3a68f3c3ca properly mark vector selects as expanded to select_cc 
llvm-svn: 27544
 2006-04-08 22:59:15 +00:00
Chris Lattner 0a3d1bbca4 Add VRRC select support 
llvm-svn: 27543
 2006-04-08 22:45:08 +00:00
Nate Begeman 3f9c17906f Disable switch lowering for targets based on the selection dag isel, 
letting the code generator handle them directly.

llvm-svn: 27539
 2006-04-08 19:46:55 +00:00
Chris Lattner d9e80f4516 Implement PowerPC/CodeGen/vec_splat.ll:spltish to use vsplish instead of a 
constant pool load.

llvm-svn: 27538
 2006-04-08 07:14:26 +00:00
Chris Lattner d71a1f946d Change the interface to the predicate that determines if vsplti* can be used. 
No functionality changes.

llvm-svn: 27536
 2006-04-08 06:46:53 +00:00
Reid Spencer cf905223c5 Initialize SDOperand values because the gcc 4.0.2 compiler complains about 
them.

llvm-svn: 27534
 2006-04-08 05:38:03 +00:00
Evan Cheng 0df9c9f57d ldmxcsr and stmxcsr. 
llvm-svn: 27506
 2006-04-08 00:47:44 +00:00
Evan Cheng ac847268c5 Code clean up. 
llvm-svn: 27501
 2006-04-07 21:53:05 +00:00
Evan Cheng aa18a52545 Added patterns for MOVHPSmr and MOVLPSmr. 
llvm-svn: 27497
 2006-04-07 21:20:58 +00:00
Evan Cheng 748e573ce5 Keep track of an Mac OS X / x86 ABI bug. 
llvm-svn: 27496
 2006-04-07 21:19:53 +00:00
Jim Laskey c0d6518f27 Make sure that debug labels are defined within the same section and after the 
entry point of a function.

llvm-svn: 27494
 2006-04-07 20:44:42 +00:00
Jim Laskey 2d7298c362 Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Evan Cheng d8e1a01be6 A MOVPS2SSmr, i.e. _mm_store_ss, encoding bug. 
Also MOVPDI2DIrr.

llvm-svn: 27476
 2006-04-06 23:53:29 +00:00
Evan Cheng c995b45f67 - movlp{s|d} and movhp{s|d} support. 
- Normalize shuffle nodes so result vector lower half elements come from the
  first vector, the rest come from the second vector. (Except for the
  exceptions :-).
- Other minor fixes.

llvm-svn: 27474
 2006-04-06 23:23:56 +00:00
Evan Cheng acf8b3c828 New entries. 
llvm-svn: 27473
 2006-04-06 23:21:24 +00:00
Andrew Lenharth 1596a1b276 This may be overconservative, but it lets the new cfe compile 
llvm-svn: 27471
 2006-04-06 23:18:45 +00:00
Chris Lattner e61cfad815 Add an item 
llvm-svn: 27470
 2006-04-06 23:16:19 +00:00
Chris Lattner 466841ddc7 Make sure to return the result in the right type. 
llvm-svn: 27469
 2006-04-06 23:12:19 +00:00
Chris Lattner a4bbfaed5c Match vpku[hw]um(x,x). 
Convert vsldoi(x,x) to work the same way other (x,x) cases work.

llvm-svn: 27467
 2006-04-06 22:28:36 +00:00
Chris Lattner f38e033270 Add support for matching vmrg(x,x) patterns 
llvm-svn: 27463
 2006-04-06 22:02:42 +00:00
Andrew Lenharth cee782d514 fix some linking problems with the new gcc 
llvm-svn: 27460
 2006-04-06 21:26:32 +00:00
Chris Lattner d1dcb52093 Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles. 
llvm-svn: 27457
 2006-04-06 21:11:54 +00:00
Chris Lattner a4c727f1cc remove two done items 
llvm-svn: 27453
 2006-04-06 19:19:38 +00:00
Chris Lattner 1d33819194 Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to 
lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll

llvm-svn: 27450
 2006-04-06 18:26:28 +00:00
Chris Lattner e8b83b4206 Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into 
vperm with a perm mask lvx'd from the constant pool.

llvm-svn: 27448
 2006-04-06 17:23:16 +00:00
Evan Cheng 695e45c252 POR encoded as PAND, yikes. 
llvm-svn: 27446
 2006-04-06 01:49:20 +00:00
Evan Cheng dddb688a40 An entry about comi / ucomi intrinsics. 
llvm-svn: 27445
 2006-04-05 23:46:04 +00:00
Evan Cheng 780382946e Support for comi / ucomi intrinsics. 
llvm-svn: 27444
 2006-04-05 23:38:46 +00:00
Chris Lattner c94d932447 Add all of the data stream intrinsics and instructions. woo 
llvm-svn: 27442
 2006-04-05 22:27:14 +00:00
Chris Lattner 39dc64c955 Fix a typo 
llvm-svn: 27440
 2006-04-05 20:15:25 +00:00
Chris Lattner 39cc717c65 Fix CodeGen/PowerPC/2006-04-05-splat-ish.ll 
llvm-svn: 27439
 2006-04-05 17:39:25 +00:00
Evan Cheng f3b52c84ea Handle canonical form of e.g. 
vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>

This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.

It would match a {p}unpckl on x86.

llvm-svn: 27437
 2006-04-05 07:20:06 +00:00
Evan Cheng 6d196db40d Bogus assert 
llvm-svn: 27434
 2006-04-05 06:11:20 +00:00
Evan Cheng 2cf4232ced Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered. 
llvm-svn: 27433
 2006-04-05 06:09:26 +00:00
Evan Cheng 59a6355e82 Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw. 
llvm-svn: 27427
 2006-04-05 01:47:37 +00:00
Chris Lattner 2f8e2b2895 add vsl 
llvm-svn: 27425
 2006-04-05 01:16:22 +00:00
Chris Lattner 575352ac20 add vmladduhm 
llvm-svn: 27423
 2006-04-05 00:49:48 +00:00
Chris Lattner 5a528e565b Add m[tf]vscr instructions. 
llvm-svn: 27421
 2006-04-05 00:03:57 +00:00
Chris Lattner 0c82447c66 add a note 
llvm-svn: 27419
 2006-04-04 23:45:11 +00:00
Chris Lattner 281bb5da1d Add missing byte merges. 
llvm-svn: 27418
 2006-04-04 23:43:56 +00:00
Chris Lattner fc50ae521c Add FP -> Int Conversions 
llvm-svn: 27417
 2006-04-04 23:25:02 +00:00
Chris Lattner 96338b6a21 add average intrinsics 
llvm-svn: 27416
 2006-04-04 23:14:00 +00:00
Chris Lattner 4464383a17 add a note 
llvm-svn: 27414
 2006-04-04 22:43:55 +00:00
Chris Lattner 4a744e5c9d Fix some broken logic that would cause us to codegen {2147483647,2147483647,2147483647,2147483647} as 'vspltisb v0, -1'. 
llvm-svn: 27413
 2006-04-04 22:28:35 +00:00
Evan Cheng 011c23d9d3 Added pslldq and psrldq. 
llvm-svn: 27412
 2006-04-04 21:49:39 +00:00