Commit Graph

3173 Commits

Author SHA1 Message Date
Coby Tayree afdaa6704f [x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blob
Differential Revision: https://reviews.llvm.org/D38445

llvm-svn: 318739
2017-11-21 08:50:10 +00:00
Reid Kleckner 13a3d9eb7b [MS] Increase default new alignment for win64 and test it
Summary:
This raises __STDCPP_DEFAULT_NEW_ALIGNMENT__ from 8 to 16 on Win64.
This matches platforms that follow the usual `2 * sizeof(void*)`
alignment requirement for malloc. We might want to consider making that
the default rather than relying on long double alignment.

Fixes PR35356

Reviewers: STL_MSFT, rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D40277

llvm-svn: 318723
2017-11-21 01:25:56 +00:00
Craig Topper 0ff0fbbd6b [X86] Remove 'mm3now' from isValidFeatureName.
The correct spelling is '3dnow' which is already in the list.

llvm-svn: 318716
2017-11-21 00:33:26 +00:00
Carlo Bertolli 62fae15600 [OpenMP] Initial implementation of code generation for pragma 'teams distribute parallel for' on host
https://reviews.llvm.org/D40187

This patch implements code gen for 'teams distribute parallel for' on the host, including all its clauses and related regression tests.

llvm-svn: 318692
2017-11-20 20:46:39 +00:00
Craig Topper 546cee4170 [X86] Add icelake CPU support for -march.
llvm-svn: 318617
2017-11-19 02:55:15 +00:00
Craig Topper 222c1725cd [X86] Set __corei7__ preprocessor defines for skylake server and cannonlake.
This is the resolution we came to in D38824.

llvm-svn: 318616
2017-11-19 02:55:14 +00:00
Jonas Hahnfeld 87d4426988 [OpenMP] Show error if VLAs are not supported
Some target devices (e.g. Nvidia GPUs) don't support dynamic stack
allocation and hence no VLAs. Print errors with description instead
of failing in the backend or generating code that doesn't work.

This patch handles explicit uses of VLAs (local variable in target
or declare target region) or implicitly generated (private) VLAs
for reductions on VLAs or on array sections with non-constant size.

Differential Revision: https://reviews.llvm.org/D39505

llvm-svn: 318601
2017-11-18 21:00:46 +00:00
Alexey Bataev f836537516 [OPENMP] Codegen for `target simd` construct.
Added codegen support for `target simd` directive.

llvm-svn: 318536
2017-11-17 17:57:25 +00:00
Martin Storsjo ec82128971 [MinGW] Define __ARM_DWARF_EH__ for MinGW/ARM
Since SVN r318510, the MinGW/ARM configuration defaults to
dwarf exception handling.

Differential Revision: https://reviews.llvm.org/D39533

llvm-svn: 318511
2017-11-17 08:06:49 +00:00
Ben Hamilton 7838101678 [VirtualFileSystem] Support creating directories then adding files inside
Summary:
In https://reviews.llvm.org/D39572 , I added support for specifying
`Type` when invoking `InMemoryFileSystem::addFile()`.

However, I didn't account for the fact that when `Type` is
`directory_file`, we need to construct an `InMemoryDirectory`, not an
`InMemoryFile`, or else clients cannot create files inside that
directory.

This diff fixes the bug and adds a test.

Test Plan: New test added. Ran test with:

  % make -j12 check-clang-tools

Reviewers: bkramer, hokein

Reviewed By: bkramer

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D40140

llvm-svn: 318445
2017-11-16 19:34:08 +00:00
Erich Keane 6da1108659 Split x86 "Processor" info into its own def file. [NFC]
A first step toward removing the repetition of
features/CPU info in the x86 target info, this
patch pulls all the processor information out into
its own .def file.

Differential Revision: https://reviews.llvm.org/D40093

llvm-svn: 318343
2017-11-15 22:25:39 +00:00
Erich Keane 8202521cf5 Simplify CpuIs code to use include from LLVM
LLVM exposes a file in the backend (X86TargetParser.def) that
contains information about the correct list of CpuIs values.

This patch removes 2 of the copied and pasted versions of this
list from clang and instead includes the data from the .def file.

Differential Revision: https://reviews.llvm.org/D40054

llvm-svn: 318234
2017-11-15 00:11:24 +00:00
Gabor Horvath 328d3afc3b Make DiagnosticIDs::getAllDiagnostics static. NFC.
Patch by: Andras Leitereg!

Differential Revision: https://reviews.llvm.org/D39372

llvm-svn: 318150
2017-11-14 12:14:49 +00:00
Alexey Bataev 5d7edca316 [OPENMP] Codegen for `#pragma omp target parallel for simd`.
Added codegen for `#pragma omp target parallel for simd` and clauses.

llvm-svn: 317813
2017-11-09 17:32:15 +00:00
Alexey Bataev 9a5e64f56a [OPENMP] Treat '#pragma omp target parallel for simd' as simd directive.
`#pragma omp target parallel for simd` mistakenly was not treated as a
simd directive, fixed this problem.

llvm-svn: 317811
2017-11-09 17:01:35 +00:00
Ben Hamilton e5af5bde71 [VirtualFileSystem] InMemoryFileSystem::addFile(): Type and Perms
Summary:
This implements a FIXME in InMemoryFileSystem::addFile(), allowing
clients to specify User, Group, Type, and/or Perms when creating a
file in an in-memory filesystem.

New tests included. Ran tests with:

% ninja BasicTests && ./tools/clang/unittests/Basic/BasicTests

Fixes PR#35172 (https://bugs.llvm.org/show_bug.cgi?id=35172)

Reviewers: bkramer, hokein

Reviewed By: bkramer, hokein

Subscribers: alexfh

Differential Revision: https://reviews.llvm.org/D39572

llvm-svn: 317800
2017-11-09 16:01:16 +00:00
Alexey Bataev fb0ebecf0e [OPENMP] Codegen for `#pragma omp target parallel for`.
llvm-svn: 317719
2017-11-08 20:16:14 +00:00
Mitch Phillips 512fa40b3e Update SanitizerSpecialCaseList to use renamed functions in base class.
Note: This change has a cyclical dependency on D39485. Both these changes must be submitted at the same time to avoid a build breakage.

Reviewers: vlad.tsyrklevich

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D39486

llvm-svn: 317616
2017-11-07 21:16:37 +00:00
Martin Storsjo b438ea3f1c [X86] Add 3dnow and 3dnowa to the list of valid target features
These were missed in SVN r316783, which broke compiling mingw-w64 CRT.

Differential Revision: https://reviews.llvm.org/D39631

llvm-svn: 317504
2017-11-06 20:33:13 +00:00
Eugene Zelenko 918e0ca77a [Basic] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 317381
2017-11-03 22:35:27 +00:00
Craig Topper a2b907a469 [X86] Define i586 and pentium preprocessor defines for -march=lakemont to match GCC
llvm-svn: 317069
2017-11-01 02:18:49 +00:00
Saleem Abdulrasool 1924b24aca Basic: improve coverage for Darwin targets and fix ABI
The existing coverage for the Darwin targets wasn't enough to catch all
the variations.  Improve the coverage a bit further and fix a few cases
for Darwin targets.

llvm-svn: 316826
2017-10-28 06:00:43 +00:00
Saleem Abdulrasool 418a816cdc ARM: centralise SizeType, PtrDiffType, and IntPtrType
Centralise the definitions of these compiler vended types to aid
inspection to ensure that they are defined similarly.  The one case that
stands out is the Darwin case where the types do not match up.  This
fixes the API conformance for APCS-GNU as well.

llvm-svn: 316810
2017-10-27 23:04:27 +00:00
Erich Keane cf8807c931 Filter out invalid 'target' items from being passed to LLVM
Craig noticed that CodeGen wasn't properly ignoring the
values sent to the target attribute. This patch ignores
them.

This patch also sets the 'default' for this checking to
'supported', since only X86 has implemented the support
for checking valid CPU names and Feature Names.

One test was changed to i686, since it uses a lakemont,
which would otherwise be prohibited in x86_64.

Differential Revision: https://reviews.llvm.org/D39357

llvm-svn: 316783
2017-10-27 18:32:23 +00:00
Erich Keane 3231918f4f Remove x86,x86_32/64 from isValidFeatureName
These are not valid values for this, and are pretty
non-sensical, since LLVM doesn't understand them.

Differential Revision: https://reviews.llvm.org/D39378

llvm-svn: 316781
2017-10-27 18:29:02 +00:00
Craig Topper 13cb23b8b3 [X86] Add 'sse4' to X86TargetInfo::isValidFeatureName
sse4 is valid for target attribute and functions as an alias of sse4.2.

llvm-svn: 316718
2017-10-27 00:18:16 +00:00
Craig Topper a6021e3bc1 [X86] Make -march=i686 an alias of -march=pentiumpro
I think the only reason they are different is because we don't set tune_i686 for -march=i686 to match GCC. But GCC 4.9.0 seems to have changed this behavior and they do set it now. So I think they can aliases now.

Differential Revision: https://reviews.llvm.org/D39349

llvm-svn: 316712
2017-10-26 23:06:19 +00:00
Justin Lebar 066494d8c1 [CUDA] Print an error if you try to compile with < sm_30 on CUDA 9.
Summary:
CUDA 9's minimum sm is sm_30.

Ideally we should also make sm_30 the default when compiling with CUDA
9, but that seems harder than it should be.

Subscribers: sanjoy

Differential Revision: https://reviews.llvm.org/D39109

llvm-svn: 316611
2017-10-25 21:32:06 +00:00
Craig Topper 009cebfed8 [X86] Add avx512vpopcntdq to Knights Mill
As indicated by Table 1-1 in Intel Architecture Instruction Set Extensions and Future Features Programming Reference from October 2017.

llvm-svn: 316593
2017-10-25 17:10:58 +00:00
Erich Keane 9ec60988cd Pull X86 "CPUKind" checking into .cpp file. [NFC]
Preparing to do a refactor of CPU/feature checking, this
patch pulls the one CPU implementation from the .h file
to the .cpp file.

llvm-svn: 316338
2017-10-23 16:20:15 +00:00
Saleem Abdulrasool e5696580aa Basic: restore {,u}intptr_t on NetBSD/ARM
NetBSD uses `long int` for `intptr_t` on ARM.  This was changed in SVN
r316046, referenced against other compilers.  However, NetBSD's
reference was incorrect as the current clang behaviour is more
up-to-date.  Restore the original behaviour for that target.

llvm-svn: 316204
2017-10-20 04:11:28 +00:00
Jan Vesely cda72c9c3c AMDGPU: Parse r600 CPU name early and expose FMAF capability
Improve amdgcn macro test
Differential Revision: https://reviews.llvm.org/D38667

llvm-svn: 316181
2017-10-19 20:40:13 +00:00
Sumanth Gundapaneni 57098f5ac3 [Hexagon] Handling of new HVX flags and target-features
This patch has the following changes
A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector.
Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b"

The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag
is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx
or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The 
-mhvx flag adds the target-feature "+hvxv{hvx_version}"

The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is
still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag.

The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees
them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B"

The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag

The macro HVX_LENGTH is defined and is set to the length of the vector. 
Eg: #define HVX_LENGTH 64

The macro HVX_ARCH is defined and is set to the version of the HVX. 
Eg: #define HVX_ARCH 62

Differential Revision: https://reviews.llvm.org/D38852

llvm-svn: 316102
2017-10-18 18:10:13 +00:00
Saleem Abdulrasool 8d799f8ef9 Basic: fix __{,U}INTPTR_TYPE__ on ARM
Darwin and OpenBSD are the only platforms which use `long int` for
`__INTPTR_TYPE__`.  The other platforms use `int` in 32-bit, and `long
int` on 64-bit (except for VMS and Windows which are LLP64).  Adjust the
type definitions to match the platform definitions.  We now generate the
same definition as GCC on all the targets.

llvm-svn: 316046
2017-10-18 00:00:50 +00:00
Saleem Abdulrasool f78f7c05d4 Basic: fix `__INTPTR_TYPE__` for Windows ARM
The `IntPtrType` for Windows ARM should be `int` as per MSVC.  Adjust
the type accordingly.

llvm-svn: 316042
2017-10-17 22:49:53 +00:00
Jonas Hahnfeld 23604a8399 [OpenMP] Implement omp_is_initial_device() as builtin
This allows to return the static value that we know at compile time.

Differential Revision: https://reviews.llvm.org/D38968

llvm-svn: 316001
2017-10-17 14:28:14 +00:00
Alex Lorenz f5ca27cc37 [refactor] allow the use of refactoring diagnostics
This commit allows the refactoring library to use its own set of
refactoring-specific diagnostics to reports things like initiation errors.

Differential Revision: https://reviews.llvm.org/D38772

llvm-svn: 315924
2017-10-16 18:28:26 +00:00
Alexander Richardson 6d989436d0 Convert clang::LangAS to a strongly typed enum
Summary:
Convert clang::LangAS to a strongly typed enum

Currently both clang AST address spaces and target specific address spaces
are represented as unsigned which can lead to subtle errors if the wrong
type is passed. It is especially confusing in the CodeGen files as it is
not possible to see what kind of address space should be passed to a
function without looking at the implementation.
I originally made this change for our LLVM fork for the CHERI architecture
where we make extensive use of address spaces to differentiate between
capabilities and pointers. When merging the upstream changes I usually
run into some test failures or runtime crashes because the wrong kind of
address space is passed to a function. By converting the LangAS enum to a
C++11 we can catch these errors at compile time. Additionally, it is now
obvious from the function signature which kind of address space it expects.

I found the following errors while writing this patch:

- ItaniumRecordLayoutBuilder::LayoutField was passing a clang AST address
  space to  TargetInfo::getPointer{Width,Align}()
- TypePrinter::printAttributedAfter() prints the numeric value of the
  clang AST address space instead of the target address space.
  However, this code is not used so I kept the current behaviour
- initializeForBlockHeader() in CGBlocks.cpp was passing
  LangAS::opencl_generic to TargetInfo::getPointer{Width,Align}()
- CodeGenFunction::EmitBlockLiteral() was passing a AST address space to
  TargetInfo::getPointerWidth()
- CGOpenMPRuntimeNVPTX::translateParameter() passed a target address space
  to Qualifiers::addAddressSpace()
- CGOpenMPRuntimeNVPTX::getParameterAddress() was using
  llvm::Type::getPointerTo() with a AST address space
- clang_getAddressSpace() returns either a LangAS or a target address
  space. As this is exposed to C I have kept the current behaviour and
  added a comment stating that it is probably not correct.

Other than this the patch should not cause any functional changes.

Reviewers: yaxunl, pcc, bader

Reviewed By: yaxunl, bader

Subscribers: jlebar, jholewinski, nhaehnle, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D38816

llvm-svn: 315871
2017-10-15 18:48:14 +00:00
Craig Topper f8c10aa3a3 [X86] Add skeleton support for knm cpu
This adds support Knights Mill CPU. Preprocessor defines match gcc's implementation.

Differential Revision: https://reviews.llvm.org/D38813

llvm-svn: 315723
2017-10-13 18:14:24 +00:00
Yaxun Liu b7318e02c1 [OpenCL] Add LangAS::opencl_private to represent private address space in AST
Currently Clang uses default address space (0) to represent private address space for OpenCL
in AST. There are two issues with this:

Multiple address spaces including private address space cannot be diagnosed.
There is no mangling for default address space. For example, if private int* is emitted as
i32 addrspace(5)* in IR. It is supposed to be mangled as PUAS5i but it is mangled as
Pi instead.

This patch attempts to represent OpenCL private address space explicitly in AST. It adds
a new enum LangAS::opencl_private and adds it to the variable types which are implicitly
private:

automatic variables without address space qualifier

function parameter

pointee type without address space qualifier (OpenCL 1.2 and below)

Differential Revision: https://reviews.llvm.org/D35082

llvm-svn: 315668
2017-10-13 03:37:48 +00:00
Martin Storsjo d8a44ed74c [COFF, ARM64] Add MS builtins __dmb, __dsb, __isb
Differential Revision: https://reviews.llvm.org/D38821

llvm-svn: 315567
2017-10-12 07:05:37 +00:00
Craig Topper 8c8e83a15f [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.
The compiler-rt implementation already supported it, it just wasn't exposed.

llvm-svn: 315517
2017-10-11 21:42:02 +00:00
Peter Collingbourne 0dfdb44797 Support: Have directory_iterator::status() return FindFirstFileEx/FindNextFile results on Windows.
This allows clients to avoid an unnecessary fs::status() call on each
directory entry. Because the information returned by FindFirstFileEx
is a subset of the information returned by a regular status() call,
I needed to extract a base class from file_status that contains only
that information.

On my machine, this reduces the time required to enumerate a ThinLTO
cache directory containing 520k files from almost 4 minutes to less
than 2 seconds.

Differential Revision: https://reviews.llvm.org/D38716

llvm-svn: 315378
2017-10-10 22:19:46 +00:00
Saleem Abdulrasool 729379a1e1 Driver: hoist the `wchar_t` handling to the driver
Move the logic for determining the `wchar_t` type information into the
driver.  Rather than passing the single bit of information of
`-fshort-wchar` indicate to the frontend the desired type of `wchar_t`
through a new `-cc1` option of `-fwchar-type` and indicate the
signedness through `-f{,no-}signed-wchar`.  This replicates the current
logic which was spread throughout Basic into the
`RenderCharacterOptions`.

Most of the changes to the tests are to ensure that the frontend uses
the correct type.  Add a new test set under `test/Driver/wchar_t.c` to
ensure that we calculate the proper types for the various cases.

llvm-svn: 315126
2017-10-06 23:09:55 +00:00
Carlo Bertolli ba1487ba69 [OpenMP] Initial implementation of teams distribute code generation
https://reviews.llvm.org/D38371

This patch implements codegen for the combined 'teams distribute" OpenMP pragma and adds regression tests for all its clauses.

llvm-svn: 314905
2017-10-04 14:12:09 +00:00
Walter Lee fc7f8f25f3 Add support for Myriad ma2x8x series of CPUs
Summary:
Also:
- Add support for some older Myriad CPUs that were missing.
- Fix some incorrect compiler defines for exisitng CPUs.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D37551

llvm-svn: 314706
2017-10-02 18:50:57 +00:00
Yaxun Liu 304f349770 [AMDGPU] Allow flexible register names in inline asm constraints
Currently AMDGPU inline asm only allow v and s as register names in constraints.

This patch allows the following register names in constraints: (n, m is unsigned integer, n < m)

v

s

{vn} or {v[n]}

{sn} or {s[n]}

{S} , where S is a special register name

{v[n:m]}

{s[n:m]}

Differential Revision: https://reviews.llvm.org/D37568

llvm-svn: 314452
2017-09-28 19:07:59 +00:00
Davide Italiano 64094f8621 [Targets/X86] Remove unneded `return` in setMaxAtomicWidth(). NFCI.
llvm-svn: 314367
2017-09-28 00:24:20 +00:00
Dylan McKay 74d1e8683c [AVR] Update data layout to match current LLVM trunk
The data layout was changed in r314179 to fix atomic loads and stores.

llvm-svn: 314354
2017-09-27 22:09:01 +00:00
Saleem Abdulrasool 4d321336d0 Basic: support Preserve{Most,All} CC on Windows
Add support for the `preserve_mostcc` and `preserve_allcc` on Windows
x86_64 and AArch64.  This is used by Swift.

llvm-svn: 314236
2017-09-26 19:26:01 +00:00
Vlad Tsyrklevich 2eccdab308 Allow specifying sanitizers in blacklists
Summary:
This is the follow-up patch to D37924.

This change refactors clang to use the the newly added section headers
in SpecialCaseList to specify which sanitizers blacklists entries
should apply to, like so:

  [cfi-vcall]
  fun:*bad_vcall*
  [cfi-derived-cast|cfi-unrelated-cast]
  fun:*bad_cast*

The SanitizerSpecialCaseList class has been added to allow querying by
SanitizerMask, and SanitizerBlacklist and its downstream users have been
updated to provide that information. Old blacklists not using sections
will continue to function identically since the blacklist entries will
be placed into a '[*]' section by default matching against all
sanitizers.

Reviewers: pcc, kcc, eugenis, vsk

Reviewed By: eugenis

Subscribers: dberris, cfe-commits, mgorny

Differential Revision: https://reviews.llvm.org/D37925

llvm-svn: 314171
2017-09-25 22:11:12 +00:00
Michael Zuckerman 35731a0b84 [Clang] Adding missing feature to goldmont
Change-Id: I6c22478d16b8e02ce60dae2f8c80d43bc5ab3a9c
llvm-svn: 314104
2017-09-25 13:49:32 +00:00
Wei Mi b086289787 [Atomic][X8664] set max atomic inline width according to the target
This is to fix PR31620. MaxAtomicInlineWidth is set to 128 for x86_64. However
for target without cx16 support, 128 atomic operation will generate __sync_*
libcalls. The patch set MaxAtomicInlineWidth to 64 if the target doesn't support
cx16.

Differential Revision: https://reviews.llvm.org/D38046

llvm-svn: 313992
2017-09-22 16:30:00 +00:00
Gabor Horvath e350b0a196 Add Cross Translation Unit support library
This patch introduces a class that can help to build tools that require cross
translation unit facilities. This class allows function definitions to be loaded
from external AST files based on an index. In order to use this functionality an
index is required. The index format is a flat text file but it might be
replaced with a different solution in the near future. USRs are used as names to
look up the functions definitions. This class also does caching to avoid
redundant loading of AST files.

Right now only function defnitions can be loaded using this API because this is
what the in progress cross translation unit feature of the Static Analyzer
requires. In to future this might be extended to classes, types etc.

Differential Revision: https://reviews.llvm.org/D34512

llvm-svn: 313975
2017-09-22 11:11:01 +00:00
Craig Topper a98e1e214d [X86] Move even more of our CPU to feature mapping switch to use fallthroughs
This arranges more of the Intel and AMD CPUs into fallthrough positions based on their features. We may be able to merge this new AMD set with the BTVER or BDVER sets but I didn't look that closely.

Differential Revision: https://reviews.llvm.org/D37941

llvm-svn: 313497
2017-09-17 19:05:46 +00:00
Craig Topper 19a0a3ab68 [X86] Remove unnecessary extra encodings from the CPU name enum in clang
Summary:
For a lot of older CPUs we have a 1:1 mapping between CPU name and enum name. But many of them are effectively aliases of each other and as a result are always repeated together at every usage

This patch removes most of the duplication. It also uses StringSwitch::Cases to make the many to one mapping in the StringSwitch more obvious.

Reviewers: RKSimon, spatel, zvi, igorb

Reviewed By: RKSimon

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D37938

llvm-svn: 313462
2017-09-16 16:44:39 +00:00
Douglas Gregor f0b11de279 [Module map] Introduce a private module re-export directive.
Introduce a new "export_as" directive for top-level modules, which
indicates that the current module is a "private" module whose symbols
will eventually be exported through the named "public" module. This is
in support of a common pattern in the Darwin ecosystem where a single
public framework is constructed of several private frameworks, with
(currently) header duplication and some support from the linker.

Addresses rdar://problem/34438420.

llvm-svn: 313316
2017-09-14 23:38:44 +00:00
Yaxun Liu e37793545e [AMDGPU] Change addr space of clk_event_t, queue_t and reserve_id_t to global
Differential Revision: https://reviews.llvm.org/D37703

llvm-svn: 313171
2017-09-13 18:50:42 +00:00
MinSeong Kim 7c2556a895 [Basic] Update CMakeLists.txt to handle repo
Summary:
The find_first_existing_file and find_first_existing_vc_file macros in
lib/Basic/CMakeLists.txt are removed. The macros are also defined in
{LLVM}/cmake/modules/AddLLVM.cmake for the same purpose. This change
serves the following 2 objectives:

    1. To remove the redundant code in clang to use the same
       macros in llvm,
    2. The macros in AddLLVM.cmake can also handle repo for
       displaying correct version information.

Reviewers: jordan_rose, cfe-commits, modocache, hintonda

Reviewed By: hintonda

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D35533

llvm-svn: 312865
2017-09-09 14:18:53 +00:00
Richard Smith 6d9bc278ef Fix ownership of the MemoryBuffer in a FrontendInputFile.
This fixes a possible crash on certain kinds of corrupted AST file, but
checking in an AST file corrupted in just the right way will be a maintenance
nightmare because the format changes frequently.

llvm-svn: 312851
2017-09-09 01:14:04 +00:00
Jan Vesely 31ecb4bf60 [OpenCL] Add half load and store builtins
This enables load/stores of half type, without half being a legal type.

Differential Revision: https://reviews.llvm.org/D37231

llvm-svn: 312742
2017-09-07 19:39:10 +00:00
Artem Belevich 8af4e23d1e [CUDA] Added rudimentary support for CUDA-9 and sm_70.
For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.

On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.

Differential Revision: https://reviews.llvm.org/D37576

llvm-svn: 312734
2017-09-07 18:14:32 +00:00
Erich Keane 0a539b5859 Change Diagnostic Category size error from runtime to compiletime
Diagnostic Categories are fairly annoying, and are only enforced
by a runtime-debug-only assert. This puts in a touch more work
to get this all done at compile-time with static asserts

Differential Revision: https://reviews.llvm.org/D37122

llvm-svn: 311905
2017-08-28 18:53:17 +00:00
Alex Lorenz d0e27266d8 [Basic] Add a DiagnosticError llvm::ErrorInfo subclass
Clang's DiagnosticError is an llvm::Error payload that stores a partial
diagnostic and its location. I'll be using it in the refactoring engine.

Differential Revision: https://reviews.llvm.org/D36969

llvm-svn: 311778
2017-08-25 15:48:00 +00:00
Petar Jovanovic 5076511ed6 [mips] Introducing option -mabs=[legacy/2008]
In patch r205628 using abs.[ds] instruction is forced, as they should behave
in accordance with flags Has2008 and ABS2008. Unfortunately for revisions
prior mips32r6 and mips64r6, abs.[ds] is not generating correct result when
working with NaNs. To generate a sequence which always produce a correct
result but also to allow user more control on how his code is compiled,
option -mabs is added where user can choose legacy or 2008.
By default legacy mode is used on revisions prior R6. Mips32r6 and mips64r6
use abs2008 mode by default.

Patch by Aleksandar Beserminji

Differential Revision: https://reviews.llvm.org/D35982

llvm-svn: 311669
2017-08-24 16:06:30 +00:00
Coby Tayree 7b49dc9c68 [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraints
This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}.
Supersedes D35205
llvm counterpart: D36369

Differential Revision: https://reviews.llvm.org/D36371

llvm-svn: 311643
2017-08-24 09:07:34 +00:00
Yonghong Song c4ea1010c1 bpf: add -mcpu=# support for bpf
-mcpu=# will support:
  . generic: the default insn set
  . v1: insn set version 1, the same as generic
  . v2: insn set version 2, version 1 + additional jmp insns
  . probe: the compiler will probe the underlying kernel to
           decide proper version of insn set.

Examples:
$ clang -target bpf -mcpu=v1 -c t.c
$ clang -target bpf -mcpu=v2 -c t.c
$ clang -target bpf -mcpu=generic -c t.c
$ clang -target bpf -mcpu=probe -c t.c
$ clang -target bpf -mcpu=v3 -c t.c
error: unknown target CPU 'v3'

Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 311523
2017-08-23 04:26:17 +00:00
Petar Jovanovic 9d1c094670 [mips] Rename getSupportedNanEncoding() to getIEEE754Standard()
Rename the function getSupportedNanEncoding() to getIEEE754Standard(), since
this function will be used for non-nan related features.

Patch by Aleksandar Beserminji.

Differential Revision: https://reviews.llvm.org/D36824

llvm-svn: 311454
2017-08-22 13:35:27 +00:00
Konstantin Zhuravlyov a42719406f AMDGPU: add missing amdgcn processors and tests
- gfx600
  - gfx601
  - gfx703
  - gfx902
  - gfx903

Differential Revision: https://reviews.llvm.org/D36771

llvm-svn: 311141
2017-08-18 01:13:39 +00:00
Sven van Haastregt efb4d4c78c [OpenCL] Allow targets to select address space per type
Generalize getOpenCLImageAddrSpace into getOpenCLTypeAddrSpace, such
that targets can select the address space per type.

No functional changes intended.

Initial patch by Simon Perretta.

Differential Revision: https://reviews.llvm.org/D33989

llvm-svn: 310911
2017-08-15 09:38:18 +00:00
Richard Smith 6c74e32139 [c++2a] Treat 'concept' and 'requires' as keywords, add compat warning for C++17 and before.
llvm-svn: 310803
2017-08-13 21:32:33 +00:00
Martin Storsjo 31cac7a67c [AArch64] Add support for a MinGW AArch64 target
Differential Revision: https://reviews.llvm.org/D36364

llvm-svn: 310798
2017-08-13 19:42:17 +00:00
Stefan Maksimovic 76391b101d Revert r310057
Bring back changes which r304953 introduced since
they were in fact not the cause of failures described
in r310057 commit message.

llvm-svn: 310702
2017-08-11 11:03:54 +00:00
Craig Topper 699ae0c173 [X86] Implement __builtin_cpu_is
This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc.

Differential Revision: https://reviews.llvm.org/D35449

llvm-svn: 310657
2017-08-10 20:28:30 +00:00
Craig Topper 41a550ccfa [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.
They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO.

llvm-svn: 310386
2017-08-08 17:43:44 +00:00
Martin Storsjo c85d26b0f3 [AArch64] Ignore stdcall and similar on aarch64/windows
This is similar to what's done on arm and x86_64, where
these calling conventions are silently ignored, as in
SVN r245076.

Differential Revision: https://reviews.llvm.org/D36105

llvm-svn: 310303
2017-08-07 20:52:04 +00:00
Yaxun Liu 39195062c2 Add OpenCL 2.0 atomic builtin functions as Clang builtin
OpenCL 2.0 atomic builtin functions have a scope argument which is ideally
represented as synchronization scope argument in LLVM atomic instructions.

Clang supports translating Clang atomic builtin functions to LLVM atomic
instructions. However it currently does not support synchronization scope
of LLVM atomic instructions. Without this, users have to use LLVM assembly
code to implement OpenCL atomic builtin functions.

This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin
functions, which supports generating LLVM atomic instructions with
synchronization scope operand.

Currently only constant memory scope argument is supported. Support of
non-constant memory scope argument will be added later.

Differential Revision: https://reviews.llvm.org/D28691

llvm-svn: 310082
2017-08-04 18:16:31 +00:00
Stefan Maksimovic 5c7aaa5ff3 Revert r304953 for release 5.0.0
This is causing failures when compiling clang with -O3
as one of the structures used by clang is passed by
value and uses the fastcc calling convention.

Faliures manifest for stage2 mips build.

llvm-svn: 310057
2017-08-04 12:37:34 +00:00
Walter Lee 4e93a6986e Define _GNU_SOURCE for RTEMS c++
Summary: This is required by the libc++ locale support.

Reviewers: jyknight

Subscribers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D36121

llvm-svn: 309815
2017-08-02 14:36:52 +00:00
Ilya Biryukov 47035c0255 Use VFS operations in FileManager::makeAbsolutePath.
Summary: It used to call into llvm::sys::fs::make_absolute.

Reviewers: akyrtzi, erikjv, bkramer, krasimir, klimek

Reviewed By: klimek

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D36155

llvm-svn: 309795
2017-08-02 07:25:24 +00:00
Coby Tayree d2bb48f0bd [x86][inline-asm]Allow a pack of Control Debug to be properly picked
Allows the incorporation of legit (x86) Debug Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D36074

llvm-svn: 309672
2017-08-01 10:51:09 +00:00
Walter Lee 973131071a Move RTEMS to OSTargets.h
Differential Revision: https://reviews.llvm.org/D36106

llvm-svn: 309626
2017-07-31 21:00:16 +00:00
Martin Storsjo 588a3e5e6c [AArch64] Don't define __LP64__ when targeting Windows
Windows/ARM64 is a LLP64 environment, so don't set this default
define.

Differential Revision: https://reviews.llvm.org/D36098

llvm-svn: 309619
2017-07-31 20:40:53 +00:00
Martin Storsjo e2a247ccb0 [Targets] Move addCygMingDefines into the arch-independent Targets.cpp (NFC)
This fixes a dependency inconsistency, where addMinGWDefines in Targets.cpp
(used from other architectures than X86) called the addCygMingDefines function
in X86.h.

This was inconsistently split in SVN r308791 (D35701).

Differential Revision: https://reviews.llvm.org/D36072

llvm-svn: 309598
2017-07-31 18:17:38 +00:00
Coby Tayree 5ac75b5744 [x86][inline-asm]Allow a pack of Control Regs to be properly picked
Allows the incorporation of legit (x86) Control Regs within inline asm stataements

Differential Revision: https://reviews.llvm.org/D35903

llvm-svn: 309508
2017-07-30 10:19:10 +00:00
Akira Hatanaka c47fcf0ae5 Revert r264998 and r265035.
r303175 made changes to have __cxa_allocate_exception return a 16-byte
aligned pointer, so it's no longer necessary to specify a lower
alignment (8-bytes) for exception objects on Darwin.

rdar://problem/32363695

llvm-svn: 309308
2017-07-27 18:52:44 +00:00
Florian Hahn ef5bbd61da Update to use enum classes for various ARM *Kind enums
Summary: This updates the relevant Clang parts for the LLVM change D35882.

Reviewers: rengolin, chandlerc, javed.absar, rovka

Reviewed By: rovka

Subscribers: aemerson, cfe-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D35884

llvm-svn: 309289
2017-07-27 16:28:39 +00:00
Tim Northover ad4c5db1ef AArch64 & ARM: move TargetInfo functions from .h to .cpp file. NFC.
Most of them are virtual anyway, and the few remaining ones can move to the
.cpp for consistency.

llvm-svn: 308898
2017-07-24 17:06:23 +00:00
Yuka Takahashi b40f4db4af [Bash-autocompletion] Fixed typo and add '-' after -Wno
Summary: -Wno-<warning> was autocompleted as -Wno<warning>, so fixed this typo.

Differential Revision: https://reviews.llvm.org/D35762

llvm-svn: 308824
2017-07-22 12:35:15 +00:00
Erich Keane 2b9657b570 Remove Bitrig: Clang Changes
Bitrig code has been merged back to OpenBSD, thus the OS has been abandoned.

Differential Revision: https://reviews.llvm.org/D35708

llvm-svn: 308797
2017-07-21 22:46:31 +00:00
Erich Keane ebba592682 Break up Targets.cpp into a header/impl pair per target type[NFCI]
Targets.cpp is getting unwieldy, and even minor changes cause the entire thing 
to cause recompilation for everyone. This patch bites the bullet and breaks 
it up into a number of files.

I tended to keep function definitions in the class declaration unless it 
caused additional includes to be necessary. In those cases, I pulled it 
over into the .cpp file. Content is copy/paste for the most part, 
besides includes/format/etc.


Differential Revision: https://reviews.llvm.org/D35701

llvm-svn: 308791
2017-07-21 22:37:03 +00:00
Alexey Bataev fa312f33f8 [OPENMP] Initial support for 'in_reduction' clause.
Parsing/sema analysis for 'in_reduction' clause for task-based
directives.

llvm-svn: 308768
2017-07-21 18:48:21 +00:00
Krzysztof Parzyszek 33e67ad098 [Hexagon] Add inline-asm constraint 'a' for modifier register class
For example
  asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory")

llvm-svn: 308763
2017-07-21 18:07:15 +00:00
Artem Belevich d7a73824e4 [NVPTX] Add lowering of i128 params.
The patch adds support of i128 params lowering. The changes are quite trivial to
support i128 as a "special case" of integer type. With this patch, we lower i128
params the same way as aggregates of size 16 bytes: .param .b8 _ [16].

Currently, NVPTX can't deal with the 128 bit integers:
* in some cases because of failed assertions like
  ValVTs.size() == OutVals.size() && "Bad return value decomposition"
* in other cases emitting PTX with .i128 or .u128 types (which are not valid [1])
  [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types

Differential Revision: https://reviews.llvm.org/D34555
Patch by: Denys Zariaiev (denys.zariaiev@gmail.com)

llvm-svn: 308675
2017-07-20 21:16:03 +00:00
Benjamin Kramer d515291ffd [vfs] Assert that the status is known in equivalent().
Otherwise we'd silently compare uninitialized data.

llvm-svn: 308604
2017-07-20 11:57:02 +00:00
Craig Topper 9377b9fa69 [X86] Put avx512vpopcntdq in the right spot in the validateCpuSupports string switch.
The validateCpuSupports switch is in the order of the enum defined in CGBuiltin.cpp and libgcc/compiler-rt.

llvm-svn: 308546
2017-07-19 22:58:58 +00:00
Erich Keane 2c748cc756 Add isValidCPUName and isValidFeature to TargetInfo
These two functions are really useful for implementations of attributes 
(including attribute-target), so add the functionality.

llvm-svn: 308530
2017-07-19 21:50:08 +00:00
Alexey Bataev 169d96a203 [OPENMP] Initial support for 'task_reduction' clause.
Parsing/sema analysis of the 'task_reduction' clause.

llvm-svn: 308352
2017-07-18 20:17:46 +00:00
Mandeep Singh Grang daa40b98ef [COFF, ARM64] Set the data type widths and the data layout string
Summary: COFF ARM64 is LLP64 platform. So int is 4 bytes, long is 4 bytes and long long is 8 bytes.

Reviewers: compnerd, ruiu, rnk, efriedma

Reviewed By: compnerd, efriedma

Subscribers: efriedma, javed.absar, cfe-commits, aemerson, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D34859

llvm-svn: 308222
2017-07-17 21:10:45 +00:00
Martin Storsjo 022e782e75 [AArch64] Add support for __builtin_ms_va_list on aarch64
Move builtins from the x86 specific scope into the global
scope. Their use is still limited to x86_64 and aarch64 though.

This allows wine on aarch64 to properly handle variadic functions.

Differential Revision: https://reviews.llvm.org/D34475

llvm-svn: 308218
2017-07-17 20:49:45 +00:00
Brian Gesiak 7873d822f7 [Basic] Detect Git submodule version in CMake
Summary:
When searching for Git version control information, libBasic's CMake
checks for the path '.git/logs/HEAD'. However, when LLVM is included as
a Git submodule, this path does not exist. Instead, it contains a '.git'
file with the following:

```
gitdir: ../../.git/modules/external/llvm
```

Where '../..' is the relative path to the root repository that contains
the LLVM Git submodule.

Because of this discrepancy, `clang --version` does not output source
control information if built from a Git submodule.

To fix, check whether '.git' is a directory or a file. If it's a
directory, simply use the '.git/logs/HEAD' path. If it's a file, read it
and check for the tell-tale sign of a Git submodule: the text "gitdir:".
If it exists, follow that path and use the 'logs/HEAD' at that location
instead. This allows not only the correct revision information to be
retrieved, but also uses a file that will change with each source
control revision.

Test Plan:
1. Before applying this change, build Clang as a Git submodule in a repository
   that places it in external/clang, and confirm no revision information
   is output when `clang --version` is invoked (just "clang 5.0.0" is
   output, no Git hashes).
2. Apply these changes and build Clang as a Git repository nested under
   llvm/tools/clang, and confirm that `clang --version` displays correct
   version information.
3. Apply these changes and build Clang as a Git submodule using the
   structure described in (1), and confirm version control information
   is output as in (2).

Reviewers: jordan_rose, beanz, probinson

Reviewed By: jordan_rose

Subscribers: chapuni, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D34955

llvm-svn: 308205
2017-07-17 19:22:57 +00:00
Ulrich Weigand 76976a7920 [SystemZ] Add support for IBM z14 processor (2/3)
This patch extends the -fzvector language feature to enable the new
"vector float" data type when compiling at -march=z14.  This matches
the updated extension definition implemented by other compilers for
the platform, which is indicated to applications by pre-defining
__VEC__ to 10302 (instead of 10301).

llvm-svn: 308198
2017-07-17 17:46:47 +00:00
Ulrich Weigand cac24ab04c [SystemZ] Add support for IBM z14 processor (1/3)
This patch series adds support for the IBM z14 processor.  This part includes:
- Basic support for the new processor and its features.
- Support for low-level builtins mapped to new LLVM intrinsics.

Support for the -fzvector extension to vector float and the new
high-level vector intrinsics is provided by separate patches.

llvm-svn: 308197
2017-07-17 17:45:57 +00:00
Brad Smith 733fe193d3 Enable TLS support on OpenBSD, but default to the emulatated TLS model.
llvm-svn: 308155
2017-07-17 00:49:31 +00:00
Yuka Takahashi 64918d0b25 [Bash-autocompletion] Add support for -W<warning> and -Wno<warning>
Summary:
`-W[tab]` will autocomplete warnings defined in this link:
https://clang.llvm.org/docs/DiagnosticsReference.html#wweak-vtables

Differential Revision: https://reviews.llvm.org/D35447

llvm-svn: 308139
2017-07-16 15:07:20 +00:00
Craig Topper 3544b3e501 [X86] Add 'movbe' to btver2 CPU.
This probably doesn't change anything because the frotend doesn't do anything with this feature and the backend will infer from the cpu string. So this is just for consistency with other cpus that support movbe.

llvm-svn: 308002
2017-07-14 06:36:17 +00:00
Amara Emerson ebe02904d4 [AArch64] Add support for handling the +sve target feature.
This also adds the appropriate predefine for SVE if enabled.

Differential Revision: https://reviews.llvm.org/D35118

llvm-svn: 307919
2017-07-13 15:36:01 +00:00
Simon Atanasyan 3606ebf6d6 [mips] Create the correct profiling symbol on Linux MIPS
llvm-svn: 307627
2017-07-11 06:19:01 +00:00
Yaxun Liu cbf647cc3a CodeGen: Fix address space of global variable
Certain targets (e.g. amdgcn) require global variable to stay in global or constant address
space. In C or C++ global variables are emitted in the default (generic) address space.
This patch introduces virtual functions TargetCodeGenInfo::getGlobalVarAddressSpace
and TargetInfo::getConstantAddressSpace to handle this in a general approach.

It only affects IR generated for amdgcn target.

Differential Revision: https://reviews.llvm.org/D33842

llvm-svn: 307470
2017-07-08 13:24:52 +00:00
Craig Topper 61395176f9 [X86] Replace 'fallthrough' comments with LLVM_FALLTHROUGH.
llvm-svn: 307420
2017-07-07 18:41:09 +00:00
Sjoerd Meijer 98ee78578b This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it shows
problems in testing, see comments in D34161 for some more details.
A fix is in progres in D35011, but a revert seems better now as the fix will
probably take some more time to land.

llvm-svn: 307277
2017-07-06 16:37:31 +00:00
Ulrich Weigand 6d6c4808ef [SystemZ] Simplify handling of ISA revisions
This moves determination of the ISA revision from the CPU name to
one single place, removing a bunch of duplicated code.  It also
makes the supported ISA revisions available as feature strings.

No functional change.

llvm-svn: 307156
2017-07-05 13:19:47 +00:00
Yaxun Liu 25d1b4341f [AMDGPU] Fix size and alignment of size_t and pointer types
Differential Revision: https://reviews.llvm.org/D34995

llvm-svn: 307121
2017-07-05 04:58:24 +00:00
Yaxun Liu 3ba4a720ad [AMDGPU] Fix regressions on mesa/clover with libclc due to address space
Currently AMDGPUTargetInfo does not initialize AddrSpaceMap in constructor, which causes regressions in mesa/clover with libclc.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D34987

llvm-svn: 307105
2017-07-04 19:57:18 +00:00
Hiroshi Inoue 3170de0eb8 fix trivial typos; NFC
llvm-svn: 306954
2017-07-01 08:46:43 +00:00
Yuka Takahashi dc771509a4 Changed Opts.EABIVersion type string to llvm::EABI enum class
Summary:
Changed EABIVersion type from string to llvm::EABI.
It seems it was just a typo and this is intended implementation.

Differential Revision: https://reviews.llvm.org/D34595

llvm-svn: 306953
2017-07-01 07:57:23 +00:00
Craig Topper 9dd7e808b3 [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs.
Diffential Revision: https://reviews.llvm.org/D34842

llvm-svn: 306851
2017-06-30 18:14:04 +00:00
Craig Topper 541075ded5 [X86] Add a break to the last case of a few switches to prevent accidents in the future. NFC
llvm-svn: 306850
2017-06-30 18:14:02 +00:00
Craig Topper f458bd2135 [X86] Move all atom CPUs to the same section of the switch and use fallthroughs like we do for other CPU generations. NFC
This is prep work to add MOVBE to all Atom CPUs. This instruction didn't come in to the Nehalem/Westmere/SandyBridge/etc. line until later so there's no natural place to overlap the Atom CPUs into that part of the switch.

llvm-svn: 306849
2017-06-30 18:14:01 +00:00
Sjoerd Meijer cb75f61c1d ARMV8-A archkind and target defines helper functions
This introduces helper functions that set target defines for different ARMV8-A
architecture kinds. It fixes an issue that the v8.1 define ARM_FEATURE_QRDMX
was not set for v8.2. These helper functions make things more “scalable” if we
want to add ARMv8.3 at some point, and a cleanup has been done to hold the
architecture kind in one variable (instead of one for each).

Differential Revision: https://reviews.llvm.org/D34686

llvm-svn: 306805
2017-06-30 08:07:34 +00:00
Michael Zuckerman a046ef4c26 [Clang][X86][Goldmont]Adding new target-cpu: Goldmont
[Clang-side] Connecting the GoldMont processor to his feature.


Reviewers:
1. igorb
2. delena
3. zvi


Differential Revision: https://reviews.llvm.org/D34807

llvm-svn: 306673
2017-06-29 13:41:04 +00:00
Gabor Horvath 7848b388ee Factor out a functionality from isBeforeInTranslationUnit
The first user of this API will be the cross translation unit
functionality of the Static Analyzer which will be committed in a
follow-up patch. 

Differential Revision: https://reviews.llvm.org/D34506

llvm-svn: 306648
2017-06-29 06:53:13 +00:00
Mandeep Singh Grang 2fd6b1651d [COFF, ARM64] Add support for Windows ARM64 COFF format
Summary: This is the clang part of the initial implementation to support Windows ARM64 COFF format.

Reviewers: ruiu, t.p.northover, rnk, compnerd

Reviewed By: ruiu, compnerd

Subscribers: aemerson, kristof.beyls, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D34706

llvm-svn: 306489
2017-06-27 23:56:34 +00:00
Christof Douma fb4a0450db Revert "Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc""
This reverts commit r305688 meaning it reintroduces r305684. To repeat:

[NFC] Refactor DiagnosticRenderer to use FullSourceLoc

Move the DiagnosticRenderer and its dependents to using FullSourceLocs
instead of a SourceLocation and SourceManager pointer. The changeset is
rather large but entirely mechanical.

This is step one to allow DiagnosticRenderer to take either
llvm::SMLocs or clang::SourceLocations.

This breaks clang-tidy and clng-query which will be fixed in a commit
soon after.

Patch by Sanne Wouda

Differential Revision: https://reviews.llvm.org/D31709

llvm-svn: 306384
2017-06-27 09:50:38 +00:00
Nikolai Bozhenov 35d3c35bea Reapply "Frontend support for Nios2 target"
Summary:
- Implements TargetInfo class for Nios2 target.
- Enables handling of -march and -mcpu options for Nios2 target.
- Definition of Nios2 builtin functions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D33356

Author: belickim <mateusz.belicki@intel.com>
llvm-svn: 306383
2017-06-27 09:48:24 +00:00
Richard Smith b4fd6a6141 Remove some redundant setup when preprocessing .pcm files.
Both of these steps are immediately overwritten by the FrontendAction setup.

llvm-svn: 306325
2017-06-26 20:15:21 +00:00
Marina Yatsina 33eb775265 [inline asm][gcc-compatiblity] "=i" output constraint support
Ignore ‘i’,’n’,’E’,’F’ as output constraints in inline assembly (gcc compatibility)

Differential Revision: https://reviews.llvm.org/D31383

llvm-svn: 306297
2017-06-26 15:55:51 +00:00
Ed Schouten 4dabea22d3 Add support for Ananas platform
Ananas is a home-brew operating system, mainly for amd64 machines. After
using GCC for quite some time, it has switched to clang and never looked
back - yet, having to manually patch things is annoying, so it'd be much
nicer if this was in the official tree.

More information:

https://github.com/zhmu/ananas/
https://rink.nu/projects/ananas.html

Submitted by:	Rink Springer
Differential Revision:	https://reviews.llvm.org/D32936

llvm-svn: 306239
2017-06-25 08:29:09 +00:00
Vadzim Dambrouski 00b396c0a0 [MSP430] Fix data layout string.
Summary:
Change data layout string so it would be compatible with MSP430 EABI.

Depends on D34561

Reviewers: asl, awygle

Reviewed By: asl

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D34562

llvm-svn: 306161
2017-06-23 21:12:56 +00:00
Abderrazek Zaafrani f10ca93f34 [AArch64] ADD ARMv.2-A FP16 vector intrinsics
Differential Revision: https://reviews.llvm.org/D34161

llvm-svn: 305820
2017-06-20 18:54:57 +00:00
Richard Smith 9565c75b29 Support non-identifier module names when preprocessing modules.
llvm-svn: 305758
2017-06-19 23:09:36 +00:00
Christof Douma cc1c112806 Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc"
This reverts commit 305684.
This patch breaks extra/tools/clang-tidy

llvm-svn: 305688
2017-06-19 12:41:22 +00:00
Christof Douma f9d86db755 [NFC] Refactor DiagnosticRenderer to use FullSourceLoc
Move the DiagnosticRenderer and its dependents to using FullSourceLocs
instead of a SourceLocation and SourceManager pointer. The changeset is
rather large but entirely mechanical.

This is step one to allow DiagnosticRenderer to take either
llvm::SMLocs or clang::SourceLocations.

Patch by Sanne Wouda

Review: https://reviews.llvm.org/D31709

Change-Id: If351a112cdf6718e2d3ef6721b8da9c6376b32dd
llvm-svn: 305684
2017-06-19 12:05:58 +00:00
Daniel Jasper d078254049 Revert "Define _GNU_SOURCE for rtems c++"
This reverts commit r305399.

This breaks a build in libcxx:
libcxx/src/system_error.cpp:90:16: error: assigning to 'int' from incompatible type 'char *'
    if ((ret = ::strerror_r(ev, buffer, strerror_buff_size)) != 0) {
               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Which makes sense according to:
https://linux.die.net/man/3/strerror_r

Not entirely sure how this needs to be fixed.

llvm-svn: 305456
2017-06-15 09:17:12 +00:00
James Y Knight 02b0e9d97a Define _GNU_SOURCE for rtems c++
This is required by the libc++ locale support.

Patch by Walter Lee.

Differential Revision: https://reviews.llvm.org/D34105

llvm-svn: 305399
2017-06-14 17:01:18 +00:00
Nikolai Bozhenov de57795cc8 Revert of r305066 "Reapply Frontend support for Nios2 target"
llvm-svn: 305068
2017-06-09 12:09:29 +00:00
Nikolai Bozhenov b2de17c734 Reapply "Frontend support for Nios2 target"
Summary:
- Implements TargetInfo class for Nios2 target.
- Enables handling of -march and -mcpu options for Nios2 target.
- Definition of Nios2 builtin functions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D33356

Author: belickim <mateusz.belicki@intel.com>
llvm-svn: 305066
2017-06-09 10:56:18 +00:00
Nikolai Bozhenov 1c36934883 Revert "Frontend support for Nios2 target"
As it breaks many buildbots.

llvm-svn: 305002
2017-06-08 18:36:35 +00:00
Nikolai Bozhenov 32dc6c8540 Frontend support for Nios2 target.
Summary:
- Implements TargetInfo class for Nios2 target.
- Enables handling of -march and -mcpu options for Nios2 target.
- Definition of Nios2 builtin functions.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D33356

Author: belickim <mateusz.belicki@intel.com>
llvm-svn: 304994
2017-06-08 17:40:30 +00:00
Petar Jovanovic 9b5d3b6a9f Reapply r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
The test in r304929 broke multiple buildbots as it expected mips target to
be registered and available (which is not necessarily true). Updating the
test with this condition.

Original commit:

  [mips] Add runtime options to enable/disable madd.fmt and msub.fmt

  Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
  generation of madd.fmt and similar instructions respectively, as per GCC.

  Patch by Stefan Maksimovic.

llvm-svn: 304953
2017-06-07 23:51:52 +00:00
Petar Jovanovic 53900b0221 Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
Revert r304929 since the test broke buildbots.

Original commit:

  [mips] Add runtime options to enable/disable madd.fmt and msub.fmt

  Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
  generation of madd.fmt and similar instructions respectively, as per GCC.

  Patch by Stefan Maksimovic.

llvm-svn: 304935
2017-06-07 18:57:56 +00:00
Petar Jovanovic c6d9b04cc3 [mips] Add runtime options to enable/disable madd.fmt and msub.fmt
Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
generation of madd.fmt and similar instructions respectively, as per GCC.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D33401

llvm-svn: 304929
2017-06-07 17:17:57 +00:00
Florian Hahn cc524bf6ac [CodeGen] Add thumb-mode to target-features for arm/thumb triples.
Summary:
The thumb-mode target feature is used to force Thumb or ARM code
generation on a per-function basis. Explicitly adding +thumb-mode to
functions for thumbxx triples enables mixed ARM/Thumb code generation in
places where compilation units with thumbxx and armxx triples are merged
together (e.g. the IR linker or LTO).

For armxx triples, -thumb-mode is added in a similar fashion.

Reviewers: echristo, t.p.northover, kristof.beyls, rengolin

Reviewed By: echristo

Subscribers: rinon, aemerson, mehdi_amini, javed.absar, cfe-commits

Differential Revision: https://reviews.llvm.org/D33448

llvm-svn: 304897
2017-06-07 11:50:45 +00:00
Javed Absar 15b80a5b23 [ARM] Fix Neon vector type alignment to 64-bit
This is restricted version of patch - https://reviews.llvm.org/D33205
that I reverted as it was leading to ABI breaks on darwin etc.
This patch restricts the fix to AAPCS (Android remains 128-bit).
Reviewed by: Renato Golin, Stephen Hines
Differential Revision: https://reviews.llvm.org/D33786

llvm-svn: 304889
2017-06-07 10:02:02 +00:00
Dan Gohman 7dee171f69 [WebAssembly] Set MaxAtomicInlineWidth to 64.
The WebAssembly threads proposal has changed such that C++
implementations can now declare that atomics up to 64 bits are
"lock free" in C++'s terms.

llvm-svn: 304859
2017-06-07 02:22:40 +00:00
Florian Hahn 28f03bbcbb [ARM] Add support for target("arm") and target("thumb").
Summary:
This patch adds support for the target("arm") and target("thumb")
attributes, which can be used to force the compiler to generated ARM or
Thumb code for a function.

In LLVM, ARM or Thumb code generation can be controlled by the
thumb-mode target feature. But GCC already uses target("arm") and
target("thumb"), so we have to substitute "arm" with -thumb-mode and
"thumb" with +thumb-mode.


Reviewers: echristo, pcc, kristof.beyls

Reviewed By: echristo

Subscribers: ahatanak, aemerson, javed.absar, kristof.beyls, cfe-commits

Differential Revision: https://reviews.llvm.org/D33721

llvm-svn: 304781
2017-06-06 09:26:15 +00:00
Richard Smith f878a84cc4 Fix memory leak exposed by r304726.
When giving a ContentCache a null buffer, ignore the DoNotFree flag rather than
inheriting it onto whatever buffer we end up using for the file. Also ensure
that the main buffer is properly destroyed.

llvm-svn: 304740
2017-06-05 22:05:31 +00:00
Richard Smith ab75597dda Rather than rejecting attempts to run preprocessor-only actions on AST files,
replay the steps taken to create the AST file with the preprocessor-only action
installed to produce preprocessed output.

This can be used to produce the preprocessed text for an existing .pch or .pcm
file.

llvm-svn: 304726
2017-06-05 18:10:11 +00:00
Galina Kistanova ddcd2812f5 Added missing break.
llvm-svn: 304653
2017-06-03 06:40:10 +00:00
Galina Kistanova 96088f4d41 Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.
llvm-svn: 304652
2017-06-03 06:38:22 +00:00
Richard Smith 040e12662a Support lazy stat'ing of files referenced by module maps.
This patch adds support for a `header` declaration in a module map to specify
certain `stat` information (currently, size and mtime) about that header file.
This has two purposes:

- It removes the need to eagerly `stat` every file referenced by a module map.
  Instead, we track a list of unresolved header files with each size / mtime
  (actually, for simplicity, we track submodules with such headers), and when
  attempting to look up a header file based on a `FileEntry`, we check if there
  are any unresolved header directives with that `FileEntry`'s size / mtime and
  perform deferred `stat`s if so.

- It permits a preprocessed module to be compiled without the original files
  being present on disk. The only reason we used to need those files was to get
  the `stat` information in order to do header -> module lookups when using the
  module. If we're provided with the `stat` information in the preprocessed
  module, we can avoid requiring the files to exist.

Unlike most `header` directives, if a `header` directive with `stat`
information has no corresponding on-disk file the enclosing module is *not*
marked unavailable (so that behavior is consistent regardless of whether we've
resolved a header directive, and so that preprocessed modules don't get marked
unavailable). We could actually do this for all `header` directives: the only
reason we mark the module unavailable if headers are missing is to give a
diagnostic slightly earlier (rather than waiting until we actually try to build
the module / load and validate its .pcm file).

Differential Revision: https://reviews.llvm.org/D33703

llvm-svn: 304515
2017-06-02 01:55:39 +00:00
Vedant Kumar a44a6ac81f Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"
This reverts commit r304493. It breaks all the Darwin bots:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168

Failure:
Failing Tests (2):
    Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c
    Clang :: CodeGen/arm_neon_intrinsics.c

llvm-svn: 304509
2017-06-02 01:22:14 +00:00
Abderrazek Zaafrani a44e5f601d [AArch64] Add ARMv8.2-A FP16 vefctor intrinsics
llvm-svn: 304493
2017-06-01 23:22:29 +00:00
Vedant Kumar 85a83c2ced [Modules] Handle sanitizer feature mismatches when importing modules
This patch makes it an error to have a mismatch between the enabled
sanitizers in a CU, and in any module being imported into the CU. Only
mismatches between non-modular sanitizers are treated as errors.

This patch also includes non-modular sanitizers in module hashes, in
order to ensure module rebuilds occur when -fsanitize=X is toggled on
and off for non-modular sanitizers, and to cut down on module rebuilds
when the option is toggled for modular sanitizers.

This fixes a longstanding issue with implicit modules and sanitizers,
which Duncan originally diagnosed.

When building with implicit modules it's possible to hit a scenario
where modules are built without -fsanitize=address, and are subsequently
imported into CUs with -fsanitize=address enabled. This causes strange
failures at runtime. The case Duncan found affects libcxx, since its
vector implementation behaves differently when ASan is enabled.

Implicit module builds should "just work" when -fsanitize=X is toggled
on and off across multiple compiler invocations, which is what this
patch does.

Differential Revision: https://reviews.llvm.org/D32724

llvm-svn: 304463
2017-06-01 20:01:01 +00:00
Pekka Jaaskelainen fc2629a65a [OpenCL] Makes kernels use the SPIR_KERNEL CC by default.
Rationale: OpenCL kernels are called via an explicit runtime API
with arguments set with clSetKernelArg(), not as normal sub-functions.
Return SPIR_KERNEL by default as the kernel calling convention to ensure
the fingerprint is fixed such way that each OpenCL argument gets one
matching argument in the produced kernel function argument list to enable
feasible implementation of clSetKernelArg() with aggregates etc. In case
we would use the default C calling conv here, clSetKernelArg() might
break depending on the target-specific conventions; different targets
might split structs passed as values to multiple function arguments etc.

https://reviews.llvm.org/D33639

llvm-svn: 304389
2017-06-01 07:18:49 +00:00
Javed Absar 089f678784 Reverting Neon vector type 64-alignment fix
The patch caused ABI breaks on darwin/others.
Reverting to come back with a more restrictive patch.

llvm-svn: 304220
2017-05-30 17:09:47 +00:00
Javed Absar 3d92d7ab36 [ARM] Fix Neon vector type alignment to 64-bit
The maximum alignment for ARM NEON data types should be 64-bits as specified
in ARM procedure call standard document Sec. A.2 Notes.
This patch fixes it from its current larger natural default values, except
for Android (so as not to break existing ABI).
Reviewed by: Stephen Hines, Renato Golin.
Differential Revision: https://reviews.llvm.org/D33205

llvm-svn: 304201
2017-05-30 10:12:15 +00:00
Eric Fiselier e38cea026b [coroutines] Support "coroutines" feature in module map requires clause
Summary: In order for libc++ to add `<experimental/coroutine>` to its module map, there has to be a feature that can be used to detect if coroutines support is enabled in Clang. 

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33538

llvm-svn: 304107
2017-05-28 21:07:22 +00:00
Eric Fiselier 9208dd63ef Revert "[coroutines] Support "coroutines" feature in module map requires clause"
This reverts commit r304054.

llvm-svn: 304057
2017-05-27 03:04:51 +00:00
Eric Fiselier 0bb3bcd0ef [coroutines] Support "coroutines" feature in module map requires clause
Summary: In order for libc++ to add `<experimental/coroutine>` to its module map, there has to be a feature that can be used to detect if coroutines support is enabled in Clang. 

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33538

llvm-svn: 304054
2017-05-27 02:46:17 +00:00
Reid Kleckner a40b38a637 Only define __SIZEOF_FLOAT128__ on x86 as intended in r304012
GCC only defines it on x86.

llvm-svn: 304013
2017-05-26 17:48:01 +00:00
Reid Kleckner 9eabbb6066 Enable __float128 for mingw for GCC compatibility and define __SIZEOF_FLOAT128__ on x86
GCC defines __FLOAT128__ on Power and __SIZEOF_FLOAT128__ on x86. We're
just following the inconsistency for now so users have some way to test.

Effectively merges this patch as requested by Martell Malone:
https://github.com/Alexpux/MINGW-packages/blob/master/mingw-w64-clang/0107-enable-__float128-for-X86-MinGW.patch

llvm-svn: 304012
2017-05-26 17:38:15 +00:00
Oren Ben Simhon 140c1fb9ec [X86] Adding avx512_vpopcntdq feature set and its intrinsics
AVX512_VPOPCNTDQ is a new feature set that was published by Intel.
The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq).
It also includes the addition of the new feature set.

Differential Revision: https://reviews.llvm.org/D33170

llvm-svn: 303857
2017-05-25 13:44:11 +00:00
Saleem Abdulrasool b6e946b164 Basic: fix whitespace in file header (NFC)
llvm-svn: 303804
2017-05-24 20:27:09 +00:00
Dean Michael Berris 170429e290 [XRay][clang] Allow imbuing arg1 logging attribute via -fxray-always-instrument=
Summary:
This change allows us to add arg1 logging support to functions through
the special case list provided through -fxray-always-instrument=. This
is useful for adding arg1 logging to functions that are either in
headers that users don't have control over (i.e. cannot change the
source) or would rather not do.

It only takes effect when the pattern is matched through the "fun:"
special case, as a category. As in:

  fun:*pattern=arg1

Reviewers: pelikan, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33392

llvm-svn: 303719
2017-05-24 05:46:36 +00:00
Galina Kistanova 3677c0f1d8 Removed fallthrough annotation which does not directly precede switch label.
llvm-svn: 303653
2017-05-23 16:56:10 +00:00
Galina Kistanova 078b301bcc Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.
llvm-svn: 303649
2017-05-23 16:33:07 +00:00
Yaxun Liu af3d4db64b [AMDGPU] Do not require opencl triple environment for OpenCL
A recent change requires opencl triple environment for compiling OpenCL
program, which causes regressions in libclc.

This patch fixes that. Instead of deducing language based on triple
environment, it checks LangOptions.

Differential Revision: https://reviews.llvm.org/D33445

llvm-svn: 303644
2017-05-23 16:15:53 +00:00
Reid Kleckner eb00ee07be Give files from #line the characteristics of the current file
This allows #line directives to appear in system headers that have code
that clang would normally warn on. This is compatible with GCC, which is
easy to test by running `gcc -E`.

Fixes PR30752

llvm-svn: 303582
2017-05-22 21:42:58 +00:00
Yaxun Liu 6d96f16347 CodeGen: Cast alloca to expected address space
Alloca always returns a pointer in alloca address space, which may
be different from the type defined by the language. For example,
in C++ the auto variables are in the default address space. Therefore
cast alloca to the expected address space when necessary.

Differential Revision: https://reviews.llvm.org/D32248

llvm-svn: 303370
2017-05-18 18:51:09 +00:00
James Y Knight eb96e44aea [SPARC] Support 'f' and 'e' inline asm constraints.
Patch by Patrick Boettcher.

Differential Revision: https://reviews.llvm.org/D29117

llvm-svn: 302913
2017-05-12 16:01:23 +00:00
Simon Pilgrim 3511348dbb [X86][LWP] Add clang support for LWP instructions.
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Differential Revision: https://reviews.llvm.org/D32770

llvm-svn: 302418
2017-05-08 12:09:45 +00:00
Weiming Zhao be380c711c [ARM] Limit the diagnose when an ISR calls a regular function
Summary:
When the function is compiled with soft-float or on CPU with no FPU, we
don't need to diagnose for a call from an ISR to a regular function.

Reviewers: jroelofs, eli.friedman

Reviewed By: jroelofs

Subscribers: aemerson, rengolin, javed.absar, cfe-commits

Differential Revision: https://reviews.llvm.org/D32918

llvm-svn: 302274
2017-05-05 19:25:29 +00:00
Alex Lorenz ce4518f21d DiagnosticsEngine should clear DelayedDiagID before reporting the
delayed diagnostic

This fix avoids an infinite recursion that was uncovered in one of our internal
tests by r301992. The testcase is the most reduced version of that
auto-generated test.

This is an improved version of the reverted commit r302037. The previous fix
actually managed to expose another subtle bug whereby `fatal_too_many_errors`
error was reported twice, with the second report setting the
`FatalErrorOccurred` flag. That prevented the notes that followed the diagnostic
the caused `fatal_too_many_errors` to be emitted. This commit ensures that notes
that follow `fatal_too_many_errors` but that belong to the diagnostic that
caused `fatal_too_many_errors` won't be emitted by setting the
`FatalErrorOccurred` when emitting `fatal_too_many_errors`.

rdar://31962618

llvm-svn: 302151
2017-05-04 13:56:51 +00:00
Alex Lorenz 5191e80b87 Revert r302037
The commit caused the following two buildbot failures:

    Clang :: Misc/error-limit-multiple-notes.cpp
    Clang :: Misc/error-limit.c

llvm-svn: 302046
2017-05-03 16:22:16 +00:00
Alex Lorenz d7dfec818b DiagnosticsEngine should clear DelayedDiagID before reporting the
delayed diagnostic

This avoids an infinite loop that was uncovered in one of our internal tests
by r301992. The testcase is the most reduced version of that auto-generated
test.

rdar://31962618

llvm-svn: 302037
2017-05-03 15:41:16 +00:00
Richard Smith e37391c4fe [modules] Round-trip -Werror flag through explicit module build.
The intent for an explicit module build is that the diagnostics produced within
the module are those that were configured when the module was built, not those
that are enabled within a user of the module. This includes diagnostics that
don't actually show up until the module is used (for instance, diagnostics
produced during template instantiation and weird cases like -Wpadded).

We serialized and restored the diagnostic state for individual warning groups,
but previously did not track the state for flags like -Werror and -Weverything,
which are implemented as separate bits rather than as part of the diagnostics
mapping information.

llvm-svn: 301992
2017-05-03 00:28:49 +00:00
Duncan P. N. Exon Smith 16b1ac950b Darwin: Define __STDC_NO_THREADS__ on Darwin targets
Darwin doesn't support C11 threads.h.  Define `__STDC_NO_THREADS__` so
that users can check for it.

rdar://problem/18461003

llvm-svn: 301508
2017-04-27 01:47:22 +00:00
Carlo Bertolli ffafe10fac [OpenMP] Prepare sema to support combined constructs with omp distribute and omp for
https://reviews.llvm.org/D32237

This patch prepares sema with additional fields to support all those composite and combined constructs of OpenMP that include pragma 'distribute' and 'for', such as 'distribute parallel for'. It also extends the regression tests for 'distribute parallel for' and adds a new one.

llvm-svn: 300802
2017-04-20 00:39:39 +00:00
Alex Lorenz 9e7bf161ea Add #pragma clang attribute
This is a recommit of r300539 that was reverted in r300543 due to test failures.
The original commit message is displayed below:

The new '#pragma clang attribute' directive can be used to apply attributes to
multiple declarations. An attribute must satisfy the following conditions to
be supported by the pragma:
- It must have a subject list that's defined in the TableGen file.
- It must be documented.
- It must not be late parsed.
- It must have a GNU/C++11 spelling.

Differential Revision: https://reviews.llvm.org/D30009

llvm-svn: 300556
2017-04-18 14:33:39 +00:00
Oliver Stannard 233310f3e6 [ARM,AArch64] Define __ELF__ for arm-none-eabihf and AArch64
This macro is defined for arm-none-eabi as of r266625, but it should also be
defined for eabihf and aarch64.

llvm-svn: 300549
2017-04-18 13:12:36 +00:00
Alex Lorenz 3bfe962afa Revert r300539 - Add #pragma clang attribute
Some tests fail on the Windows buildbots. I will have to investigate more.
This commit reverts r300539, r300540 and r300542.

llvm-svn: 300543
2017-04-18 10:46:41 +00:00
Alex Lorenz 0a849f47d2 Add #pragma clang attribute
The new '#pragma clang attribute' directive can be used to apply attributes to
multiple declarations. An attribute must satisfy the following conditions to
be supported by the pragma:
- It must have a subject list that's defined in the TableGen file.
- It must be documented.
- It must not be late parsed.
- It must have a GNU/C++11 spelling.

Differential Revision: https://reviews.llvm.org/D30009

llvm-svn: 300539
2017-04-18 09:41:47 +00:00
Eric Christopher d26d8839d8 When we turn on vsx it should also turn on altivec explicitly, same
with disabling it as well as disabling all vsx specific features when
turning off altivec.

Fixes PR32663.

llvm-svn: 300395
2017-04-15 06:15:00 +00:00
Konstantin Zhuravlyov e668b1cd1e [AMDGPU][GFX9] Set +fp32-denormals for >=gfx900 unless -cl-denorms-are-zero is set
Differential Revision: https://reviews.llvm.org/D31482

llvm-svn: 300306
2017-04-14 05:33:57 +00:00
Duncan P. N. Exon Smith 900f817591 Serialization: Simulate -Werror settings in implicit modules
r293123 started serializing diagnostic pragma state for modules.  This
makes the serialization work properly for implicit modules.

An implicit module build (using Clang's internal build system) uses the
same PCM file location for different `-Werror` levels.

E.g., if a TU has `-Werror=format` and tries to load a PCM built without
`-Werror=format`, a new PCM will be built in its place (and the new PCM
should have the same signature, since r297655).  In the other direction,
if a TU does not have `-Werror=format` and tries to load a PCM built
with `-Werror=format`, it should "just work".

The idea is to evolve the PCM toward the strictest -Werror flags that
anyone tries.

r293123 started serializing the diagnostic pragma state for each PCM.
Since this encodes the -Werror settings at module-build time, it breaks
the implicit build model.

This commit filters the diagnostic state in order to simulate the
current compilation's diagnostic settings.  Firstly, it ignores the
module's serialized first diagnostic state, replacing it with the state
from this compilation's command-line.  Secondly, if a pragma warning was
upgraded to error/fatal when generating the PCM (e.g., due to `-Werror`
on the command-line), it checks whether it should still be upgraded in
its current context.

llvm-svn: 300025
2017-04-12 03:58:58 +00:00
David Blaikie e6b7c28d17 Modular Codegen: Add/use a bit in serialized function definitions to track whether they are the subject of modular codegen
Some decls are created not where they are written, but in other module
files/users (implicit special members and function template implicit
specializations). To correctly identify them, use a bit next to the definition
to track the modular codegen property.

Discussed whether the module file bit could be omitted in favor of
reconstituting from the modular codegen decls list - best guess today is that
the efficiency improvement of not having to deserialize the whole list whenever
any function is queried by a module user is worth it for the small size
increase of this redundant (list + bit-on-def) representation.

Reviewers: rsmith

Differential Revision: https://reviews.llvm.org/D29901

llvm-svn: 299982
2017-04-11 20:46:34 +00:00
Yaxun Liu b34ec829be [OpenCL] Map default address space to alloca address space
For OpenCL, the private address space qualifier is 0 in AST. Before this change, 0 address space qualifier
is always mapped to target address space 0. As now target private address space is specified by
alloca address space in data layout, address space qualifier 0 needs to be mapped to alloca addr space specified by the data layout.

This change has no impact on targets whose alloca addr space is 0.

With contributions from Matt Arsenault, Tony Tye and Wen-Heng (Jack) Chung

Differential Revision: https://reviews.llvm.org/D31404

llvm-svn: 299965
2017-04-11 17:24:23 +00:00
Alex Lorenz f127821140 [Parser][ObjC++] Improve diagnostics and recovery when C++ keywords are used
as identifiers in Objective-C++

This commit improves the 'expected identifier' errors that are presented when a
C++ keyword is used as an identifier in Objective-C++ by mentioning that this is
a C++ keyword in the diagnostic message. It also improves the error recovery:
the parser will now treat the C++ keywords as identifiers to prevent unrelated
parsing errors.

rdar://20626062

Differential Revision: https://reviews.llvm.org/D26503

llvm-svn: 299950
2017-04-11 15:01:53 +00:00
Yaxun Liu b122ed9181 [AMDGPU] Temporarily change constant address space from 4 to 2 for the new address space mapping
Change constant address space from 4 to 2 for the new address space mapping in Clang.

Differential Revision: https://reviews.llvm.org/D31771

llvm-svn: 299691
2017-04-06 19:18:36 +00:00
Chih-Hung Hsieh a0b99e45e9 [Basic] getColumnNumber returns location of CR+LF on Windows
When fixing a Clang-Tidy bug in D31406,
reuse of FileID enabled the missing highlightRange function.
Assertion in highlightRange failed because the end-of-range column
number was 2 + the last column of a line on Windows.
This fix is required to enable D31406.

Differential Revision: https://reviews.llvm.org/D31713

llvm-svn: 299681
2017-04-06 18:36:50 +00:00
Dean Michael Berris 835832d37a [XRay] Add -fxray-{always,never}-instrument= flags to clang
Summary:
The -fxray-always-instrument= and -fxray-never-instrument= flags take
filenames that are used to imbue the XRay instrumentation attributes
using a whitelist mechanism (similar to the sanitizer special cases
list). We use the same syntax and semantics as the sanitizer blacklists
files in the implementation.

As implemented, we respect the attributes that are already defined in
the source file (i.e. those that have the
[[clang::xray_{always,never}_instrument]] attributes) before applying
the always/never instrument lists.

Reviewers: rsmith, chandlerc

Subscribers: jfb, mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D30388

llvm-svn: 299041
2017-03-30 00:29:36 +00:00
Eric Christopher fc6ffede65 Default enable the rtm feature only on skylake and later for now because Intel disabled the feature on some haswell and broadwell processors:
http://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/core-m-processor-family-spec-update.pdf

the -mrtm option will still work normally.

llvm-svn: 298956
2017-03-28 23:03:19 +00:00
Erik Verbruggen dfffaf579f FileManager: mark virtual file entries as valid entries
The getVirtualFile method would create entries for e.g. libclang's
CXUnsavedFile but not mark them as valid. The effect is that a lookup
through getFile where the file name is not exactly matching the virtual
file (e.g. through mixing slashes and backslashes on Windows) would
result in a normal file "lookup", and re-using the file entry found
by using the UniqueID, and overwrite the file entry fields. Because the
lookup involves opening the file, and moving it into the file entry, the
file is now open. The SourceManager keys its buffers on the UniqueID
(which is still the same), so it will find an already loaded buffer.
Because only the loading a buffer from disk will close the file, the
FileEntry will hold on to an open file for as long as the FileManager
is around. As the FileManager will only get destroyed at a reparse,
you can't safe to the "leaked" and locked file on Windows.

llvm-svn: 298905
2017-03-28 09:18:05 +00:00
Eric Christopher 1e6fedbb83 _CALL_LINUX is only defined on 64-bit ppc linux platforms, not 32-bit.
Adjust and add a test for the 32-bit side.

llvm-svn: 298778
2017-03-25 19:26:04 +00:00
Yaxun Liu 354097b05d [AMDGPU] Make AMDGPUTargetInfo::AS private
llvm-svn: 298773
2017-03-25 11:34:41 +00:00
Eric Christopher 19d8c1fed2 Update the comment on not yet generated preprocessor defines to remove __LONGDOUBLE128.
llvm-svn: 298771
2017-03-25 06:38:57 +00:00
Eric Christopher ee21410bdc Add the __LONGDOUBLE128 define for ppc targets that have 128 bit long doubles.
llvm-svn: 298770
2017-03-25 06:37:23 +00:00
Eric Christopher 0d36116394 Define __HAVE_BSWAP__ on ppc to match gcc since we support both builtins as well.
llvm-svn: 298769
2017-03-25 05:40:13 +00:00
Yaxun Liu 3464f92e23 [AMDGPU] Switch address space mapping by triple environment amdgiz
For target environment amdgiz and amdgizcl (giz means Generic Is Zero), AMDGPU will use new address space mapping where generic address space is 0 and private address space is 5. The data layout is also changed correspondingly.

Differential Revision: https://reviews.llvm.org/D31210

llvm-svn: 298767
2017-03-25 03:46:25 +00:00
Eric Christopher 2fd2eda0ac Add the _CALL_LINUX preprocessor define for ppc linux platforms.
This typically is only for a new enough linker (bfd >= 2.16.2 or gold), but
our ppc suppport post-dates this and it should work on all linux platforms. It
is guaranteed to work on all elfv2 platforms.

llvm-svn: 298765
2017-03-25 03:33:59 +00:00
Eric Christopher 153dad4ca9 __BIGGEST_ALIGNMENT__ has always been 16 on all power platforms rather
than the default of 8 in clang, fix and update tests accordingly.

llvm-svn: 298761
2017-03-25 02:55:21 +00:00
Eric Christopher b70819e6a2 Add preprocessor defines for a bare powerpc64le triple/cpu.
The le triple didn't exist until power8, so use that as a default (this
also matches what gcc does).

llvm-svn: 298759
2017-03-25 02:29:18 +00:00
Eric Christopher 3646e6289d Move setting of LangOpts based on target flags out of CompilerInstance
and into TargetInfo::adjust so that it gets called in more places
throughout the compiler (AST serialization in particular).

Should fix PPC modules after removing of faltivec.

llvm-svn: 298487
2017-03-22 06:36:09 +00:00
Eric Christopher 758aad76d8 Remove the -faltivec alias option and replace it with -maltivec everywhere.
The alias was only ever used on darwin and had some issues there,
and isn't used in practice much. Also fixes a problem with -mno-altivec
not turning off -maltivec.

Also add a diagnostic for faltivec/fno-altivec that directs users to use
maltivec options and include the altivec.h file explicitly.

llvm-svn: 298449
2017-03-21 22:06:18 +00:00
Benjamin Kramer f6021ecddc Apply clang-tidy's performance-unnecessary-value-param to parts of clang.
No functionality change intended.

llvm-svn: 298443
2017-03-21 21:35:04 +00:00
Eric Christopher 74fa24ff27 Turn on HTM on power8 and later (including powerpc64le) since it's
available by default on those cpus and configurations.

llvm-svn: 298307
2017-03-20 21:12:53 +00:00
Duncan P. N. Exon Smith 030d7d6daa Reapply "Modules: Cache PCMs in memory and avoid a use-after-free"
This reverts commit r298185, effectively reapplying r298165, after fixing the
new unit tests (PR32338).  The memory buffer generator doesn't null-terminate
the MemoryBuffer it creates; this version of the commit informs getMemBuffer
about that to avoid the assert.

Original commit message follows:

----

Clang's internal build system for implicit modules uses lock files to
ensure that after a process writes a PCM it will read the same one back
in (without contention from other -cc1 commands).  Since PCMs are read
from disk repeatedly while invalidating, building, and importing, the
lock is not released quickly.  Furthermore, the LockFileManager is not
robust in every environment.  Other -cc1 commands can stall until
timeout (after about eight minutes).

This commit changes the lock file from being necessary for correctness
to a (possibly dubious) performance hack.  The remaining benefit is to
reduce duplicate work in competing -cc1 commands which depend on the
same module.  Follow-up commits will change the internal build system to
continue after a timeout, and reduce the timeout.  Perhaps we should
reconsider blocking at all.

This also fixes a use-after-free, when one part of a compilation
validates a PCM and starts using it, and another tries to swap out the
PCM for something new.

The PCMCache is a new type called MemoryBufferCache, which saves memory
buffers based on their filename.  Its ownership is shared by the
CompilerInstance and ModuleManager.

- The ModuleManager stores PCMs there that it loads from disk, never
touching the disk if the cache is hot.

- When modules fail to validate, they're removed from the cache.

- When a CompilerInstance is spawned to build a new module, each
already-loaded PCM is assumed to be valid, and is frozen to avoid
the use-after-free.

- Any newly-built module is written directly to the cache to avoid the
round-trip to the filesystem, making lock files unnecessary for
correctness.

Original patch by Manman Ren; most testcases by Adrian Prantl!

llvm-svn: 298278
2017-03-20 17:58:26 +00:00
Renato Golin f1966cf646 Revert "Modules: Cache PCMs in memory and avoid a use-after-free"
This reverts commit r298165, as it broke the ARM builds.

llvm-svn: 298185
2017-03-18 12:31:32 +00:00
Duncan P. N. Exon Smith 079c40e886 Modules: Cache PCMs in memory and avoid a use-after-free
Clang's internal build system for implicit modules uses lock files to
ensure that after a process writes a PCM it will read the same one back
in (without contention from other -cc1 commands).  Since PCMs are read
from disk repeatedly while invalidating, building, and importing, the
lock is not released quickly.  Furthermore, the LockFileManager is not
robust in every environment.  Other -cc1 commands can stall until
timeout (after about eight minutes).

This commit changes the lock file from being necessary for correctness
to a (possibly dubious) performance hack.  The remaining benefit is to
reduce duplicate work in competing -cc1 commands which depend on the
same module.  Follow-up commits will change the internal build system to
continue after a timeout, and reduce the timeout.  Perhaps we should
reconsider blocking at all.

This also fixes a use-after-free, when one part of a compilation
validates a PCM and starts using it, and another tries to swap out the
PCM for something new.

The PCMCache is a new type called MemoryBufferCache, which saves memory
buffers based on their filename.  Its ownership is shared by the
CompilerInstance and ModuleManager.

  - The ModuleManager stores PCMs there that it loads from disk, never
    touching the disk if the cache is hot.

  - When modules fail to validate, they're removed from the cache.

  - When a CompilerInstance is spawned to build a new module, each
    already-loaded PCM is assumed to be valid, and is frozen to avoid
    the use-after-free.

  - Any newly-built module is written directly to the cache to avoid the
    round-trip to the filesystem, making lock files unnecessary for
    correctness.

Original patch by Manman Ren; most testcases by Adrian Prantl!

llvm-svn: 298165
2017-03-17 22:55:13 +00:00
Krzysztof Parzyszek ff7f6675e7 [Hexagon] Recognize hexagonv62 as a valid target CPU
llvm-svn: 297778
2017-03-14 20:29:23 +00:00
Juergen Ributzka f978743907 Reapply [VFS] Ignore broken symlinks in the directory iterator.
Modified the tests to accept any iteration order, to run only on Unix, and added
additional error reporting to investigate SystemZ bot issue.

The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts don't stat entries unless they have to
descend into the next directory, which allows to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds similar behavior to the VFS iterators. There should be no
change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297693
2017-03-14 00:14:40 +00:00
Matt Arsenault bf5e3e4391 AMDGPU: Make 0 the private nullptr value
We can't actually pretend that 0 is valid for address space 0.
r295877 added a workaround to stop allocating user objects
there, so we can use 0 as the invalid pointer.

Some of the tests seemed to be using private as the non-0 null
test address space, so add copies using local to make sure
this is still stressed.

llvm-svn: 297659
2017-03-13 19:47:53 +00:00
Duncan P. N. Exon Smith 60fa28882e Modules: Use hash of PCM content for SIGNATURE
Change ASTFileSignature from a random 32-bit number to the hash of the
PCM content.

  - Move definition ASTFileSignature to Basic/Module.h so Module and
    ASTSourceDescriptor can use it.

  - Change the signature from uint64_t to std::array<uint32_t,5>.

  - Stop using (saving/reading) the size and modification time of PCM
    files when there is a valid SIGNATURE.

  - Add UNHASHED_CONTROL_BLOCK, and use it to store the SIGNATURE record
    and other records that shouldn't affect the hash.  Because implicit
    modules reuses the same file for multiple levels of -Werror, this
    includes DIAGNOSTIC_OPTIONS and DIAG_PRAGMA_MAPPINGS.

This helps to solve a PCH + implicit Modules dependency issue: PCH files
are handled by the external build system, whereas implicit modules are
handled by internal compiler build system.  This prevents invalidating a
PCH when the compiler overwrites a PCM file with the same content
(modulo the diagnostic differences).

Design and original patch by Manman Ren!

llvm-svn: 297655
2017-03-13 18:45:08 +00:00
Juergen Ributzka 31d01baa9f Revert "Reapply [VFS] Ignore broken symlinks in the directory iterator."
Still broken on Windows and SystemZ bot ... sorry for the noise.

llvm-svn: 297533
2017-03-11 00:14:50 +00:00
Juergen Ributzka 46541f1b0b Reapply [VFS] Ignore broken symlinks in the directory iterator.
Modified the tests to accept any iteration order.

The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts allow to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds the same functionality to the VFS iterators. There should be
no change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297528
2017-03-10 22:49:04 +00:00
Juergen Ributzka bc1c5b1d04 Revert r297510 "[VFS] Ignore broken symlinks in the directory iterator."
The tests are failing on one of the bots.

llvm-svn: 297517
2017-03-10 21:46:51 +00:00
Juergen Ributzka 4a25956838 [VFS] Remove the Path variable from RealFSDirIter. NFC.
This variable is set, but never used.

llvm-svn: 297511
2017-03-10 21:23:29 +00:00
Juergen Ributzka fd958fca0b [VFS] Ignore broken symlinks in the directory iterator.
The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts allow to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds the same functionality to the VFS iterators. There should be
no change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297510
2017-03-10 21:23:27 +00:00
Yaxun Liu 4d86799219 [AMDGPU] Add builtin functions readlane ds_permute mov_dpp
Differential Revision: https://reviews.llvm.org/D30551

llvm-svn: 297436
2017-03-10 01:30:46 +00:00
Konstantin Zhuravlyov d1ba16e762 [DebugInfo] Add address space when creating DIDerivedTypes
Differential Revision: https://reviews.llvm.org/D29671

llvm-svn: 297321
2017-03-08 23:56:48 +00:00
Brad Smith 8e55bd5bbd Set the Int64Type / IntMaxType types correctly for OpenBSD/mips64
llvm-svn: 297098
2017-03-06 23:48:31 +00:00
Alex Lorenz 0e23c61c87 [Sema][ObjC] Warn about 'performSelector' calls with selectors
that return record or vector types

The performSelector family of methods from Foundation use objc_msgSend to
dispatch the selector invocations to objects. However, method calls to methods
that return record types might have to use the objc_msgSend_stret as the return
value won't find into the register. This is also supported by this sentence from
performSelector documentation: "The method should not have a significant return
value and should take a single argument of type id, or no arguments". This
commit adds a new warning that warns when a selector which corresponds to a
method that returns a record type is passed into performSelector.

rdar://12056271

Differential Revision: https://reviews.llvm.org/D30174

llvm-svn: 297019
2017-03-06 15:58:34 +00:00
Eric Christopher fb834a8278 Migrate all of aarch64-linux-gnu to \01_mcount instead of just when passing along gnueabi as this matches both gcc and what the kernel expects.
More of PR27311

llvm-svn: 296490
2017-02-28 17:22:05 +00:00
Brad Smith 3d648b357a Set ABIs correctly for OpenBSD/arm; soft float and aapcs-linux.
llvm-svn: 296430
2017-02-28 03:20:26 +00:00
Matt Arsenault a0c6dca15b AMDGPU: Add fmed3 half builtin
llvm-svn: 295874
2017-02-22 20:55:59 +00:00
Brad Smith 9aa2bf209b Hook up OpenBSD AArch64 support
llvm-svn: 295786
2017-02-21 23:13:09 +00:00
Simon Dardis df827a7165 [mips] Define macros related to -mabicalls in the preprocessor
Summary:
Historically, NetBSD, FreeBSD and OpenBSD have defined the macro ABICALLS in
the preprocessor when -mabicalls is in effect.

Mainline GCC later defined __mips_abicalls when -mabicalls is in effect.

This patch teaches the preprocessor to define these macros when appropriate.

NetBSD does not require the ABICALLS macro.

This resolves PR/31694.

Thanks to Sean Bruno for highlighting this issue!

Reviewers: slthakur, seanbruno

Reviewed By: seanbruno

Subscribers: joerg, brad, emaste, seanbruno, cfe-commits

Differential Revision: https://reviews.llvm.org/D29032

llvm-svn: 295728
2017-02-21 16:01:00 +00:00
Brad Smith 0561a5a7fe Enable support for __float128 in Clang on OpenBSD/X86
/usr/local/include/c++/4.9.4/type_traits:279:39: error: __float128 is not
supported on this target

llvm-svn: 295635
2017-02-20 03:18:15 +00:00
Matt Arsenault eb952fd93b AMDGPU: Add gfx900 and gfx901 processors
llvm-svn: 295556
2017-02-18 19:02:41 +00:00
Carlo Bertolli 8429d81202 [OpenMP] Prepare Sema for initial implementation for pragma 'distribute parallel for'
https://reviews.llvm.org/D29922

This patch adds two fields for use in the implementation of 'distribute parallel for':

The increment expression for the distribute loop. As the chunk assigned to a team is executed by multiple threads within the 'parallel for' region, the increment expression has to correspond to the value returned by the related runtime call (for_static_init).
The upper bound of the innermost loop ('for' in 'distribute parallel for') is not the globalUB expression normally used for pragma 'for' when found in isolation. It is instead the upper bound of the chunk assigned to the team ('distribute' loop). In this way, we prevent teams from executing chunks assigned to other teams.
The use of these two fields can be see in a related explanatory patch:
https://reviews.llvm.org/D29508

llvm-svn: 295497
2017-02-17 21:29:13 +00:00
Eric Christopher 32ac5e41ef Add a definition for __STRUCT_PARM_ALIGN__ for elfv2 and 64-bit darwin platforms to match what other compilers produce.
llvm-svn: 295156
2017-02-15 07:50:11 +00:00
Dylan McKay 315edb0216 [AVR] Fix __AVR_xxx macro definitions; authored by Peter Wu
Summary:
The -mmcu option for GCC sets macros like __AVR_ATmega328P__ (with the trailing
underscores), be sure to include these underscores for Clangs -mcpu option.

See "AVR Built-in Macros" in https://gcc.gnu.org/onlinedocs/gcc/AVR-Options.html

Reviewers: jroelofs, dylanmckay

Reviewed By: jroelofs, dylanmckay

Subscribers: efriedma, cfe-commits

Differential Revision: https://reviews.llvm.org/D29817

llvm-svn: 294869
2017-02-11 21:06:07 +00:00
Eric Christopher f6ee1f3d69 Temporarily revert "For X86-64 linux and PPC64 linux align int128 to 16 bytes."
until we can get better TargetMachine::isCompatibleDataLayout to compare - otherwise
we can't code generate existing bitcode without a string equality data layout.

This reverts commit r294703.

llvm-svn: 294708
2017-02-10 04:35:21 +00:00
Eric Christopher 4855ba8f24 For X86-64 linux and PPC64 linux align int128 to 16 bytes.
For other platforms we should find out what they need and likely
make the same change, however, a smaller additional change is easier
for platforms we know have it specified in the ABI.

clang support for r294702

llvm-svn: 294703
2017-02-10 03:32:34 +00:00
George Burgess IV fc9705679e Add support for armv7ve flag in clang (PR31358).
This is a followup change to add v7ve support to clang for gcc
compatibility. Please see r294661.

Patch by Manoj Gupta.

Differential Revision: https://reviews.llvm.org/D29773

llvm-svn: 294662
2017-02-09 23:30:10 +00:00
Craig Topper 4574226c3f [X86] Clzero flag addition and inclusion under znver1
1. Adds the command line flag for clzero.
2. Includes the clzero flag under znver1.
3. Defines the macro for clzero.
4. Adds a new file which has the intrinsic definition for clzero instruction.

Patch by Ganesh Gopalasubramanian with some additional tests from me.

Differential revision: https://reviews.llvm.org/D29386

llvm-svn: 294559
2017-02-09 06:10:14 +00:00
Craig Topper d2bf7b03e5 [X86] Add -mprefetchwt1/-mno-prefetchwt1 command line options and __PREFETCHWT1__ define to match gcc.
llvm-svn: 294424
2017-02-08 08:23:40 +00:00
Craig Topper 204ecffdb4 [X86] Add -msgx/-mno-sgx command line options and __SGX__ define to match gcc.
llvm-svn: 294423
2017-02-08 08:23:17 +00:00
Craig Topper b16cb82c93 [X86] Add -mmpx/-mno-mpx command line options and __MPX__ define to match gcc.
llvm-svn: 294419
2017-02-08 07:56:42 +00:00
Craig Topper 8c708cf6bc [X86] Add -mclwb/-mno-clwb command line arguments and __CLWB__ define to match gcc.
In the future, we should also add a clwb intrinsic to the backend, a frontend builtin, and an instrinsic header file.

llvm-svn: 294416
2017-02-08 07:36:58 +00:00
Craig Topper 32c959dab3 [X86] Remove 'umip' feature flag.
This feature flag indicates that the processor has support for removing certain instructions from user mode software. But the feature flag by itself doesn't indicate if the support is enabled in the OS. The affected instructions aren't even instructions the compiler would emit. So I don't think think this feature flag should be in the compiler.

llvm-svn: 294414
2017-02-08 07:13:22 +00:00
Craig Topper 78b4787593 [X86] Add -mclflushopt/-mno-clflushopt command line support and __CLFLUSHOPT__ define to match gcc.
llvm-svn: 294411
2017-02-08 06:48:58 +00:00
Craig Topper 7d494ef610 Use LLVM_FALLTHROUGH instead of FALLTHROUGH comments.
llvm-svn: 294404
2017-02-08 05:44:30 +00:00
Craig Topper c31d9e4a01 [X86] Remove PCOMMIT feature support since Intel has deprecated this instruction with no plans to release products with it.
Intel's documentation for the deprecation https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction

llvm-svn: 294403
2017-02-08 05:44:28 +00:00
Saleem Abdulrasool 5602709b98 Revert "Basic: match GCC behaviour for SuS macro"
This reverts commit SVN r294148.  Seems that it was mistaken, and GCC
does still define `__unix` and `unix` when in GNU mode.

llvm-svn: 294332
2017-02-07 19:00:06 +00:00
Dylan McKay ecb6e7b83c Revert "Revert "[AVR] Allow specifying the CPU on the command line""
This reverts commit 7ac30e0f839fdab6d723ce2ef6a5b7a4cf03d150.

llvm-svn: 294282
2017-02-07 06:04:18 +00:00
Ulrich Weigand 82a86cb155 [SystemZ] Provide predefined __ARCH__ and __VX__ macros
GCC 7 will predefine two new macros on s390x:

- __ARCH__ indicates the ISA architecture level
- __VX__ indicates that the vector facility is available

This adds those macros to clang as well to ensure continued
compatibility with GCC.

llvm-svn: 294197
2017-02-06 17:04:22 +00:00
Diana Picus 37a2d6d699 Revert "[AVR] Allow specifying the CPU on the command line"
This reverts commit r294177. It seems to have broken some buildbots.

llvm-svn: 294180
2017-02-06 11:35:42 +00:00
Dylan McKay 8464c9b579 [AVR] Allow specifying the CPU on the command line
Summary:
This tells clang about all of the different AVR microcontrollers.

It also adds code to define the correct preprocessor macros for each
device.

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, cfe-commits

Differential Revision: https://reviews.llvm.org/D28346

llvm-svn: 294177
2017-02-06 09:07:56 +00:00
Dylan McKay d31534cd3a [AVR] Add support for the full set of inline asm constraints
Summary:
Previously the method would simply return false, causing every single
inline assembly constraint to trigger a compile error.

This adds inline assembly constraint support for the AVR target.

This patch is derived from the code in
AVRISelLowering::getConstraintType.

More details can be found on the AVR-GCC reference wiki
http://www.nongnu.org/avr-libc/user-manual/inline_asm.html

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, ahatanak, saaadhu, cfe-commits

Differential Revision: https://reviews.llvm.org/D28344

llvm-svn: 294176
2017-02-06 09:01:59 +00:00
Saleem Abdulrasool c5cddc9fa8 Basic: match GCC behaviour for SuS macro
GCC does not generate `__unix` nor `unix` macros.  The latter already
intrudes into the user's namespace and should be avoided.  Use the
canonical spelling of `__unix__` across all the targets.

llvm-svn: 294148
2017-02-05 22:18:15 +00:00
David Blaikie 9ffe5a3525 Prototype of modules codegen
First pass at generating weak definitions of inline functions from module files
(& skipping (-O0) or emitting available_externally (optimizations)
definitions where those modules are used).

External functions defined in modules are emitted into the modular
object file as well (this may turn an existing ODR violation (if that
module were imported into multiple translations) into valid/linkable
code).

Internal symbols (static functions, for example) are not correctly
supported yet. The symbol will be produced, internal, in the modular
object - unreferenceable from the users.

Reviewers: rsmith

Differential Revision: https://reviews.llvm.org/D28845

llvm-svn: 293456
2017-01-30 05:00:26 +00:00
Richard Smith d230de27f8 Remove and replace DiagStatePoint tracking and lookup data structure.
Rather than storing a single flat list of SourceLocations where the diagnostic
state changes (in source order), we now store a separate list for each FileID
in which there is a diagnostic state transition. (State for other files is
built and cached lazily, on demand.) This has two consequences:

1) We can now sensibly support modules, and properly track the diagnostic state
for modular headers (this matters when, for instance, triggering instantiation
of a template defined within a module triggers diagnostics).

2) It's much faster than the old approach, since we can now just do a binary
search on the offsets within the FileID rather than needing to call
isBeforeInTranslationUnit to determine source order (which is surprisingly
slow). For some pathological (but real world) files, this reduces total
compilation time by more than 10%.

For now, the diagnostic state points for modules are loaded eagerly. It seems
feasible to defer this until diagnostic state information for one of the
module's files is needed, but that's not part of this patch.

llvm-svn: 293123
2017-01-26 01:01:01 +00:00
Arpith Chacko Jacob 99a1e0eba5 [OpenMP] Codegen support for 'target teams' on the host.
This patch adds support for codegen of 'target teams' on the host.
This combined directive has two captured statements, one for the
'teams' region, and the other for the 'parallel'.

This target teams region is offloaded using the __tgt_target_teams()
call. The patch sets the number of teams as an argument to
this call.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D29084

llvm-svn: 293005
2017-01-25 02:18:43 +00:00
Arpith Chacko Jacob 86f9e46365 Reverting commit because an NVPTX patch sneaked in. Break up into two
patches.

llvm-svn: 293003
2017-01-25 01:45:59 +00:00
Arpith Chacko Jacob 4dbf368e14 [OpenMP] Codegen support for 'target teams' on the host.
This patch adds support for codegen of 'target teams' on the host.
This combined directive has two captured statements, one for the
'teams' region, and the other for the 'parallel'.

This target teams region is offloaded using the __tgt_target_teams()
call. The patch sets the number of teams as an argument to
this call.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D29084

llvm-svn: 293001
2017-01-25 01:38:33 +00:00
Pavel Labath dcbd614c6c Replace use of chdir with llvm::sys::fs::set_current_path
NFCI

llvm-svn: 292914
2017-01-24 11:14:29 +00:00
Matt Arsenault 09cca093a3 AMDGPU: Update for changed subtarget feature name
llvm-svn: 292838
2017-01-23 22:31:14 +00:00
Petr Hosek 8c69cffe15 [Basic] Remove the 32-bit x86 and ARM targets for Fuchsia
The 32-bit architectures are no longer supported by Fuchsia.

Differential Revision: https://reviews.llvm.org/D28974

llvm-svn: 292671
2017-01-20 22:53:38 +00:00
Arpith Chacko Jacob 19b911cb75 [OpenMP] Codegen support for 'target parallel' on the host.
This patch adds support for codegen of 'target parallel' on the host.
It is also the first combined directive that requires two or more
captured statements.  Support for this functionality is included in
the patch.

A combined directive such as 'target parallel' has two captured
statements, one for the 'target' and the other for the 'parallel'
region.  Two captured statements are required because each has
different implicit parameters (see SemaOpenMP.cpp).  For example,
the 'parallel' has 'global_tid' and 'bound_tid' while the 'target'
does not.  The patch adds support for handling multiple captured
statements based on the combined directive.

When codegen'ing the 'target parallel' directive, the 'target'
outlined function is created using the outer captured statement
and the 'parallel' outlined function is created using the inner
captured statement.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D28753

llvm-svn: 292419
2017-01-18 18:18:53 +00:00
Benjamin Kramer bc9ef590cb [Basic] Remove source manager references from diag state points.
This is just wasted space, we don't support state points from multiple
source managers. Validate that there's no state when resetting the
source manager and use the 'global' reference to the sourcemanager
instead of the ones in the diag state.

llvm-svn: 292402
2017-01-18 15:50:26 +00:00
Arpith Chacko Jacob 42793e000a Revert r292374 to debug Windows buildbot failure.
llvm-svn: 292400
2017-01-18 15:36:05 +00:00
Arpith Chacko Jacob 68019578a3 [OpenMP] Codegen support for 'target parallel' on the host.
This patch adds support for codegen of 'target parallel' on the host.
It is also the first combined directive that requires two or more
captured statements.  Support for this functionality is included in
the patch.

A combined directive such as 'target parallel' has two captured
statements, one for the 'target' and the other for the 'parallel'
region.  Two captured statements are required because each has
different implicit parameters (see SemaOpenMP.cpp).  For example,
the 'parallel' has 'global_tid' and 'bound_tid' while the 'target'
does not.  The patch adds support for handling multiple captured
statements based on the combined directive.

When codegen'ing the 'target parallel' directive, the 'target'
outlined function is created using the outer captured statement
and the 'parallel' outlined function is created using the inner
captured statement.

Reviewers: ABataev
Differential Revision: https://reviews.llvm.org/D28753

llvm-svn: 292374
2017-01-18 15:14:52 +00:00
Dan Gohman 839f215e19 [WebAssembly] Add minimal support for the new wasm object format triple.
llvm-svn: 292269
2017-01-17 21:46:38 +00:00
Joerg Sonnenberger 8450266425 Ensure that clang -pthread creates the right macro. -D_POSIX_THREADS
seems to have been a C&P error from old GCC specs for OpenBSD.

llvm-svn: 292119
2017-01-16 14:07:24 +00:00
Kelvin Li da68118729 [OpenMP] Sema and parsing for 'target teams distribute simd’ pragma
This patch is to implement sema and parsing for 'target teams distribute simd’ pragma.
    
Differential Revision: https://reviews.llvm.org/D28252

llvm-svn: 291579
2017-01-10 18:08:18 +00:00
Craig Topper c45744ad93 AMD family 17h (znver1) enablement
Summary:
This patch enables the following
1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu).
2. ISAs that are enabled for "znver1" architecture.
3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used.
4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17.
5. For the time being, it uses the btver2 scheduler model.
6. Test file is updated to check this flag.

This is linked to llvm review item https://reviews.llvm.org/D28017

Patch by Ganesh Gopalasubramanian. Additional test cases added by Craig Topper.

Reviewers: RKSimon, craig.topper

Subscribers: cfe-commits, RKSimon, ashutosh.nema, llvm-commits

Differential Revision: https://reviews.llvm.org/D28018

llvm-svn: 291544
2017-01-10 06:02:12 +00:00
Justin Lebar 86c4e63ff9 [CUDA] Let NVPTX inherit the host's calling conventions.
Summary:
When compiling device code, we may still see host code with explicit
calling conventions.  NVPTX needs to claim that it supports these CCs,
so that (a) we don't raise noisy warnings, and (b) we don't break
existing code which relies on the existence of these CCs when
specializing templates.  (If a CC doesn't exist, clang ignores it, so
two template specializations which are different only insofar as one
specifies a CC are considered identical and therefore are an error if
that CC is not supported.)

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28323

llvm-svn: 291136
2017-01-05 16:53:38 +00:00
Justin Lebar b662659355 [CUDA] More correctly inherit primitive types from the host during device compilation.
Summary:
CUDA lets users share structs between the host and device, so for that
and other reasons, primitive types such as ptrdiff_t should be the same
on both sides of the compilation.

Our code to do this wasn't entirely successful.  In particular, we did a
bunch of work during the NVPTXTargetInfo constructor, only to override
it in the NVPTX{32,64}TargetInfo constructors.  It worked well enough on
Linux and Mac, but Windows is LLP64, which is different enough to break
it.

This patch removes the NVPTX{32,64}TargetInfo classes entirely and fixes
the bug described above.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D28322

llvm-svn: 291135
2017-01-05 16:53:21 +00:00
Dylan McKay 95aa265a6e [AVR] Revert the functional part of r291083
As Senthil points out, this is unnecessary as we already have these
registers in AddlRegNames.

llvm-svn: 291090
2017-01-05 07:17:46 +00:00
Dylan McKay f0f33a8b1a [AVR] Support r26 through r31 in inline assembly
These are synonyms for the X,Y, and Z registers.

llvm-svn: 291083
2017-01-05 05:31:12 +00:00
Dylan McKay 924fa3abdc Add AVR target and toolchain to Clang
Summary:
Authored by Senthil Kumar Selvaraj

This patch adds barebones support in Clang for the (experimental) AVR target. It uses the integrated assembler for assembly, and the GNU linker for linking, as lld doesn't know about the target yet.

The DataLayout string is the same as the one in AVRTargetMachine.cpp. The alignment specs look wrong to me, as it's an 8 bit target and all types only need 8 bit alignment. Clang failed with a datalayout mismatch error when I tried to change it, so I left it that way for now.

Reviewers: rsmith, dylanmckay, cfe-commits, rengolin

Subscribers: rengolin, jroelofs, wdng

Differential Revision: https://reviews.llvm.org/D27123

llvm-svn: 291082
2017-01-05 05:20:27 +00:00
Kelvin Li 1851df563d [OpenMP] Sema and parsing for 'target teams distribute parallel for simd’ pragma
This patch is to implement sema and parsing for 'target teams distribute parallel for simd’ pragma.

Differential Revision: https://reviews.llvm.org/D28202

llvm-svn: 290862
2017-01-03 05:23:48 +00:00
Kelvin Li 80e8f56284 [OpenMP] Sema and parsing for 'target teams distribute parallel for’ pragma
This patch is to implement sema and parsing for 'target teams distribute parallel for’ pragma.

Differential Revision: https://reviews.llvm.org/D28160

llvm-svn: 290725
2016-12-29 22:16:30 +00:00
Marina Yatsina c42fd03bf8 [inline-asm]No error for conflict between inputs\outputs and clobber list
According to extended asm syntax, a case where the clobber list includes a variable from the inputs or outputs should be an error - conflict.
for example:

const long double a = 0.0;
int main()
{

char b;
double t1 = a;
__asm__ ("fucompp": "=a" (b) : "u" (t1), "t" (t1) : "cc", "st", "st(1)");

return 0;
}

This should conflict with the output - t1 which is st, and st which is st aswell.
The patch fixes it.

Commit on behald of Ziv Izhar.

Differential Revision: https://reviews.llvm.org/D15075

llvm-svn: 290539
2016-12-26 12:23:42 +00:00
Kelvin Li 83c451e998 [OpenMP] Sema and parsing for 'target teams distribute' pragma
This patch is to implement sema and parsing for 'target teams distribute' pragma.

Differential Revision: https://reviews.llvm.org/D28015

llvm-svn: 290508
2016-12-25 04:52:54 +00:00
Chandler Carruth 8df65e4a2a Add an assert to catch improperly constructed %diff sequences in
diagnostics and fix one such diagnostic.

Sadly, this assert doesn't catch this bug because we have no tests that
emit this diagnostic! Doh! I'm following up on the commit that
introduces it to get that fixed. Then this assert will help in a more
direct way.

llvm-svn: 290417
2016-12-23 05:19:47 +00:00
Bruno Cardoso Lopes 82ec4fde42 [CrashReproducer] Add support for merging -ivfsoverlay
Merge all VFS mapped files inside -ivfsoverlay inputs into the vfs
overlay provided by the crash reproducer. This is the last missing piece
to allow crash reproducers to fully work with user frameworks; when
combined with headermaps, it allows clang to find additional frameworks.

rdar://problem/27913709

llvm-svn: 290326
2016-12-22 07:06:03 +00:00
Tim Northover c67803fb14 ARM: define a macro for the FPv5 FPU in ARM mode.
FPv5 is in Cortex-M7 and the 64-bit CPUs when running in 32-bit mode. The name
is from the Cortex-M7 TRM.

llvm-svn: 290268
2016-12-21 20:49:43 +00:00
Yaxun Liu 5b74665a41 Recommit r289979 [OpenCL] Allow disabling types and declarations associated with extensions
Fixed undefined behavior due to cast integer to bool in initializer list.

llvm-svn: 290056
2016-12-18 05:18:55 +00:00
Kelvin Li bf594a5600 [OpenMP] Sema and parsing for 'target teams' pragma
This patch is to implement sema and parsing for 'target teams' pragma.

Differential Revision: https://reviews.llvm.org/D27818

llvm-svn: 290038
2016-12-17 05:48:59 +00:00
Yaxun Liu 35f6d66b0d Revert r289979 due to regressions
llvm-svn: 289991
2016-12-16 21:23:55 +00:00
Yaxun Liu 2e8331cab6 [OpenCL] Allow disabling types and declarations associated with extensions
Added a map to associate types and declarations with extensions.

Refactored existing diagnostic for disabled types associated with extensions and extended it to declarations for generic situation.

Fixed some bugs for types associated with extensions.

Allow users to use pragma to declare types and functions for supported extensions, e.g.

#pragma OPENCL EXTENSION the_new_extension_name : begin
// declare types and functions associated with the extension here
#pragma OPENCL EXTENSION the_new_extension_name : end

Differential Revision: https://reviews.llvm.org/D21698

llvm-svn: 289979
2016-12-16 19:22:08 +00:00
Yaxun Liu 402804b6d6 Re-commit r289252 and r289285, and fix PR31374
llvm-svn: 289787
2016-12-15 08:09:08 +00:00
Nico Weber 7849eeb035 Revert 289252 (and follow-up 289285), it caused PR31374
llvm-svn: 289713
2016-12-14 21:38:18 +00:00
Stephan Bergmann 17c7f70362 Replace APFloatBase static fltSemantics data members with getter functions
At least the plugin used by the LibreOffice build
(<https://wiki.documentfoundation.org/Development/Clang_plugins>) indirectly
uses those members (through inline functions in LLVM/Clang include files in turn
using them), but they are not exported by utils/extract_symbols.py on Windows,
and accessing data across DLL/EXE boundaries on Windows is generally
problematic.

Differential Revision: https://reviews.llvm.org/D26671

llvm-svn: 289647
2016-12-14 11:57:17 +00:00
Yaxun Liu 8f66b4b44a Add support for non-zero null pointer for C and OpenCL
In amdgcn target, null pointers in global, constant, and generic address space take value 0 but null pointers in private and local address space take value -1. Currently LLVM assumes all null pointers take value 0, which results in incorrectly translated IR. To workaround this issue, instead of emit null pointers in local and private address space, a null pointer in generic address space is emitted and casted to local and private address space.

Tentative definition of global variables with non-zero initializer will have weak linkage instead of common linkage since common linkage requires zero initializer and does not have explicit section to hold the non-zero value.

Virtual member functions getNullPointer and performAddrSpaceCast are added to TargetCodeGenInfo which by default returns ConstantPointerNull and emitting addrspacecast instruction. A virtual member function getNullPointerValue is added to TargetInfo which by default returns 0. Each target can override these virtual functions to get target specific null pointer and the null pointer value for specific address space, and perform specific translations for addrspacecast.

Wrapper functions getNullPointer is added to CodegenModule and getTargetNullPointerValue is added to ASTContext to facilitate getting the target specific null pointers and their values.

This change has no effect on other targets except amdgcn target. Other targets can provide support of non-zero null pointer in a similar way.

This change only provides support for non-zero null pointer for C and OpenCL. Supporting for other languages will be added later incrementally.

Differential Revision: https://reviews.llvm.org/D26196

llvm-svn: 289252
2016-12-09 19:01:11 +00:00
Kelvin Li 7ade93f5e2 [OpenMP] Sema and parsing for 'teams distribute parallel for' pragma
This patch is to implement sema and parsing for 'teams distribute parallel for' pragma.
    
Differential Revision: https://reviews.llvm.org/D27345

llvm-svn: 289179
2016-12-09 03:24:30 +00:00
Dan Gohman c819d0169d [WebAssembly] Revert r288447.
Revert r288447 which introduced -mdirect. It turns out we don't need a
custom flag for this, as the information we need is in the target triple.

llvm-svn: 288604
2016-12-03 23:03:52 +00:00
Dan Gohman d0eed81dc0 [WebAssembly] Add an -mdirect flag for the direct wasm object feature.
Add a target flag for enabling the new direct wasm object emission
feature.

llvm-svn: 288447
2016-12-02 01:12:40 +00:00
Kelvin Li 579e41ced2 [OpenMP] Sema and parsing for 'teams distribute parallel for simd' pragma
This patch is to implement sema and parsing for 'teams distribute parallel for simd' pragma.

Differential Revision: https://reviews.llvm.org/D27084

llvm-svn: 288294
2016-11-30 23:51:03 +00:00
Pekka Jaaskelainen 6735448751 Add a little endian variant of TCE.
llvm-svn: 287112
2016-11-16 15:22:31 +00:00
Stephen Hines a89d8ff0ad Define __ANDROID_API__ when specified as part of an Android target.
Summary:
This macro should be defined only when the user directly specifies an
API level as part of an Android target. For any regular Android target,
we leave this macro undefined.

Bug: https://llvm.org/bugs/show_bug.cgi?id=30940

Reviewers: eugenis, pirama

Subscribers: tberghammer, cfe-commits, pirama, eugenis, danalbert

Differential Revision: https://reviews.llvm.org/D26491

llvm-svn: 286543
2016-11-11 01:29:39 +00:00
Douglas Katzman 13f4a91a1f [Sparc] LLONG is not lock-free atomic on v8
Differential Revision: https://reviews.llvm.org/D26286

llvm-svn: 286376
2016-11-09 15:43:51 +00:00
Pavel Labath ac71c8e298 [VFS] Replace TimeValue usage with std::chrono
Summary: NFCI

Reviewers: benlangmuir, zturner

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25948

llvm-svn: 286356
2016-11-09 10:52:22 +00:00
Craig Topper 6c7ecc5341 [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction set is also enabled.
Summary: This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912.

Reviewers: delena, zvi

Subscribers: RKSimon, cfe-commits

Differential Revision: https://reviews.llvm.org/D26306

llvm-svn: 286340
2016-11-09 04:51:03 +00:00
Stephen Hines 032a4be29f Revert "Define __ANDROID_API__ for all Android builds."
Summary: This reverts commit a8804ddd9fe71304b28e5b834d134fe93e568ee0.

Subscribers: cfe-commits, pirama, eugenis, tberghammer, danalbert

Differential Revision: https://reviews.llvm.org/D26422

llvm-svn: 286298
2016-11-08 21:54:49 +00:00
Stephen Hines 270dab2794 Define __ANDROID_API__ for all Android builds.
Summary:
Bug: https://llvm.org/bugs/show_bug.cgi?id=30940

This macro (along with __ANDROID__) should always be defined for Android
targets. We set it to the major (only) version of the Android API being
compiled for. The Android version is able to be set as an integer suffix
for any valid Android target.

Reviewers: danalbert, eugenis

Subscribers: cfe-commits, pirama, eugenis, tberghammer, danalbert

Differential Revision: https://reviews.llvm.org/D26385

llvm-svn: 286295
2016-11-08 21:23:26 +00:00
Chandler Carruth 59666777fb Add some more asserts to clearly indicate that there are special cases
which guarantee pointers are not null. These all seem to have useful
properties and correlations to document, in one case we even had it in
a comment but now it will also be an assert.

This should prevent PVS-Studio from incorrectly claiming that there are
a bunch of potential bugs here. But I feel really strongly that the
PVS-Studio warnings that pointed at this code have a far too high
false-positive rate to be entirely useful. These are just places where
there did seem to be a useful invariant to document and verify with an
assert. Several other places in the code were already correct and
already have perfectly clear code documenting and validating their
invariants, but still ran afoul of PVS-Studio.

llvm-svn: 285985
2016-11-04 06:32:57 +00:00
Erich Keane 757d317c24 regcall: Implement regcall Calling Conv in clang
This patch implements the register call calling convention, which ensures
as many values as possible are passed in registers. CodeGen changes
were committed in https://reviews.llvm.org/rL284108.

Differential Revision: https://reviews.llvm.org/D25204

llvm-svn: 285849
2016-11-02 18:29:35 +00:00
Alexey Bader 0ea075328e [OpenCL] Override supported OpenCL extensions with -cl-ext option
Summary:
This patch adds a command line option '-cl-ext' to control a set of
supported OpenCL extensions. Option accepts a comma-separated list
of extensions prefixed with '+' or '-'.

It can be used together with a target triple to override support for some
extensions:

  // spir target supports all extensions, but we want to disable fp64
  clang -cc1 -triple spir-unknown-unknown -cl-ext=-cl_khr_fp64

Special 'all' extension allows to enable or disable all possible
extensions:

  // only fp64 will be supported
  clang -cc1 -triple spir-unknown-unknown -cl-ext=-all,+cl_khr_fp64

Patch by asavonic (Andrew Savonichev).

Reviewers: joey, yaxunl

Subscribers: yaxunl, bader, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D23712

llvm-svn: 285700
2016-11-01 15:50:52 +00:00
Michael Zuckerman 62f516f590 [x86][inline-asm][clang] accept 'v' constraint
Commit on behalf of: Coby Tayree

1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)

This patch applies the needed changes to clang
LLVM patch: https://reviews.llvm.org/D25005

Differential Revision: https://reviews.llvm.org/D25005

llvm-svn: 285688
2016-11-01 13:16:44 +00:00
Michael Zuckerman 849a6a5e5a [x86][inline-asm][AVX512][clang][PART-1] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions.
Commit on behalf of mharoush

Extending inline assembly support, compatible with GCC as folowing:
 "k" constraint hints the compiler to select any of AVX512 k0-k7 registers.
 "Yk" constraint is a subset of "k" excluding k0 which is not allowd to be used as a mask.

Reviewer: 1. rnk

Differential Revision: https://reviews.llvm.org/D25063

llvm-svn: 285604
2016-10-31 17:23:52 +00:00
Ulrich Weigand 30354ebb00 [SystemZ] Add -march=archX aliases
For compatibility with other compilers on the platform, allow specifying
levels of the z/Architecture instead of model names with -march.  In
particular, the following aliases are now supported:

  -march=arch8   equals  -march=z10
  -march=arch9   equals  -march=z196
  -march=arch10  equals  -march=zEC12
  -march=arch11  equals  -march=z13

This parallels the equivalent (and prerequisite) LLVM change in r285577.

llvm-svn: 285578
2016-10-31 14:38:05 +00:00
Michael Zuckerman 15604b996f second attempt at r285565.
llvm-svn: 285573
2016-10-31 14:16:57 +00:00
Michael Zuckerman 7beec2e8bf revert r285563 fail in test CodeGen/avx512-inline-asm-kregisters-basics.c
llvm-svn: 285565
2016-10-31 12:49:36 +00:00
Michael Zuckerman 0d26eea609 [x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
Commit on behalf of mharoush

 After LGTM and check all:
 This patch enables usage of k registers in inline assembly syntax.
 Adding triple

 Reviewer: 1. rnk
           2. delena

 Differential Revision: https://reviews.llvm.org/D25011

llvm-svn: 285563
2016-10-31 12:05:41 +00:00
Michael Zuckerman 56c85d2119 Revert reviosion 285555
llvm-svn: 285556
2016-10-31 10:12:36 +00:00
Michael Zuckerman 4fe34fa2ec [x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
Commit on behalf of mharoush 

After LGTM and check all: 
This patch enables usage of k registers in inline assembly syntax.

Reviewer: 1. rnk
          2. delena 

Differential Revision: https://reviews.llvm.org/D25011

llvm-svn: 285555
2016-10-31 09:37:59 +00:00
Erik Verbruggen e0bde7554c Do not print include_next/pragma once warnings when input is a header.
r276653 suppressed the pragma once warning when generating a PCH file.
This patch extends that to any main file for which clang is told (with
the -x option) that it's a header file. It will also suppress the
warning "#include_next in primary source file".

Differential Revision: http://reviews.llvm.org/D25989

llvm-svn: 285295
2016-10-27 14:17:10 +00:00
Yaxun Liu e59a0bcf54 AMDGPU: Add missing ISA versions gfx7.x.x and 8.x.x.
Patch by Laurent Morichetti.

Differential Revision: https://reviews.llvm.org/D25920

llvm-svn: 285211
2016-10-26 16:40:21 +00:00
Kelvin Li 4e325f77a9 Re-apply patch r279045.
llvm-svn: 285066
2016-10-25 12:50:55 +00:00
Petr Hosek 9834fcd7ce [Basic] Support 32-bit x86 and ARM targets for Fuchsia
Fuchsia has experimental support for 32-bit x86 and ARM targets, add
them to the list of supported targets.

Differential Revision: https://reviews.llvm.org/D25838

llvm-svn: 285038
2016-10-24 22:55:57 +00:00
Bruno Cardoso Lopes ed84df008f [Modules] Add 'no_undeclared_includes' module map attribute
The 'no_undeclared_includes' attribute should be used in a module to
tell that only non-modular headers and headers from used modules are
accepted.

The main motivation behind this is to prevent dep cycles between system
libraries (such as darwin) and libc++.

Patch by Richard Smith!

llvm-svn: 284797
2016-10-21 01:41:56 +00:00
Benjamin Kramer c3f89253ae Retire llvm::alignOf in favor of C++11 alignof.
No functionality change intended.

llvm-svn: 284730
2016-10-20 14:27:22 +00:00
Michal Gorny 0ed2f4e98b [cmake] Use LLVM_CMAKE_PATH for GetSVN script
Use the LLVM_CMAKE_PATH variable to locate the GetSVN.cmake script.
The variable was already available in stand-alone builds, and is also
set by LLVM since r284581.

llvm-svn: 284582
2016-10-19 12:21:39 +00:00
Vedant Kumar ecc3144031 Drop a redundant ".get()" call (NFC)
Pointed out by Malcolm Parsons.

llvm-svn: 284510
2016-10-18 18:19:02 +00:00
Vedant Kumar d2c6a6d134 [Basic] unique_ptr-ify SourceManager::MacroArgsCacheMap (NFC)
Differential Revision: https://reviews.llvm.org/D25711

llvm-svn: 284442
2016-10-18 00:23:27 +00:00
Albert Gutowski 2a0621e58a Implement MS _BitScan intrinsics
Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin.

Reviewers: hans, thakis, rnk, majnemer

Subscribers: RKSimon, cfe-commits, aemerson

Differential Revision: https://reviews.llvm.org/D25264

llvm-svn: 284060
2016-10-12 22:01:05 +00:00
Arnold Schwaighofer 4fc955e669 Declare WinX86_64ABIInfo to satisfy SwiftABI info
This is minimal support that allows swift's test cases on non windows platforms
to pass.

rdar://28738985

llvm-svn: 284032
2016-10-12 18:59:24 +00:00
Albert Gutowski 0fd6e9608e Move x86-64 builtins from SemaChecking.cpp to BuiltinsX86_64.def
Summary: Follow-up to https://reviews.llvm.org/D24598 (separating builtins for x84-64 and i386).

Reviewers: hans, thakis, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25494

llvm-svn: 284026
2016-10-12 17:28:44 +00:00
Mehdi Amini 0df59d8c02 Turn FileManager DirectoryEntry::Name from raw pointer to StringRef (NFC)
llvm-svn: 283856
2016-10-11 07:31:29 +00:00
Mehdi Amini 004b9c7aae Store FileEntry::Filename as a StringRef instead of raw pointer (NFC)
llvm-svn: 283815
2016-10-10 22:52:47 +00:00
Mehdi Amini ce2da5e143 Use StringRef in LangOptions::isNoBuiltinFunc API (NFC)
llvm-svn: 283776
2016-10-10 16:34:07 +00:00
Daniel Jasper 1eb779b5ae Revert "[x86][inline-asm][clang] accept 'v' constraint"
This reverts commit r283716.

Breaks buildbot:
http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/

llvm-svn: 283743
2016-10-10 11:40:28 +00:00
Michael Zuckerman fe2b9b4fbf [x86][inline-asm][clang] accept 'v' constraint
Commit in the name of: Coby Tayree 

1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)

This patch applies the needed changes to clang
 LLVM patch: https://reviews.llvm.org/D25005

Differential Revision: D25004 

llvm-svn: 283716
2016-10-10 05:45:54 +00:00
Javed Absar 00b7444dc1 [ARM]: Add Cortex-R52 target
This patch adds Cortex-R52, the new ARM real-time processor.
Cortex-R52 implements the ARMv8-R architecture.

llvm-svn: 283543
2016-10-07 12:08:41 +00:00
Mehdi Amini a0016ec95f Use StringReg in TargetParser APIs (NFC)
llvm-svn: 283527
2016-10-07 08:37:29 +00:00
Petr Hosek 62e1d23986 [Driver] Add driver support for Fuchsia
Provide toolchain and tool support for Fuchsia operating system.
Fuchsia uses compiler-rt as the runtime library and libc++, libc++abi
and libunwind as the C++ standard library. lld is used as a default
linker.

Differential Revision: https://reviews.llvm.org/D25117

llvm-svn: 283420
2016-10-06 06:08:09 +00:00
Albert Gutowski f3a0bce155 Separate builtins for x84-64 and i386; implement __mulh and __umulh
Summary: We need x86-64-specific builtins if we want to implement some of the MS intrinsics - winnt.h contains definitions of some functions for i386, but not for x86-64 (for example _InterlockedOr64), which means that we cannot treat them as builtins for both i386 and x86-64, because then we have definitions of builtin functions in winnt.h on i386.

Reviewers: thakis, majnemer, hans, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24598

llvm-svn: 283264
2016-10-04 22:29:49 +00:00
Gor Nishanov 4ffb434ca8 [coroutines] Rename driver flag -fcoroutines to -fcoroutines-ts
Summary:
Also makes -fcoroutines_ts to be both a Driver and CC1 flag.

Patch mostly by EricWF.

Reviewers: rnk, cfe-commits, rsmith, EricWF

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D25130

llvm-svn: 283064
2016-10-02 03:31:58 +00:00
Mehdi Amini 99d1b29503 Use StringRef for MemoryBuffer identifier API (NFC)
llvm-svn: 283043
2016-10-01 16:38:28 +00:00
Richard Smith 591390284f P0035R4: add predefined __STDCPP_DEFAULT_NEW_ALIGNMENT__ macro. By default, we
assume that ::operator new provides no more alignment than is necessary for any
primitive type, except when we're on a GNU OS, where glibc's malloc guarantees
to provide 64-bit alignment on 32-bit systems and 128-bit alignment on 64-bit
systems. This can be controlled by the command-line -fnew-alignment flag.

llvm-svn: 282974
2016-09-30 22:41:36 +00:00
Artem Belevich fda9905062 [CUDA] added __nvvm_atom_{sys|cta}_* builtins.
These builtins are available on sm_60+ GPU only.

Differential Revision: https://reviews.llvm.org/D24944

llvm-svn: 282609
2016-09-28 17:47:35 +00:00
Nemanja Ivanovic 10e2b5dcaa [Power9] Builtins for ELF v.2 ABI conformance - front end portion
This patch corresponds to review:
https://reviews.llvm.org/D24397

It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with
a number of altivec.h functions (refer to the code review for a list).

llvm-svn: 282481
2016-09-27 10:45:22 +00:00
Renato Golin 0201a9e94e [OpenBSD] Add type sign information for OpenBSD
Like NetBSD, OpenBSD prefers having a consistent set of typedefs
across the architectures it supports over strictly following the ARM
ABIs.  The diff below makes sure that clang's view of those types
matches OpenBSD's system header files.  It also adds a test that
checks the relevant types on all OpenBSD platforms that clang works
on.  Hopefully we can add mips64 and powerpc to that list in the
future.

Patch by Mark Kettenis <mark.kettenis@xs4all.nl>

llvm-svn: 282184
2016-09-22 19:28:20 +00:00
Albert Gutowski 727ab8a803 Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: alexshap, cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281540
2016-09-14 21:19:43 +00:00
Albert Gutowski 9918cb6573 Reverse commit 281375 (breaks building Chromium)
llvm-svn: 281399
2016-09-13 21:24:51 +00:00
Albert Gutowski ae3fb3113f Add some MS aliases for existing intrinsics
Reviewers: thakis, compnerd, majnemer, rsmith, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D24330

llvm-svn: 281375
2016-09-13 19:26:42 +00:00
Yaxun Liu d3e85b98be AMDGPU: Fix target options fp32/64-denormals
Fix target options for fp32/64-denormals so that

+fp64-denormals is set if fp64 is supported
-fp32-denormals if fp32 denormals is not supported, or -cl-denorms-are-zero is set
+fp32-denormals if fp32 denormals is supported and -cl-denorms-are-zero is not set

If target feature fp32/64-denormals is explicitly set, they will override default options and options deduced from -cl-denorms-are-zero.

Differential Revision: https://reviews.llvm.org/D24512

llvm-svn: 281357
2016-09-13 17:37:09 +00:00
Justin Lebar 5057f17716 [CUDA] Make __GCC_ATOMIC_XXX_LOCK_FREE macros the same on host/device.
Summary:
This fixes a bug where we were unable to compile the following CUDA
file with libstdc++ (didn't try libc++):

  #include <future>
  void foo() { std::shared_future<int> x; }

The problem is that <future> only defines std::shared_future if
__GCC_ATOMIC_INT_LOCK_FREE > 1.  When we compiled this file for device,
the macro was set to 1, and then the class didn't exist at all.

Reviewers: tra

Subscribers: cfe-commits, jhen

Differential Revision: https://reviews.llvm.org/D24407

llvm-svn: 281089
2016-09-09 20:35:43 +00:00
Matt Arsenault f333de3752 OpenCL: Defining __ENDIAN_LITTLE__ and fix target endianness
OpenCL requires __ENDIAN_LITTLE__ be set for little endian targets.
The default for targets was also apparently big endian, so AMDGPU
was incorrectly reported as big endian. Set this from the triple
so targets don't have another place to set the endianness.

llvm-svn: 280787
2016-09-07 07:08:02 +00:00
Ed Schouten c6d1a730a6 Add support for targeting armv6-unknown-cloudabi-eabihf.
I'm in the progress of adding ARMv6 support to CloudABI. On the compiler
side, everything seems to work properly with this tiny change applied.

llvm-svn: 280672
2016-09-05 18:38:34 +00:00
Elad Cohen fb6358d2b5 [Modules] Add 'freestanding' to the 'requires-declaration' feature-list.
This adds support for modules that require (non-)freestanding
environment, such as the compiler builtin mm_malloc submodule.

Differential Revision: https://reviews.llvm.org/D23871

llvm-svn: 280613
2016-09-04 06:00:42 +00:00
Niels Ole Salscheider b28cc458c3 Replace the Radeon GCN GPU family names by more descriptive ones
Differential Revision: https://reviews.llvm.org/D23957

llvm-svn: 280587
2016-09-03 07:13:54 +00:00
Derek Schuff acdc8e6355 [WebAssembly] Change wasm SizeType to match asmjs
Summary:
We want wasm and asmjs to have matching ABIs, and right now asmjs uses
unsigned int for its size_t. This causes exported symbols in libcxx to
not match and can cause weird breakage where libcxx doesn't get linked
as a result.  Long-term we probably want wasm32, wasm64, and asmjs to
all use unsigned long, but that would cause unnecessary ABI churn for
asmjs so defer that until we can make all the ABI changes at once.

Patch by Jacob Gravelle

Differential Revision: https://reviews.llvm.org/D24134

llvm-svn: 280420
2016-09-01 22:38:37 +00:00
Bruno Cardoso Lopes 6736e199c7 [Modules] Add 'gnuinlineasm' to the 'requires-declaration' feature-list.
This adds support for modules that require (no-)gnu-inline-asm
environment, such as the compiler builtin cpuid submodule.

This is the gnu-inline-asm variant of https://reviews.llvm.org/D23871

Differential Revision: https://reviews.llvm.org/D23905

rdar://problem/26931199

llvm-svn: 280159
2016-08-30 21:25:42 +00:00
Niels Ole Salscheider c37d69f1ee Basic/Targets.cpp: Add polaris10 and polaris11 gpus
Differential Revision: https://reviews.llvm.org/D23746

llvm-svn: 280120
2016-08-30 18:00:22 +00:00
Krzysztof Parzyszek 7cd30bd7e6 [Hexagon] Use handleTargetFeaturesGroup to process target-specific features
llvm-svn: 280093
2016-08-30 14:17:10 +00:00