3 Commits

Author	SHA1	Message	Date
Alex Bradbury	fea4ac01c5	[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands ... Standardise on check lines: * CHECK-ASM * CHECK-OBJ * CHECK-ASM-AND-OBJ This allows for the addition of tests involving symbol operands, which will not result in identical instructions in both assembly and disassembled object output. This commit doesn't exploit this reworking to increase test coverage of symbol operands - that will come in a future patch. llvm-svn: 341546	2018-09-06 13:41:04 +00:00
Shiva Chen	53489ada12	[RISCV] Add ELFObjectFileBase::getRISCVFeatures let llvm-objdump could get RISCV target feature ... llvm-objdump could get C feature by ELF::EF_RISCV_RVC e_flag, so then we don't have to add -mattr=+c on the command line. Differential Revision: https://reviews.llvm.org/D42629 llvm-svn: 324058	2018-02-02 06:01:02 +00:00
Ana Pazos	1b57c7a0f4	[RISCV] Fixed setting predicates for compressed instructions. ... Summary: Fixed setting predicates for compressed instructions. Some instructions were being generated with C extension enabled only, without proper checks for the other required extensions like F, D and 32 and 64-bit target checks. Affected instructions: C_FLD, C_FLW, C_LD, C_FSD, C_FSW, C_SD, C_JAL, C_ADDIW, C_SUBW, C_ADDW, C_FLDSP, C_FLWSP, C_LDSP, C_FSDSP, C_FSWSP, C_SDSP Reviewers: asb, shiva0217 Reviewed By: asb Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, llvm-commits Differential Revision: https://reviews.llvm.org/D42132 llvm-svn: 322876	2018-01-18 18:54:05 +00:00