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5 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov a25e0524c0 AMDGPU: Enable code object v3 for AMDHSA only 
Differential Revision: https://reviews.llvm.org/D54186

llvm-svn: 346923
 2018-11-15 02:32:43 +00:00
Konstantin Zhuravlyov 2d22d24ac4 Revert r345542: AMDGPU: Enable code object v3 by default 
It breaks mesa.

llvm-svn: 345662
 2018-10-30 22:02:40 +00:00
Konstantin Zhuravlyov 5cb950200c AMDGPU: Enable code object v3 by default 
Differential Revision: https://reviews.llvm.org/D53525

llvm-svn: 345542
 2018-10-29 21:07:27 +00:00
Matt Arsenault 72d27f5525 AMDGPU: Fix tests using old number for constant address space 
llvm-svn: 341770
 2018-09-10 02:54:25 +00:00
Matt Arsenault dd8fd9dcfd AMDGPU: Actually write nops for writeNopData 
Before this was just writing 0s, which ends up looking like a
v_cndmask_b32 v0, s0, v0, vcc. Write out an encoded s_nop instead.

llvm-svn: 299816
 2017-04-08 21:28:38 +00:00