Owen Anderson
|
9f94459d24
|
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
|
2009-08-11 20:47:22 +00:00 |
|
Owen Anderson
|
53aa7a960c
|
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
llvm-svn: 78610
|
2009-08-10 22:56:29 +00:00 |
|
Daniel Dunbar
|
7ecc62d8c1
|
Fix 'may be used uninitialized' warning.
- Anton, please review.
llvm-svn: 76144
|
2009-07-17 02:19:26 +00:00 |
|
Anton Korobeynikov
|
02fc607d54
|
Unbreak
llvm-svn: 76064
|
2009-07-16 14:36:52 +00:00 |
|
Anton Korobeynikov
|
3ae30e08ef
|
Fix logic inversion for RI-mode address selection
llvm-svn: 76052
|
2009-07-16 14:31:14 +00:00 |
|
Anton Korobeynikov
|
70d0bceed6
|
Unbreak mvi and friends - emit only 'significant' part of the operand
llvm-svn: 76041
|
2009-07-16 14:26:38 +00:00 |
|
Anton Korobeynikov
|
b25949b0f5
|
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
llvm-svn: 76011
|
2009-07-16 14:18:17 +00:00 |
|
Anton Korobeynikov
|
e5b04d7102
|
Use divide single for 32 bit signed divides
llvm-svn: 76010
|
2009-07-16 14:17:52 +00:00 |
|
Anton Korobeynikov
|
e0ad108f04
|
Remove redundand register move
llvm-svn: 76004
|
2009-07-16 14:14:54 +00:00 |
|
Anton Korobeynikov
|
fe8df8ff61
|
Properly handle divides. As a bonus - implement memory versions of them.
llvm-svn: 76003
|
2009-07-16 14:14:33 +00:00 |
|
Anton Korobeynikov
|
34ad780d0d
|
32 bit shifts have only 12 bit displacements
llvm-svn: 76000
|
2009-07-16 14:13:24 +00:00 |
|
Anton Korobeynikov
|
d8458e6c09
|
Typos
llvm-svn: 75991
|
2009-07-16 14:10:35 +00:00 |
|
Anton Korobeynikov
|
1eb6262b4b
|
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
llvm-svn: 75990
|
2009-07-16 14:10:17 +00:00 |
|
Anton Korobeynikov
|
62f8515b1c
|
Add support for 12 bit displacements
llvm-svn: 75988
|
2009-07-16 14:09:35 +00:00 |
|
Anton Korobeynikov
|
ec66c122e0
|
32-bit ri addressing mode has only 12-bit displacement
llvm-svn: 75973
|
2009-07-16 14:03:41 +00:00 |
|
Anton Korobeynikov
|
8a095bf56d
|
Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
llvm-svn: 75937
|
2009-07-16 13:48:42 +00:00 |
|
Anton Korobeynikov
|
19911b338a
|
Do not truncate sign bits for negative imms
llvm-svn: 75936
|
2009-07-16 13:48:23 +00:00 |
|
Anton Korobeynikov
|
405833dfb6
|
Add address computation stuff
llvm-svn: 75935
|
2009-07-16 13:47:59 +00:00 |
|
Anton Korobeynikov
|
44f8bbfb3f
|
Add stores and truncstores
llvm-svn: 75931
|
2009-07-16 13:45:00 +00:00 |
|
Anton Korobeynikov
|
11b91b4e2e
|
Add patterns for various extloads
llvm-svn: 75930
|
2009-07-16 13:44:30 +00:00 |
|
Anton Korobeynikov
|
0179364392
|
Do some heroic rri address matching (shamelessly stolen from x86 backend). Not tested though.
llvm-svn: 75929
|
2009-07-16 13:44:00 +00:00 |
|
Anton Korobeynikov
|
04be818918
|
Add shifts and reg-imm address matching
llvm-svn: 75927
|
2009-07-16 13:43:18 +00:00 |
|
Anton Korobeynikov
|
ebe2de0e14
|
Add bunch of reg-imm movs
llvm-svn: 75921
|
2009-07-16 13:34:50 +00:00 |
|
Anton Korobeynikov
|
28234bcde2
|
Provide masked reg-imm 'or' and 'and'
llvm-svn: 75919
|
2009-07-16 13:33:57 +00:00 |
|
Anton Korobeynikov
|
c334c28b3b
|
Let's start another backend :)
llvm-svn: 75909
|
2009-07-16 13:27:25 +00:00 |