Commit Graph

348 Commits

Author SHA1 Message Date
Evan Cheng d080f7bf26 Convert test to filecheck.
llvm-svn: 82835
2009-09-26 02:41:17 +00:00
Evan Cheng 3872b3c13e Flip -disable-post-RA-scheduler to -post-RA-scheduler.
llvm-svn: 82803
2009-09-25 21:38:11 +00:00
Dan Gohman 48b185d6f7 Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794
2009-09-25 20:36:54 +00:00
Bob Wilson d60367c198 pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767
2009-09-25 14:41:49 +00:00
Bob Wilson 6cd4aee5e9 Convert to FileCheck.
llvm-svn: 82710
2009-09-24 20:23:02 +00:00
Evan Cheng 26ea28eb5f Fix PR5024 with a big hammer: disable the double-def assertion in the scavenger.
LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g.

        BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ...
...
	%reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool]
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose

	%reg1031<def> = FOO <cp#1>, %D0<imp-def>
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness.

Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead.

llvm-svn: 82677
2009-09-24 02:27:09 +00:00
Evan Cheng 262f86ed90 Fix PR5024. LiveVariables physical register defs should *commit* only after all
of the defs are processed.
Also fix a implicit_def propagation bug: a implicit_def of a physical register
should be applied to uses of the sub-registers.

llvm-svn: 82616
2009-09-23 06:28:31 +00:00
Evan Cheng 08d1e41c10 Fix PR5024. LiveVariables::FindLastPartialDef should return a set of sub-registers that were defined by the last partial def, not just a single sub-register.
llvm-svn: 82535
2009-09-22 08:34:46 +00:00
Evan Cheng 0dfed43a5b Fix a pasto. Also simplify for Bill's benefit.
llvm-svn: 82505
2009-09-22 01:48:19 +00:00
Evan Cheng 255f416470 Clean up spill weight computation. Also some changes to give loop induction
variable increment / decrement slighter high priority. 

This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.

llvm-svn: 82485
2009-09-21 21:12:25 +00:00
Evan Cheng fccbd0afc6 Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information.
llvm-svn: 82436
2009-09-21 04:32:32 +00:00
Bob Wilson 0bf35c25fe Convert more tests to FileCheck.
llvm-svn: 81915
2009-09-15 20:58:02 +00:00
Sandeep Patel f3369c22a7 Fix superreg use in ARMAsmPrinter. Approved by Anton Korobeynikov.
llvm-svn: 81878
2009-09-15 17:53:11 +00:00
Anton Korobeynikov 6c89da7027 Define proper subreg sets for arm - this should fix bunch of subtle problems
with subreg - superreg mapping and also fix PR4965.

llvm-svn: 81657
2009-09-13 00:59:43 +00:00
Dan Gohman b165c11021 Remove an unnecessary -f.
llvm-svn: 81546
2009-09-11 18:41:06 +00:00
Dan Gohman a080159a7c Convert more tests to avoid llvm-as.
llvm-svn: 81545
2009-09-11 18:36:27 +00:00
Bob Wilson 39f51320ca Don't swap the operands of a subtraction when trying to create a
post-decrement load/store.

llvm-svn: 81464
2009-09-10 22:09:31 +00:00
Bob Wilson a2e8333eed Fix pr4939: Change FPCCToARMCC to translate SETOLE to ARMCC::LS.
See the bug report for details.

llvm-svn: 81397
2009-09-09 23:14:54 +00:00
Dan Gohman c8054d90fb Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Anton Korobeynikov 7697d37777 Unbreak getOnesVector() / getZeroVector() to use valid ARM extended imm's.
llvm-svn: 81262
2009-09-08 22:51:43 +00:00
Anton Korobeynikov 59e2b8e894 Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails and
makes the code faster.

llvm-svn: 81220
2009-09-08 15:22:32 +00:00
Daniel Dunbar 30e30587eb Remove stale greps.
llvm-svn: 80986
2009-09-04 05:07:52 +00:00
Bob Wilson 36d8c75eca Convert tests to FileCheck.
llvm-svn: 80983
2009-09-04 04:07:19 +00:00
Bob Wilson e072f8eedb Convert a test to FileCheck.
llvm-svn: 80975
2009-09-04 00:32:31 +00:00
Evan Cheng 1b38952c99 Reference to hidden symbols do not have to go through non-lazy pointer in non-pic mode. rdar://7187172.
llvm-svn: 80904
2009-09-03 07:04:02 +00:00
Anton Korobeynikov f0da41c3e4 More missed vdup patterns
llvm-svn: 80838
2009-09-02 21:21:28 +00:00
Bob Wilson d7797754d4 Add support for generating code for vst{234}lane intrinsics.
llvm-svn: 80707
2009-09-01 18:51:56 +00:00
Bob Wilson 39dc89b458 Fix incorrect declarations of intrinsics in this test.
llvm-svn: 80705
2009-09-01 18:50:43 +00:00
Bob Wilson ff69320427 Add test for vld{234}_lane instructions.
llvm-svn: 80658
2009-09-01 04:27:10 +00:00
Bob Wilson 33b408a10f Fix pr4843: When an instruction has multiple destination registers that are
tied to different source registers, the TwoAddressInstructionPass needs to
be smarter.  Change it to check before replacing a source register whether
that source register is tied to a different destination register, and if so,
defer handling it until a subsequent iteration.

llvm-svn: 80654
2009-09-01 04:18:40 +00:00
Jim Grosbach f09e8d5497 SJLJ is arm/darwin only for now. force the triple for the test
llvm-svn: 80651
2009-09-01 02:34:49 +00:00
Jim Grosbach 20eac92d88 Clean up LSDA name generation and use for SJLJ exception handling. This
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward
and making it a GV available for reference would be even better, but is
beyond the scope of what I'm looking to solve at this point.

Objective C++ code could generate function names that broke the previous
scheme. This fixes that.

llvm-svn: 80649
2009-09-01 01:57:56 +00:00
David Goodwin c8985204d9 Don't mark a register live at an undef use.
llvm-svn: 80621
2009-08-31 20:47:02 +00:00
Anton Korobeynikov 3681144bd8 Add missed pattern
llvm-svn: 80502
2009-08-30 19:06:39 +00:00
Anton Korobeynikov eab572a8ff EXTRACT_VECTOR_ELEMENT can have result type different from element type.
Remove the assertion and generalize the code for ARM NEON stuff.

llvm-svn: 80498
2009-08-30 17:14:54 +00:00
Anton Korobeynikov ece642a54c Do not assert on too wide splats we don't support.
llvm-svn: 80409
2009-08-29 00:08:18 +00:00
Anton Korobeynikov cd41d07f29 Add missed extract_element pattern
llvm-svn: 80408
2009-08-28 23:41:26 +00:00
Evan Cheng 43b9ca6f42 Let Darwin linker auto-synthesize stubs and lazy-pointers. This deletes a bunch of nasty code in ARM asm printer.
llvm-svn: 80404
2009-08-28 23:18:09 +00:00
Evan Cheng 6da267de23 v4, v5 does not support sxtb / sxth.
llvm-svn: 80322
2009-08-28 00:31:43 +00:00
Anton Korobeynikov 205cac837f scalar_to_vector is fully legal now (implemented as subreg accesses)
llvm-svn: 80249
2009-08-27 16:04:47 +00:00
Anton Korobeynikov d0b0262edf Ok, sometimes it's profitable to turn scalar_to_vector stuff into subreg access.
Add a testcase.

llvm-svn: 80246
2009-08-27 14:51:42 +00:00
Evan Cheng 7a37b1a2ca Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which cannot fold any immediate offset.
llvm-svn: 80191
2009-08-27 01:23:50 +00:00
Bob Wilson faebdee4dd Convert some more Neon tests to FileCheck.
llvm-svn: 80120
2009-08-26 18:11:50 +00:00
Anton Korobeynikov 0f756b27ae Expand scalar_to_vector - we don't have any isel logic for it now
llvm-svn: 80107
2009-08-26 16:26:09 +00:00
David Goodwin ae6bc8214a Fixup register kills after scheduling.
llvm-svn: 80002
2009-08-25 17:03:05 +00:00
Dan Gohman 0d4bbf2c4a Remove obsolete -f flags.
llvm-svn: 79992
2009-08-25 15:38:29 +00:00
Dale Johannesen fbc9a2e33b Split test into 3.
llvm-svn: 79926
2009-08-24 17:51:19 +00:00
Eli Friedman 682d8c1881 Make x86 test actually test x86 code generation. Fix the
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.

llvm-svn: 79719
2009-08-22 03:13:10 +00:00
Bob Wilson 616335f6c1 Use CHECK-NEXT to make sure we're only getting one copy of each shuffle
instruction.

llvm-svn: 79702
2009-08-22 00:13:23 +00:00
Bob Wilson a70623102e Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,
now using shuffles instead of intrinsics.

llvm-svn: 79673
2009-08-21 20:54:19 +00:00