Chris Lattner
|
6bc0304c91
|
Teach tblgen about instruction operands that have multiple MachineInstr
operands, digging into them to find register values (used on X86). Patch
by Evan Cheng!
llvm-svn: 24424
|
2005-11-19 07:05:57 +00:00 |
|
Chris Lattner
|
63dc7f569a
|
spell this variable right
llvm-svn: 23095
|
2005-08-26 20:42:52 +00:00 |
|
Chris Lattner
|
3d9fbefbf7
|
Expose a new flag to TargetInstrInfo
llvm-svn: 23094
|
2005-08-26 20:40:46 +00:00 |
|
Chris Lattner
|
220d00109b
|
For now, just emit empty operand info structures.
llvm-svn: 22910
|
2005-08-19 16:57:28 +00:00 |
|
Chris Lattner
|
17727bad02
|
Figure out how many operands each instruction has, keep track of whether
or not it's variable.
llvm-svn: 22885
|
2005-08-18 23:38:41 +00:00 |
|
Misha Brukman
|
650ba8eb56
|
Remove trailing whitespace
llvm-svn: 21428
|
2005-04-22 00:00:37 +00:00 |
|
Chris Lattner
|
733c82bfbf
|
Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.
llvm-svn: 19243
|
2005-01-02 02:29:04 +00:00 |
|
Nate Begeman
|
996ddbc98e
|
Add support for the isLoad and isStore flags, needed by the instruction scheduler
llvm-svn: 16554
|
2004-09-28 21:01:45 +00:00 |
|
Chris Lattner
|
9b0dfa3c0d
|
Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG
llvm-svn: 16553
|
2004-09-28 18:38:01 +00:00 |
|
Chris Lattner
|
6ffa501d9f
|
Make the AsmWriter a first-class tblgen object. Allow targets to specify
name of the generated asmwriter class, and the name of the format string.
llvm-svn: 15747
|
2004-08-14 22:50:53 +00:00 |
|
Chris Lattner
|
3bc477a237
|
Start parsing more information from the Operand information
llvm-svn: 15644
|
2004-08-11 02:22:39 +00:00 |
|
Chris Lattner
|
5572682faa
|
Parse the operand list of the instruction. We currently support register and immediate operands.
llvm-svn: 15390
|
2004-08-01 07:42:39 +00:00 |
|
Chris Lattner
|
c860ecafe1
|
Add, and start using, the CodeGenInstruction class. This class represents
an instance of the Instruction tablegen class.
llvm-svn: 15385
|
2004-08-01 05:04:00 +00:00 |