8370485db9
Break anti-dependence breaking out into its own class.
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llvm-svn: 85127
2009-10-26 16:59:04 +00:00
5bde1cbd93
of -> or
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llvm-svn: 85065
2009-10-25 19:14:48 +00:00
5a9788b979
80-column cleanup
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llvm-svn: 85064
2009-10-25 18:55:46 +00:00
2e7dee5f23
Add ARM getMatchingSuperRegClass to handle S / D / Q cross regclass coalescing.
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llvm-svn: 85049
2009-10-25 07:53:28 +00:00
5d1b849658
Don't forget subreg indices when folding load / store.
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llvm-svn: 85048
2009-10-25 07:52:27 +00:00
974e12b2d3
Remove includes of Support/Compiler.h that are no longer needed after the
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VISIBILITY_HIDDEN removal.
llvm-svn: 85043
2009-10-25 06:57:41 +00:00
02d5f77d26
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
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Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
llvm-svn: 85042
2009-10-25 06:33:48 +00:00
46ed1f8341
80 col violation.
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llvm-svn: 84986
2009-10-24 02:07:42 +00:00
e2871d69db
Restrict Thumb1 register allocation to low registers, even for instructions that
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can access the hi regs. Our prologue and epilogue code doesn't know how to
properly handle save/restore of the hi regs, so things go badly when we alloc
them.
llvm-svn: 84982
2009-10-24 00:19:24 +00:00
22b2c011f9
FIXME no longer applies. R12 and R3 are available for allocation
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llvm-svn: 84977
2009-10-23 23:07:42 +00:00
02ad4cb32e
Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.
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llvm-svn: 84911
2009-10-22 23:19:17 +00:00
9d763cc3f8
Revert 84843. Evan, this was breaking some of the if-conversion tests.
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llvm-svn: 84868
2009-10-22 16:52:21 +00:00
3615b9bef3
Move if-conversion before post-regalloc scheduling so the predicated instruction get scheduled properly.
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llvm-svn: 84843
2009-10-22 06:48:32 +00:00
943f4f41f2
Load / store multiple was missing opportunites when the load / store bundles are at the end of the bb. Test case is already in, the bug is exposed by subsequent commit.
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llvm-svn: 84842
2009-10-22 06:47:35 +00:00
5457a96b63
Trim more includes.
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llvm-svn: 84832
2009-10-22 05:11:00 +00:00
344fcd9d61
Trim include.
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llvm-svn: 84831
2009-10-22 05:08:49 +00:00
0f55e9ce2e
Don't generate sbfx / ubfx with negative lsb field. Patch by David Conrad.
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llvm-svn: 84813
2009-10-22 00:40:00 +00:00
f2e74df12e
Missing piece of the ARM frame index post-scavenging conditionalization
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llvm-svn: 84798
2009-10-21 23:40:56 +00:00
05536f50dc
Conditionalize ARM/T2 frame index post-scavenging while working out fixes
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for a few bugs.
llvm-svn: 84791
2009-10-21 22:59:24 +00:00
854530a7dd
Most of the NEON shuffle instructions do not support 64-bit element types.
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llvm-svn: 84785
2009-10-21 21:36:27 +00:00
a93ca3c637
Improve handling of immediates by splitting 32-bit immediates into two 16-bit
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immediate operands when they will fit into the using instruction.
llvm-svn: 84778
2009-10-21 20:44:34 +00:00
0db964a3a0
Fix NEON VST2LN instruction encoding.
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Patch by Johnny Chen.
llvm-svn: 84767
2009-10-21 17:54:01 +00:00
87671da29a
Revert 84732. It was the wrong fix.
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llvm-svn: 84766
2009-10-21 17:52:34 +00:00
786b15fe12
Match more patterns to movt.
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llvm-svn: 84751
2009-10-21 08:15:52 +00:00
175d04c90f
tidy
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llvm-svn: 84738
2009-10-21 04:10:24 +00:00
5b5cb92816
Fix some more NEON instruction encoding problems.
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Thanks to Johnny Chen for discovering the problem.
llvm-svn: 84732
2009-10-21 02:27:20 +00:00
bd3650cc84
Leave some NEON instruction encoding bits unspecified instead of setting
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a default value of zero. This is important for decoding the instructions.
Patch by Johnny Chen, with some changes from me, too.
llvm-svn: 84730
2009-10-21 02:15:46 +00:00
a470eac6a1
Fix -Asserts warning.
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llvm-svn: 84687
2009-10-20 22:10:05 +00:00
cccf5084a3
Disable by default while debugging
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llvm-svn: 84669
2009-10-20 20:31:31 +00:00
f3a2b6499e
add cmd line opt to disable frame index reuse for ARM and T2. debug aid.
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llvm-svn: 84664
2009-10-20 20:19:50 +00:00
3301207a15
Random #include pruning.
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llvm-svn: 84632
2009-10-20 11:44:38 +00:00
9351e4f4b2
implement some more easy hooks.
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llvm-svn: 84614
2009-10-20 06:22:33 +00:00
60d5131653
Implement some hooks, make printOperand abort if unknown modifiers are
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present.
llvm-svn: 84613
2009-10-20 06:15:28 +00:00
227767b4e5
t2MOVi32imm is currently always lowered by the Thumb2ITBlockPass.
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llvm-svn: 84611
2009-10-20 05:58:02 +00:00
f0b3d15cfe
Wire up the ARM MCInst printer, for llvm-mc.
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llvm-svn: 84600
2009-10-20 05:15:36 +00:00
34f040a575
Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*
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functions are not needed.
llvm-svn: 84587
2009-10-20 01:32:47 +00:00
84f6235b6f
Enable post-pass frame index register scavenging for ARM and Thumb2
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llvm-svn: 84585
2009-10-20 01:26:58 +00:00
484d2e9491
lower ARM::MOVi32imm properly.
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llvm-svn: 84583
2009-10-20 01:11:37 +00:00
43c5589a7e
add support for external symbols. The mc instprinter can now handle
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reasonable code like Codegen/ARM/2009-02-27-SpillerBug.ll, producing
identical output except for superior formatting of constant pool entries.
llvm-svn: 84582
2009-10-20 00:56:16 +00:00
1b06acbd70
get fancy: support basic block operands. Yay for jumps.
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llvm-svn: 84579
2009-10-20 00:52:47 +00:00
85ab670644
add supprort for the 'sbit' operand, MOVi apparently has one.
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llvm-svn: 84577
2009-10-20 00:46:11 +00:00
19c52201bd
add support for instruction predicates.
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llvm-svn: 84575
2009-10-20 00:42:49 +00:00
2f69ed8f4c
implement printSORegOperand, add lowering for the nasty and despicable MOVi2pieces :)
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llvm-svn: 84573
2009-10-20 00:40:56 +00:00
772b2f84eb
Refs: A8-598.
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Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.
Patch by Johnny Chen.
llvm-svn: 84572
2009-10-20 00:38:19 +00:00
68f495caad
Add missing encoding bits to NLdSt class of instructions.
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Patch by Johnny Chen.
llvm-svn: 84570
2009-10-20 00:19:08 +00:00
bd531262f8
handle addmode4 modifiers, fix a fixme in printRegisterList
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by ignoring all implicit regs when lowering.
llvm-svn: 84566
2009-10-19 23:31:43 +00:00
f5f263f1b4
Enable allocation of R3 in Thumb1
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llvm-svn: 84563
2009-10-19 22:57:03 +00:00
d91c11091d
use EmitLabel instead of text emission
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llvm-svn: 84562
2009-10-19 22:51:16 +00:00
86dfd73c38
add a twine version of MCContext::GetOrCreateSymbol.
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llvm-svn: 84561
2009-10-19 22:49:00 +00:00
186c6b0834
lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entries
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like:
@ BB#1:
.align 2
LCPI1_0:
.long L_.str-(LPC0+8)
Note that proper indentation of the label :)
llvm-svn: 84558
2009-10-19 22:33:05 +00:00
David Goodwin