Rafael Espindola
|
98dc23fd1f
|
use @ for comments
store LR in an arbitrary stack slot
add support for writing varargs functions
llvm-svn: 29876
|
2006-08-25 17:55:16 +00:00 |
|
Rafael Espindola
|
fe03fe9bf4
|
create a generic bcond instruction that has a conditional code argument
llvm-svn: 29856
|
2006-08-24 16:13:15 +00:00 |
|
Rafael Espindola
|
e08b9853cc
|
initial support for branches
llvm-svn: 29854
|
2006-08-24 13:45:55 +00:00 |
|
Rafael Espindola
|
c3ed77e1b9
|
add a "load effective address"
llvm-svn: 29748
|
2006-08-17 17:09:40 +00:00 |
|
Rafael Espindola
|
8b7bd8264b
|
start comments with #
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
llvm-svn: 29451
|
2006-08-01 18:53:10 +00:00 |
|
Rafael Espindola
|
95035cf001
|
implement LowerConstantPool and LowerGlobalAddress
llvm-svn: 29433
|
2006-08-01 12:58:43 +00:00 |
|
Rafael Espindola
|
7cc2d19fc1
|
handle GlobalValue::InternalLinkage in doFinalization
llvm-svn: 29417
|
2006-07-31 20:38:13 +00:00 |
|
Rafael Espindola
|
89e5cbd897
|
emit global constants
llvm-svn: 29344
|
2006-07-27 11:38:51 +00:00 |
|
Rafael Espindola
|
75269be065
|
skeleton of a lowerCall implementation for ARM
llvm-svn: 29159
|
2006-07-16 01:02:57 +00:00 |
|
Rafael Espindola
|
185c5c2bdf
|
add the memri memory operand
this makes it possible for ldr instructions with non-zero immediate
llvm-svn: 29103
|
2006-07-11 11:36:48 +00:00 |
|
Rafael Espindola
|
87bc1a9b0b
|
On ARM, alignment is in bits
Add lr as a hard coded operand of bx
llvm-svn: 28494
|
2006-05-26 10:56:17 +00:00 |
|
Rafael Espindola
|
91df1ef41f
|
implement initial version of ARMAsmPrinter::printOperand
llvm-svn: 28470
|
2006-05-25 12:57:06 +00:00 |
|
Rafael Espindola
|
27f8bdc7e5
|
implement minimal versions of
ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr
llvm-svn: 28431
|
2006-05-23 02:48:20 +00:00 |
|
Rafael Espindola
|
ffdc24b847
|
added a skeleton of the ARM backend
llvm-svn: 28301
|
2006-05-14 22:18:28 +00:00 |