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Author SHA1 Message Date
Nikita Popov cfe786a195 [SDAG][AArch64] Boolean and/or reduce to umax/min reduce (PR41635) 
This addresses one half of https://bugs.llvm.org/show_bug.cgi?id=41635
by combining a VECREDUCE_AND/OR into VECREDUCE_UMIN/UMAX (if latter is
legal but former is not) for zero-or-all-ones boolean reductions (which
are detected based on sign bits).

Differential Revision: https://reviews.llvm.org/D61398

llvm-svn: 360054
 2019-05-06 16:17:17 +00:00
Nikita Popov c89667db2c [AArch64] Add tests for bool vector reductions; NFC 
Baseline tests for PR41635.

llvm-svn: 359723
 2019-05-01 20:18:36 +00:00