Commit Graph

1332 Commits

Author SHA1 Message Date
Stuart Hastings c0458f1a40 Tweak x86 INC/DEC generation to look for CopyToReg or SETCC. Radar 7866163.
llvm-svn: 102477
2010-04-28 00:35:10 +00:00
Evan Cheng 3b928af28f SRA promotion is also not free.
llvm-svn: 102456
2010-04-27 19:48:31 +00:00
Evan Cheng 6e45f1d1ff Promoting 16-bit cmp / test aren't free. Don't do it.
llvm-svn: 102366
2010-04-26 19:06:11 +00:00
Evan Cheng ed69b382ea - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.

llvm-svn: 102323
2010-04-26 07:38:55 +00:00
Dale Johannesen 582565e991 Stop abusing EmitInstrWithCustomInserter for target-dependent
form of DEBUG_VALUE, as it doesn't have reasonable default
behavior for unsupported targets.  Add a new hook instead.
No functional change.

llvm-svn: 102320
2010-04-25 21:33:54 +00:00
Evan Cheng a02d0e7d6b Avoid promoting a i16 node if it would eliminate a (store (op (load))) opportunity.
llvm-svn: 102237
2010-04-24 04:44:57 +00:00
Evan Cheng 0367559786 Fix X86ISD::CMP i16 to i32 promotion.
llvm-svn: 102192
2010-04-23 18:21:16 +00:00
Dan Gohman c594eab10f Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel
and into SelectionDAGBuilder and FastISel.

llvm-svn: 102123
2010-04-22 20:46:50 +00:00
Evan Cheng f1223bdec0 - It's not safe to promote rotates (at least not trivially).
- Some code refactoring.

llvm-svn: 102111
2010-04-22 20:19:46 +00:00
Evan Cheng 9c8cd8c061 isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.
llvm-svn: 101979
2010-04-21 01:47:12 +00:00
Dale Johannesen 0522b90cdb Because of the EMMS problem, right now we have to support
user-defined operations that use MMX register types, but
the compiler shouldn't generate them on its own.  This adds
a Synthesizable abstraction to represent this, and changes
the vector widening computation so it won't produce MMX types.
(The motivation is to remove noise from the ABI compatibility
part of the gcc test suite, which has some breakage right now.)

llvm-svn: 101951
2010-04-20 22:34:09 +00:00
Evan Cheng e19aa5cc52 More progress on promoting i16 operations to i32 for x86. Work in progress.
llvm-svn: 101808
2010-04-19 19:29:22 +00:00
Dan Gohman 21cea8ac2e Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.

llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman 31ae586c74 Move per-function state out of TargetLowering subclasses and into
MachineFunctionInfo subclasses.

llvm-svn: 101634
2010-04-17 14:41:14 +00:00
Evan Cheng f1bd5fcdb4 More work to allow dag combiner to promote 16-bit ops to 32-bit.
llvm-svn: 101621
2010-04-17 06:13:15 +00:00
Eric Christopher 7258dcd77f Revert 101465, it broke internal OpenGL testing.
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.

llvm-svn: 101579
2010-04-16 23:37:20 +00:00
Dan Gohman 148c69a3f6 Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.
llvm-svn: 101531
2010-04-16 20:11:05 +00:00
Gabor Greif f375520f7b reapply r101434
with a fix for self-hosting

rotate CallInst operands, i.e. move callee to the back
of the operand array

the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary

llvm-svn: 101465
2010-04-16 15:33:14 +00:00
Evan Cheng af56facacd Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
x86 support is off by default. It can be enabled with -promote-16bit.

Work in progress.

llvm-svn: 101448
2010-04-16 06:14:10 +00:00
Gabor Greif 403e9694f9 back out r101423 and r101397, they break llvm-gcc self-host on darwin10
llvm-svn: 101434
2010-04-16 01:16:20 +00:00
Gabor Greif 33ae80bff7 reapply r101364, which has been backed out in r101368
with a fix

rotate CallInst operands, i.e. move callee to the back
of the operand array

the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary

llvm-svn: 101397
2010-04-15 20:51:13 +00:00
Gabor Greif 9fd00c7d25 back out r101364, as it trips the linux nightlybot on some clang C++ tests
llvm-svn: 101368
2010-04-15 12:46:56 +00:00
Gabor Greif aafd209632 rotate CallInst operands, i.e. move callee to the back
of the operand array

the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary

llvm-svn: 101364
2010-04-15 10:49:53 +00:00
Dan Gohman bcaf681cde Add const qualifiers to CodeGen's use of LLVM IR constructs.
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
Eric Christopher eabc9623da Allow lowering for palignr instructions for mmx sized vectors. Add
patterns to handle the lowering.

llvm-svn: 101331
2010-04-15 01:40:20 +00:00
Dan Gohman 7deb447781 Factor out EH landing pad code into a separate function, and constify
a bunch of stuff to support it.

llvm-svn: 101273
2010-04-14 19:53:31 +00:00
Evan Cheng ebe47c872f Avoid using f64 to lower memcpy from constant string. It's cheaper to use i32 store of immediates.
llvm-svn: 100751
2010-04-08 07:37:57 +00:00
Chris Lattner 2104b8d36e rename llvm::llvm_report_error -> llvm::report_fatal_error
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
John McCall 6ac5cc973c Clean up some signedness oddities in this code noticed by clang.
llvm-svn: 100599
2010-04-07 01:49:15 +00:00
Chris Lattner 305f2efb63 unthread MMI from FastISel
llvm-svn: 100416
2010-04-05 06:05:26 +00:00
Chris Lattner 7cfa70e9b3 fastisel doesn't need DwarfWriter, remove some tendricles.
llvm-svn: 100381
2010-04-05 02:19:28 +00:00
Mon P Wang c576ee9040 Reapply address space patch after fixing an issue in MemCopyOptimizer.
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)

llvm-svn: 100304
2010-04-04 03:10:48 +00:00
Chris Lattner 6f306d7d30 use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
llvm-svn: 100214
2010-04-02 20:16:16 +00:00
Evan Cheng 61399375a2 Correctly lower memset / memcpy of undef. It should be a nop. PR6767.
llvm-svn: 100208
2010-04-02 19:36:14 +00:00
Mon P Wang 999c1b927b Revert r100191 since it breaks objc in clang
llvm-svn: 100199
2010-04-02 18:43:02 +00:00
Mon P Wang a972ab8564 Reapply address space patch after fixing an issue in MemCopyOptimizer.
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)

llvm-svn: 100191
2010-04-02 18:04:15 +00:00
Eric Christopher 06a1639b98 Remove FIXME - if there's a better way to do this it isn't here.
llvm-svn: 100176
2010-04-02 04:32:37 +00:00
Chandler Carruth 8d6d0d4c58 Disambiguate conditional expression for newer GCCs.
llvm-svn: 100167
2010-04-02 01:31:24 +00:00
Evan Cheng f997c31598 In 64-bit mode, use i64 to lower memcpy / memset instead of f64.
llvm-svn: 100137
2010-04-01 20:27:45 +00:00
Evan Cheng d9929f03cf Add comments about DstAlign and SrcAlign.
llvm-svn: 100132
2010-04-01 20:10:42 +00:00
Evan Cheng 4c014c892a - Avoid using floating point stores to implement memset unless the value is zero.
- Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type.

llvm-svn: 100118
2010-04-01 18:19:11 +00:00
Evan Cheng 43cd9e3845 Fix sdisel memcpy, memset, memmove lowering:
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
   load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
   ops more effectively.
rdar://7774704

llvm-svn: 100090
2010-04-01 06:04:33 +00:00
Bob Wilson 6f7fd28824 Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.
llvm-svn: 99948
2010-03-30 22:27:04 +00:00
Mon P Wang 7460571381 Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
A update of langref will occur in a subsequent checkin.

llvm-svn: 99928
2010-03-30 20:55:56 +00:00
Chris Lattner 9897043928 Rip out the 'is temporary' nonsense from the MCContext interface to
create symbols.  It is extremely error prone and a source of a lot
of the remaining integrated assembler bugs on x86-64.

This fixes rdar://7807601.

llvm-svn: 99902
2010-03-30 18:10:53 +00:00
Eric Christopher c1ddaaf5b1 Add FIXME for operand promotion.
llvm-svn: 99859
2010-03-30 01:04:59 +00:00
Benjamin Kramer 2788f797ca Make isInt?? and isUint?? template specializations of the generic versions. This
makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.

llvm-svn: 99838
2010-03-29 21:13:41 +00:00
Evan Cheng 3365fb1412 Do not sibcall if stack needs to be dynamically aligned.
llvm-svn: 99620
2010-03-26 16:26:03 +00:00
Evan Cheng 00a620c61e Allow trivial sibcall of vararg callee when no arguments are being passed.
llvm-svn: 99598
2010-03-26 02:13:13 +00:00
Nate Begeman 2ceb288416 Per chris's request, add some comments.
llvm-svn: 99434
2010-03-24 22:19:06 +00:00
Nate Begeman 583e05d8ce BUILD_VECTOR was missing out on some prime opportunities to use SSE 4.1 inserts.
llvm-svn: 99423
2010-03-24 20:49:50 +00:00
Evan Cheng 3f6f769c4f If call result is in ST0 and it is not being passed to the caller's
caller, then it is not safe to optimize the call into a sibcall since
the call result has to be popped off the x87 stack.

llvm-svn: 99032
2010-03-20 02:58:15 +00:00
Daniel Dunbar 5599256415 MC: Allow modifiers in MCSymbolRefExpr, and eliminate X86MCTargetExpr.
- Although it would be nice to allow this decoupling, the assembler needs to be able to reason about MCSymbolRefExprs in too many places to make this viable. We can use a target specific encoding of the variant if this becomes an issue.
 - This patch also extends llvm-mc to support parsing of the modifiers, as opposed to lumping them in with the symbol.

llvm-svn: 98592
2010-03-15 23:51:06 +00:00
Dan Gohman c6ddebd6d1 Recognize code for doing vector gather/scatter index calculations with
32-bit indices. Instead of shuffling each element out of the index vector,
when all indices are needed, just store the input vector to the stack and
load the elements out.

llvm-svn: 98588
2010-03-15 23:23:03 +00:00
Bill Wendling bbcaa40227 Now that the default for Darwin platforms is to place the LSDA into the TEXT
section, remove the target-specific code that performs this.

llvm-svn: 98580
2010-03-15 21:09:38 +00:00
Bill Wendling 0344874921 Place the LSDA into the TEXT section for x86 Darwin. If the global it's pointing
to is local to the translation unit, we need to place fill the value of that
symbol into the non-lazy pointer.

This should conclude all Darwin changes for placing the LSDA into the TEXT
section. There is some cleanup to do. I.e., there's no longer a special need for
target-specific code here. But that can come later.

llvm-svn: 98564
2010-03-15 19:04:37 +00:00
Evan Cheng ae5edee6c8 Avoid sibcall optimization if either caller or callee is using sret semantics.
llvm-svn: 98561
2010-03-15 18:54:48 +00:00
Chris Lattner 6feb7e3325 fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), not
the operand type.

llvm-svn: 98507
2010-03-14 18:44:35 +00:00
Chris Lattner a30d4ce194 add support for pentium class CPUs which do not have cmov,
PR4841.  Patch by Craig Smith!

llvm-svn: 98496
2010-03-14 18:31:44 +00:00
Evan Cheng d703df67ce Do not force indirect tailcall through fixed registers: eax, r11. Add support to allow loads to be folded to tail call instructions.
llvm-svn: 98465
2010-03-14 03:48:46 +00:00
Chris Lattner 29bdac4928 eliminate the now-unneeded context argument of MBB::getSymbol()
llvm-svn: 98451
2010-03-13 21:04:28 +00:00
Bill Wendling 3d0cd822a9 Add a beta-test for placing the LSDA into the TEXT section on X86.
llvm-svn: 98370
2010-03-12 19:20:40 +00:00
Benjamin Kramer d69ee90f2f Use StringRef::substr instead of std::string::substr to avoid using a free'd
string temporary. This should fix PR6590.

llvm-svn: 98349
2010-03-12 13:54:59 +00:00
Dan Gohman 576aec4363 Remove getWidenVectorType, which is no longer used.
llvm-svn: 98289
2010-03-11 21:39:57 +00:00
Bill Wendling 00810c39da revert r98270.
llvm-svn: 98281
2010-03-11 19:50:31 +00:00
Evan Cheng 31fe835bf2 Bad bad bug. x86 force indirect tail call address into eax when it's meant to force it into a call preserved register instead. Change it to ecx for now.
llvm-svn: 98270
2010-03-11 18:49:14 +00:00
Chris Lattner a179e4d0a8 add support, testcases, and dox for the new GHC calling
convention.  Patch by David Terei!

llvm-svn: 98212
2010-03-11 00:22:57 +00:00
Dale Johannesen 49de0607a8 Progress towards shepherding debug info through SelectionDAG.
No functional effect yet.  This is still evolving and should
not be viewed as final.

llvm-svn: 98195
2010-03-10 22:13:47 +00:00
Chris Lattner ac2361a9b0 set the temporary bit on MCSymbols correctly.
llvm-svn: 98124
2010-03-10 02:25:11 +00:00
Anton Korobeynikov d5e3fd6dc8 Lower dynamic stack allocation on mingw32 to separate instruction.
We cannot use a normal call here since it has extra unmodelled side
effects (it changes stack pointer). This should fix PR5292.

llvm-svn: 97884
2010-03-06 19:32:29 +00:00
Evan Cheng 27494232d4 Fix typo.
llvm-svn: 97818
2010-03-05 19:55:55 +00:00
Evan Cheng 654ec2a663 Fix an oops in x86 sibcall optimization. If the ByVal callee argument is itself passed as a pointer, then it's obviously not safe to do a tail call.
llvm-svn: 97797
2010-03-05 08:38:04 +00:00
Evan Cheng cf67ffa500 Rever 96389 and 96990. They are causing some miscompilation that I do not fully understand.
llvm-svn: 97782
2010-03-05 03:08:23 +00:00
Dan Gohman b8ebd408da Fix recognition of 16-bit bswap for C front-ends which emit the
clobber registers in a different order.

llvm-svn: 97741
2010-03-04 19:58:08 +00:00
Bill Wendling 78c5b7a76d Remove dead parameter passing.
llvm-svn: 97536
2010-03-02 01:55:18 +00:00
Evan Cheng 87d50aa18a Remove the optimize for code size limitation on r67917. Optimize 64-bit imul by constants into leas + shl regardless if optimizing for code size. The size saving from using imulq isn't worth it. Also, the lea and shl instructions may expose further optimization.
llvm-svn: 97507
2010-03-01 22:00:11 +00:00
Evan Cheng 228c31f045 Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
llvm-svn: 97310
2010-02-27 07:36:59 +00:00
Dan Gohman ec4e1b67bf Truncate from i64 to i32 is "free" on x86-32, because it involves
just discarding one of the registers.

llvm-svn: 97100
2010-02-25 03:04:36 +00:00
Daniel Dunbar 4811d004be Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.

llvm-svn: 97040
2010-02-24 17:05:47 +00:00
Dan Gohman 3860521406 When forming SSE min and max nodes for UGE and ULE comparisons, it's
necessary to swap the operands to handle NaN and negative zero properly.

Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.

llvm-svn: 97025
2010-02-24 06:52:40 +00:00
Evan Cheng 328a607490 Re-apply 96540 and 96556 with fixes.
llvm-svn: 97011
2010-02-24 01:42:31 +00:00
Evan Cheng da52f449a0 Fix rev 96389 by restricting the xform to mask that's either signbit or max signed value.
llvm-svn: 96990
2010-02-23 21:51:54 +00:00
Chris Lattner a828850b4d X86InstrInfoSSE.td declares PINSRW as having type v8i16,
don't alis it in the MMX .td file with a different width,
split into two X86ISD opcodes.  This fixes an x86 testcase.

llvm-svn: 96859
2010-02-23 02:07:48 +00:00
Arnold Schwaighofer 30ece5b807 Mark the return address stack slot as mutable when moving the return address
during a tail call. A parameter might overwrite this stack slot during the tail
call. 

The sequence during a tail call is:
1.) load return address to temp reg
2.) move parameters (might involve storing to return address stack slot)
3.) store return address to new location from temp reg

If the stack location is marked immutable CodeGen can colocate load (1) with the
store (3).

This fixes bug 6225.

llvm-svn: 96783
2010-02-22 16:18:09 +00:00
Dan Gohman b87de8d30d Remove the logic for reasoning about NaNs from the code that forms
SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.

Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.

llvm-svn: 96775
2010-02-22 04:03:39 +00:00
Chris Lattner db8d6678e9 fix an incorrect VT: eflags is always i32. The bug was causing us to
create an X86ISD::Cmp node with result type i64 on the 
CodeGen/X86/shift-i256.ll testcase and the new isel was assert on it
downstream.

llvm-svn: 96768
2010-02-22 00:28:59 +00:00
Anton Korobeynikov 31a9212b0b It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.
This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.

llvm-svn: 96755
2010-02-21 20:28:15 +00:00
Duncan Sands d0bf6f640f Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build.  I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier.  The
symptom of the 96556 miscompile is the following crash:

  llvm[3]: Compiling AlphaISelLowering.cpp for Release build
  cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
  Stack dump:
  0.	Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
  g++: Internal error: Aborted (program cc1plus)

This occurs when building LLVM using LLVM built by LLVM (via
dragonegg).  Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM.  Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.

Found by bisection.

r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines

Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines

Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.

e.g. On x86_64
  %0 = icmp eq i32 %x, 0
  %1 = icmp eq i32 %y, 0
  %2 = xor i1 %1, %0
  br i1 %2, label %bb, label %return
=>
	testl   %edi, %edi
	sete    %al
	testl   %esi, %esi
	sete    %cl
	cmpb    %al, %cl
	je      LBB1_2

llvm-svn: 96672
2010-02-19 11:30:41 +00:00
Evan Cheng 0ceb68a552 Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"

llvm-svn: 96556
2010-02-18 02:13:50 +00:00
Evan Cheng 82b04130cb Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).

Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335

llvm-svn: 96389
2010-02-16 21:09:44 +00:00
Anton Korobeynikov ae4ccc10da Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
llvm-svn: 96285
2010-02-15 22:35:59 +00:00
David Greene ff34702b04 Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.

llvm-svn: 96228
2010-02-15 16:53:33 +00:00
Duncan Sands 9dff9bec31 Uniformize the names of type predicates: rather than having isFloatTy and
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!

llvm-svn: 96223
2010-02-15 16:12:20 +00:00
Anton Korobeynikov c9276dfe04 Cleanup stdcall / fastcall name mangling.
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

llvm-svn: 95980
2010-02-12 15:28:40 +00:00
Chris Lattner 2b0a7a2592 refactor the conditional jump instructions in the .td file to
use a multipattern that generates both the 1-byte and 4-byte 
versions from the same defm

llvm-svn: 95901
2010-02-11 19:25:55 +00:00
Mon P Wang 5b77f0dac1 The previous fix of widening divides that trap was too fragile as it depends on custom
lowering and requires that certain types exist in ValueTypes.h.  Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements.  It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.

llvm-svn: 95823
2010-02-10 23:37:45 +00:00
Dan Gohman 4a618827de Fix "the the" and similar typos.
llvm-svn: 95781
2010-02-10 16:03:48 +00:00
Chris Lattner b8479fb309 switch ELF @GOTOFF references to use X86MCTargetExpr.
llvm-svn: 95593
2010-02-08 22:33:55 +00:00
Dan Gohman 3464a5b609 Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect
its current purpose.

llvm-svn: 95564
2010-02-08 20:27:50 +00:00
Evan Cheng d064aefefc Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments.
llvm-svn: 95475
2010-02-06 03:28:46 +00:00
Chris Lattner 342762fdba constant propagate a method away.
llvm-svn: 95408
2010-02-05 19:20:30 +00:00
Chris Lattner b8d375fd21 change getSizeOfImm and getBaseOpcodeFor to just take
TSFlags directly instead of a TargetInstrDesc.

llvm-svn: 95405
2010-02-05 19:16:26 +00:00
Evan Cheng a366c61f77 Handle tail call with byval arguments.
llvm-svn: 95351
2010-02-05 02:21:12 +00:00
Evan Cheng aeba2250a5 Re-enable x86 tail call optimization.
llvm-svn: 95295
2010-02-04 06:47:24 +00:00
Evan Cheng 9976832a05 Indirect tail call has to go through a call preserved register since it's after callee register pops. X86 isel lowering is using EAX / R11 and it was somehow adding that to function live out. That prevented the real function return register from being added to the function live out list and bad things happen.
This fixes 483.xalancbmk (with tail call opt).

llvm-svn: 95280
2010-02-04 02:40:39 +00:00
Evan Cheng f4139067ee Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.
llvm-svn: 95259
2010-02-03 21:40:40 +00:00
Evan Cheng 40905b4302 Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
llvm-svn: 95195
2010-02-03 03:28:02 +00:00
Evan Cheng 5f238a9650 ByVal frame object size should be that of the byval argument, not the size of the type which is just a pointer. This is not known to break stuff but is wrong nevertheless.
llvm-svn: 95163
2010-02-02 23:58:13 +00:00
Evan Cheng 6f36a083ef Revert 95130.
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
Evan Cheng c1b0116ff1 Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
Evan Cheng 55afd2564c Perform sibcall in some cases when arguments are passes memory. Look for cases
where callee's arguments are already in the caller's own caller's stack and
they line up perfectly. e.g.

extern int foo(int a, int b, int c);

int bar(int a, int b, int c) {
  return foo(a, b, c);
}

llvm-svn: 95053
2010-02-02 02:22:50 +00:00
Evan Cheng a49d8e6d38 Fix PR6196. GV callee may not be a function.
llvm-svn: 95017
2010-02-01 22:40:09 +00:00
Evan Cheng ed8ca56eeb Undo r94946 now all the tests are passing again.
llvm-svn: 94970
2010-02-01 02:13:39 +00:00
Evan Cheng 9adc6f46cf Fix a missing check from my last commit.
llvm-svn: 94949
2010-01-31 07:27:31 +00:00
Evan Cheng 7f62def0f9 Avoid recursive sibcall's.
llvm-svn: 94946
2010-01-31 06:44:49 +00:00
Evan Cheng 70f714fdbe Allow more tailcall optimization: calls with inputs that are all passed in registers.
llvm-svn: 94873
2010-01-30 01:22:00 +00:00
Evan Cheng 297a494f55 Catch more trivial tail call opportunities: no inputs and output types match.
llvm-svn: 94804
2010-01-29 06:45:59 +00:00
Evan Cheng 346af88396 Fix a bug introduced by r94490 where it created a X86ISD::CMP whose output type is different from its inputs.
This fixes PR6146.

llvm-svn: 94731
2010-01-28 01:57:22 +00:00
Evan Cheng 85476f304c Perform trivial tail call optimization for callees with "C" ABI. These are done
even when -tailcallopt is not specified and it does not require changing ABI.
First case is the most trivial one. Perform tail call optimization when both
the caller and callee do not return values and when the callee does not take
any input arguments.

llvm-svn: 94664
2010-01-27 06:25:16 +00:00
Evan Cheng 67a69dd2ed Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626
2010-01-27 00:07:07 +00:00
Evan Cheng 1b7b9e852c Delete blank lines that bug me.
llvm-svn: 94610
2010-01-26 23:07:57 +00:00
Evan Cheng 345ec3166e Delete dead code.
llvm-svn: 94583
2010-01-26 20:36:21 +00:00
Evan Cheng 8703c412f4 Code refactoring, no functionality change.
llvm-svn: 94570
2010-01-26 19:04:47 +00:00
Chris Lattner 8a785d7a67 Move getJTISymbol from MachineJumpTableInfo to MachineFunction,
which is more convenient, and change getPICJumpTableRelocBaseExpr
to take a MachineFunction to match.

Next, move the X86 code that create a PICBase symbol to
X86TargetLowering::getPICBaseSymbol from 
X86MCInstLower::GetPICBaseSymbol, which was an asmprinter specific 
library.  This eliminates a 'gross hack', and allows us to
implement X86ISelLowering::getPICJumpTableRelocBaseExpr which now
calls it.

This in turn allows us to eliminate the 
X86AsmPrinter::printPICJumpTableSetLabel method, which was the
only overload of printPICJumpTableSetLabel.

llvm-svn: 94526
2010-01-26 06:28:43 +00:00
Chris Lattner 4bfbe93437 implement X86 @GOTOFF jump table entries with the new EK_Custom32
jump table entry kind, instead of overloading 
AsmPrinter::printPICJumpTableEntry.

This has a pretty horrible and inefficient FIXME around how @GOTOFF
is currently smashed into the mcsymbol name, but otherwise this is
much cleaner.

llvm-svn: 94516
2010-01-26 05:02:42 +00:00
Evan Cheng 555f61bf58 Implement cond ? -1 : 0 with sbb.
llvm-svn: 94490
2010-01-26 02:00:44 +00:00
Chris Lattner 9c1efcd4f6 in 32-bit pic mode for targets with a GOT, x86 emits jump table
entries with @GOTOFF whih is EK_GPRel32BlockAddress.

llvm-svn: 94474
2010-01-25 23:38:14 +00:00
Chris Lattner a9ee93ef42 remove dead code: the x86 target never sets usesGlobalOffsetTable,
even on x86-32/elf which uses a GOT.

llvm-svn: 94439
2010-01-25 19:23:04 +00:00
Mon P Wang 586d997e98 Improved widening loads by adding support for wider loads if
the alignment allows.  Fixed a bug where we didn't use a
vector load/store for PR5626.

llvm-svn: 94338
2010-01-24 00:05:03 +00:00
Eric Christopher c1451d764f Don't lower splat vector load to relative to the esp if the
stack may be misaligned.

Update test accordingly.

Patch by Evan Cheng!

llvm-svn: 94291
2010-01-23 06:02:43 +00:00
Dan Gohman d2968c4c12 Fix a typo that Anton noticed.
llvm-svn: 93563
2010-01-15 22:18:15 +00:00
Benjamin Kramer c6fe3c3273 Reimplement getToken and SplitString as "StringRef helper functions"
- getToken is modeled after StringRef::split but it can split on multiple
  separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
  same behaviour as getToken.

llvm-svn: 93161
2010-01-11 18:03:24 +00:00
Jeffrey Yasskin bb857e5d68 Fix http://llvm.org/PR5729: x86-64 tail calls were putting their targets into
R11, and then asserting that the target was in R9.  Since R9 isn't reserved for
the target anymore, and is used as an argument, this patch changes the
assertion.

llvm-svn: 93065
2010-01-09 18:56:43 +00:00
Evan Cheng cc6d56bd3b Fix a critical bug in 64-bit atomic operation lowering for 32-bit. The results of the cmpxchg8b instructions are being thrown away when it branches back to the top of the checking loop. This means the loop always compares against the old value and this can result in a dead lock.
llvm-svn: 93028
2010-01-08 23:41:50 +00:00
Evan Cheng 4bb448c41b Fix comment.
llvm-svn: 93020
2010-01-08 19:14:57 +00:00
Evan Cheng 90dc43fcf5 Fix a minor regression from my dag combiner changes. One more place which needs to look pass truncates.
llvm-svn: 92885
2010-01-07 00:54:06 +00:00
Evan Cheng 166a4e6caa Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))

Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.

This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.

llvm-svn: 92849
2010-01-06 19:38:29 +00:00
Benjamin Kramer d2564e3afb Move remaining stuff to the isInteger predicate.
llvm-svn: 92771
2010-01-05 21:05:54 +00:00
Benjamin Kramer a81a6dff0d Convert a ton of simple integer type equality tests to the new predicate.
llvm-svn: 92760
2010-01-05 20:07:06 +00:00
Evan Cheng 4facc6116a Code refactoring.
llvm-svn: 92694
2010-01-05 06:52:31 +00:00
Evan Cheng 7844a99d60 Perform this folding as a target specific dag combine:
(or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c)

The isel patterns may not catch all the cases if general dag combine has reduced width of source operands.

llvm-svn: 92513
2010-01-04 21:22:48 +00:00
Dan Gohman 0f960aed68 A use by operand 1 or 2 of a SELECT is not a FLAGS use. This
lets the test-elimination work in more conditional-move cases.

llvm-svn: 92508
2010-01-04 20:52:50 +00:00
Benjamin Kramer 6b37c9e6fc Replace a few more SmallVectors with arrays.
llvm-svn: 92265
2009-12-29 16:57:26 +00:00
Bill Wendling 919b7aab2e Add more plumbing. This time in the LowerArguments and "get" functions which
return partial registers. This affected the back-end lowering code some.

Also patch up some places I missed before in the "get" functions.

llvm-svn: 91880
2009-12-22 02:10:19 +00:00
Ken Dyck 798493285c In LowerEXTRACT_VECTOR_ELT, force an i32 value type for PEXTWR instead of
incrementing the simple value type of the 16-bit type, which would give the
wrong type if an intemediate MVT (such as i24) were introduced.

llvm-svn: 91602
2009-12-17 15:31:52 +00:00
Evan Cheng 1be6286028 Re-enable 91381 with fixes.
llvm-svn: 91489
2009-12-16 00:53:11 +00:00
Evan Cheng fcb5453dc7 Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp.
llvm-svn: 91405
2009-12-15 03:07:11 +00:00
Evan Cheng 0e8b9e32d1 Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's.
llvm-svn: 91381
2009-12-15 00:53:42 +00:00
Dan Gohman cecad35728 Fix integer cast code to handle vector types.
llvm-svn: 91362
2009-12-14 23:40:38 +00:00
Dan Gohman 1d459e4937 Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
llvm-svn: 91158
2009-12-11 21:31:27 +00:00