7383cf06ba
Grammar
...
llvm-svn: 109525
2010-07-27 18:36:27 +00:00
317b969ac5
Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself
...
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.
llvm-svn: 109519
2010-07-27 18:02:18 +00:00
2ff0e64bc3
80 column
...
llvm-svn: 109513
2010-07-27 17:38:47 +00:00
7639967e6c
fix typo
...
llvm-svn: 109511
2010-07-27 17:14:29 +00:00
f159085414
recommit simplification (r109502, backed out r109509); seems to innocent
...
llvm-svn: 109510
2010-07-27 16:44:23 +00:00
5f91b7cf3e
back out this too to restore the bots
...
llvm-svn: 109509
2010-07-27 15:56:07 +00:00
ed1d92cb9a
back out r109504, breaks the bots
...
llvm-svn: 109508
2010-07-27 15:18:11 +00:00
7b0a5fd2a5
simplify: CallSite::get --> CallSite constructor
...
llvm-svn: 109506
2010-07-27 15:02:37 +00:00
195a609c37
simplify
...
llvm-svn: 109504
2010-07-27 14:38:38 +00:00
d59498bc97
use ImmutableCallSite for const-corrgoodness
...
llvm-svn: 109503
2010-07-27 14:15:29 +00:00
7527b2ed5c
simplify
...
llvm-svn: 109502
2010-07-27 13:31:22 +00:00
ee68696c5f
Fix silent failure with no input files.
...
llvm-svn: 109500
2010-07-27 11:19:40 +00:00
d359cf2e44
Return -1 only on failure to execute a program.
...
Also fix some comments.
llvm-svn: 109499
2010-07-27 11:19:36 +00:00
fc763867d5
RegionInfo: Add getMaxRegionExit()
...
getMaxRegionExit returns the exit of the maximal refined region starting
at a specific basic block.
llvm-svn: 109496
2010-07-27 08:39:43 +00:00
fd5c8329cf
After updating value handles for RAUW, check that no weak or tracking handles
...
are still on the list. This might happen if a CallbackVH created some new value
handles for the old value when doing RAUW. Barf if it occurs, since it is almost
certainly a mistake.
llvm-svn: 109495
2010-07-27 06:53:14 +00:00
f8270bdb2d
Make MC use Windows COFF on Windows and add tests.
...
llvm-svn: 109494
2010-07-27 06:46:15 +00:00
1bec81a888
Add function to query RegionInfo about loops.
...
* contains(Loop), * getOutermostLoop()
* Improve getNameStr() to return a sensible name, if basic blocks are not named.
llvm-svn: 109490
2010-07-27 04:17:13 +00:00
96a890a7f8
The isLoadFromStackSlot and isStoreToStackSlot have no way of reporting
...
subregister operands like this:
%reg1040:sub_32bit<def> = MOV32rm <fi#-2>, 1, %reg0, 0, %reg0, %reg1040<imp-def>; mem:LD4[FixedStack-2](align=8)
Make them return false when subreg operands are present. VirtRegRewriter is
making bad assumptions otherwise.
This fixes PR7713.
llvm-svn: 109489
2010-07-27 04:17:01 +00:00
c3c05ed02e
Add assertions that expose the PR7713 miscompilation: Accessing a stack slot
...
with a too-big register class.
llvm-svn: 109488
2010-07-27 04:16:58 +00:00
0ff1ef650b
It's better to have the arrays, which would trigger the creation of stack
...
protectors, to be near the stack protectors on the stack. Accomplish this by
tagging the stack object with a predicate that indicates that it would trigger
this. In the prolog-epilog inserter, assign these objects to the stack after the
stack protector but before the other objects.
llvm-svn: 109481
2010-07-27 01:55:19 +00:00
c698417e52
Add SplitEditor to SplitKit. This class will be used to edit live intervals and
...
rewrite instructions for live range splitting.
Still work in progress.
llvm-svn: 109469
2010-07-26 23:44:11 +00:00
c2af77f510
Fix a use-after-free.
...
llvm-svn: 109468
2010-07-26 23:40:24 +00:00
fa60b0ee51
Using llvm.eh.catch.all.value instead of .llvm.eh.catch.all.value.
...
llvm-svn: 109462
2010-07-26 22:36:52 +00:00
f902befe8e
And a bit more non-ASCII stuff.
...
llvm-svn: 109458
2010-07-26 22:28:18 +00:00
1e0d76bfd1
Drop some non-ascii stuff
...
llvm-svn: 109456
2010-07-26 22:23:07 +00:00
f23a06c2e4
Don't call __register_frame from the JIT on systems that use setjmp/longjmp
...
exception handling. Also fix an extra underscore typo in one instance of
"__ARM_EABI__". Radar 8236264.
llvm-svn: 109451
2010-07-26 21:58:00 +00:00
d4218b8793
On x86, f32 / f64 nodes share the same registers as 128-bit vector values.
...
llvm-svn: 109450
2010-07-26 21:50:05 +00:00
e6d6c5dd11
The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling.
...
llvm-svn: 109449
2010-07-26 21:49:07 +00:00
b61a6f2742
Add a note
...
llvm-svn: 109448
2010-07-26 21:48:35 +00:00
36c2ea6c7a
Temporary hack to let codegen assert or generate poor code in case
...
we are using AVX and no AVX version of the desired intruction is present,
this is better for incremental dev (without fallbacks it's easier to spot
what's missing). Not sure this is the best hack thought (we can also disable
all HasSSE* predicates by dinamically marking them 'false' if AVX is present)
llvm-svn: 109434
2010-07-26 21:01:18 +00:00
aa7f66ba67
Add an initial implementation of LazyValueInfo updating for JumpThreading. Disabled for now.
...
llvm-svn: 109424
2010-07-26 18:48:03 +00:00
6bcea068db
Currently EH lowering code expects typeinfo to be global only.
...
This assumption is not satisfied due to global mergeing.
Workaround the issue by temporary disablinge mergeing of const globals.
Also, ignore LLVM "special" globals. This fixes PR7716
llvm-svn: 109423
2010-07-26 18:45:39 +00:00
23b05d1cf5
ARM fastisel isn't ready.
...
llvm-svn: 109421
2010-07-26 18:32:55 +00:00
cd83870faf
Fix SCEVExpander::visitAddRecExpr so that it remembers the induction variable
...
it inserted rather than using LoopInfo::getCanonicalInductionVariable to
rediscover it, since that doesn't work on non-canonical loops. This fixes
infinite recurrsion on such loops; PR7562.
llvm-svn: 109419
2010-07-26 18:28:14 +00:00
2810bacafb
Handle Values with no value in getCopyFromRegs.
...
llvm-svn: 109415
2010-07-26 18:15:41 +00:00
0141c13b22
Remove LCSSA's bogus dependence on LoopSimplify and LoopSimplify's bogus
...
dependence on DominanceFrontier. Instead, add an explicit DominanceFrontier
pass in StandardPasses.h to ensure that it gets scheduled at the right
time.
Declare that loop unrolling preserves ScalarEvolution, and shuffle some
getAnalysisUsages.
This eliminates one LoopSimplify and one LCCSA run in the standard
compile opts sequence.
llvm-svn: 109413
2010-07-26 18:11:16 +00:00
a7908ae369
Preserve ScalarEvolution in the loop unroller.
...
llvm-svn: 109412
2010-07-26 18:02:06 +00:00
accaca5604
Fix (at least) quadratic worst-case complexity in DominanceFrontier::splitBlock:
...
don't visit all blocks in the function, and don't iterate over the split blocks'
predecessor lists for each block visited.
Also, remove the special-case test for the entry block. Splitting the entry
block isn't common enough to make this worthwhile.
This fixes a major compile-time bottleneck which is exposed now that
LoopSimplify isn't being redundantly run both before and after
DominanceFrontier.
llvm-svn: 109408
2010-07-26 17:55:15 +00:00
30005444fe
Avoid copying and recopying a std::set.
...
llvm-svn: 109405
2010-07-26 17:45:33 +00:00
2307c4bb76
Exit a search loop when the search goal is found.
...
llvm-svn: 109404
2010-07-26 17:41:45 +00:00
45af0ad182
Fix formatting.
...
llvm-svn: 109403
2010-07-26 17:39:33 +00:00
f9da3c3b88
A block dominates itself, by definition.
...
llvm-svn: 109402
2010-07-26 17:38:15 +00:00
65b257c9d2
Use DominatorTree::properlyDominates instead of dominates with an
...
explicit inequality check.
llvm-svn: 109401
2010-07-26 17:37:36 +00:00
31f73ef210
A block dominates itself, by definition.
...
llvm-svn: 109400
2010-07-26 17:35:32 +00:00
b3aa6c7110
Use DominatorTree::properlyDominates instead of dominates with an
...
explicit inequality check.
llvm-svn: 109398
2010-07-26 17:34:05 +00:00
136a6f0dbb
Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parameter)
...
may be used uninitialized in the callers of HighRegPressure.
llvm-svn: 109393
2010-07-26 07:54:17 +00:00
675b162512
Fix format-specifier warning
...
llvm-svn: 109391
2010-07-26 03:55:44 +00:00
c21293792e
MC: Fix whitespace error from last commit.
...
A Visual C++ extension that removes trailing new lines? Seriously?
llvm-svn: 109390
2010-07-26 03:01:28 +00:00
b5fc138547
MC: Add WinCOFFObjectWriter implementation.
...
Origonal Windows COFF implementation by Nathan Jedffords.
llvm-svn: 109389
2010-07-26 02:17:32 +00:00
2e3f20b9aa
Factored out a bit of common code to mark VNInfos for deletion.
...
llvm-svn: 109388
2010-07-26 01:49:41 +00:00
5aaf677a37
Reduce string trashing.
...
llvm-svn: 109386
2010-07-25 23:18:32 +00:00
8ae3ecad2b
Add comments.
...
llvm-svn: 109383
2010-07-25 18:59:43 +00:00
8f452bc291
Remove extraneous semicolon
...
llvm-svn: 109373
2010-07-25 17:34:42 +00:00
8fcfe7aa51
Unbreak CMake build
...
llvm-svn: 109372
2010-07-25 17:10:14 +00:00
280ce9984e
Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on
...
those. Radar 8231572.
llvm-svn: 109367
2010-07-25 05:34:27 +00:00
6cf5141824
Revert r109361; it's impossible to write a call with an argument with an
...
invalid type.
llvm-svn: 109365
2010-07-24 23:06:59 +00:00
9d9e4a83b5
Minor simplification.
...
llvm-svn: 109362
2010-07-24 23:00:59 +00:00
261c211089
Make the ll parser check that arguments have valid types.
...
llvm-svn: 109361
2010-07-24 23:00:26 +00:00
5f6112450f
PR7704: A function is not allowed to return a function; make sure to enforce
...
this consistently.
llvm-svn: 109360
2010-07-24 22:58:04 +00:00
19edda0323
Hook in GlobalMerge pass
...
llvm-svn: 109359
2010-07-24 21:52:08 +00:00
7bc0443f2b
Revert this because we can't clone cyclic MDNodes which are creating during a
...
build of llvm-gcc.
llvm-svn: 109355
2010-07-24 20:54:02 +00:00
3c8eb80d93
Add hook to insert late LLVM=>LLVM passes just before isel
...
llvm-svn: 109354
2010-07-24 20:48:54 +00:00
14b69d59dd
Whether function-local or not, a MDNode may reference a Function in which case
...
it needs to be mapped to refer to the function in the new module, not the old
one. Fixes PR7700.
llvm-svn: 109353
2010-07-24 19:43:25 +00:00
3bc93c2f2f
Clarify that if a new value handle is added while dropping value handles
...
hanging off a value, then the dropping code will intentionally not drop
it too (since this is almost certainly a bug).
llvm-svn: 109337
2010-07-24 12:09:22 +00:00
56c006561c
Change ScheduleDAGInstrs::Defs and ::Uses to be variable-size vectors
...
instead of fixed size arrays, so that increasing FirstVirtualRegister to 16K
won't cause a compile time performance regression.
llvm-svn: 109330
2010-07-24 06:01:53 +00:00
498877d055
Use current working directory when Dirname is empty. This only happens when absolute source file path is used on compiler command line.
...
llvm-svn: 109302
2010-07-24 00:53:22 +00:00
37b740c4bf
Add an ILP scheduler. This is a register pressure aware scheduler that's
...
appropriate for targets without detailed instruction iterineries.
The scheduler schedules for increased instruction level parallelism in
low register pressure situation; it schedules to reduce register pressure
when the register pressure becomes high.
On x86_64, this is a win for all tests in CFP2000. It also sped up 256.bzip2
by 16%.
llvm-svn: 109300
2010-07-24 00:39:05 +00:00
306a1f9721
Support x86 "eiz" and "riz" pseudo index registers in the assembler.
...
llvm-svn: 109295
2010-07-24 00:06:39 +00:00
0acbcb1a60
Use the appropriate register class for an i32 when adding ARM::LR to the
...
function live in set. This will give us tGPR for Thumb1 and GPR otherwise,
so the copy will be spillable. rdar://8224931
llvm-svn: 109293
2010-07-23 23:50:35 +00:00
ba4b1909ce
Remove too-strict assertion. We may want the vreg copy of the physical register
...
to be of a different register class. For example, in Thumb1 if the live-in is
a high register, we want the vreg to be a low register. rdar://8224931
llvm-svn: 109291
2010-07-23 23:48:02 +00:00
28499f76c9
Revert r109262.
...
llvm-svn: 109285
2010-07-23 23:04:41 +00:00
c17dd5790b
Revert 109076. It is wrong and was causing regressions. Add some
...
comments explaining why it was wrong. 8225024.
Fix the real problem in 8213383: the code that splits very large
blocks when no other place to put constants can be found was not
considering the case that the block contained a Thumb tablejump.
llvm-svn: 109282
2010-07-23 22:50:23 +00:00
df907f4594
- Allow target to specify when is register pressure "too high". In most cases,
...
it's too late to start backing off aggressive latency scheduling when most
of the registers are in use so the threshold should be a bit tighter.
- Correctly handle live out's and extract_subreg etc.
- Enable register pressure aware scheduling by default for hybrid scheduler.
For ARM, this is almost always a win on # of instructions. It's runtime
neutral for most of the tests. But for some kernels with high register
pressure it can be a huge win. e.g. 464.h264ref reduced number of spills by
54 and sped up by 20%.
llvm-svn: 109279
2010-07-23 22:39:59 +00:00
d65cd1d581
Remove trailing whitespace
...
llvm-svn: 109276
2010-07-23 22:15:26 +00:00
7038bd5c1a
Eliminate getCanonicalInductionVariableIncrement's last user and
...
eliminate it.
llvm-svn: 109270
2010-07-23 21:34:51 +00:00
acafc61023
Simplify this code; it can use the regular CFG utlities rather than
...
the BlockTraits abstractions.
llvm-svn: 109268
2010-07-23 21:25:16 +00:00
5ae3102459
Micro-optimize SCEVComplexityCompare.
...
llvm-svn: 109267
2010-07-23 21:20:52 +00:00
992db006d0
Add a const qualifier.
...
llvm-svn: 109266
2010-07-23 21:18:55 +00:00
55e244698a
Use the proper type for shift counts. This fixes a bootstrap error.
...
llvm-svn: 109265
2010-07-23 21:08:12 +00:00
3032354bbe
IF directory name is empty then try to extract one using absolute file name.
...
llvm-svn: 109262
2010-07-23 20:36:13 +00:00
ea0e05a3ce
Add AVX version of CLMUL instructions
...
llvm-svn: 109248
2010-07-23 18:41:12 +00:00
0818684a70
DAGCombine (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
...
are not demanded. This often allows the anyext to be folded away.
llvm-svn: 109242
2010-07-23 18:03:30 +00:00
2e00e3b12d
Make SDNode::dump() print a newline at the end.
...
llvm-svn: 109234
2010-07-23 16:37:47 +00:00
4ad7271798
fix constness warnings
...
llvm-svn: 109224
2010-07-23 13:28:47 +00:00
a1e9c98302
do not (implicitly) dereference iterator many times, cache it instead
...
llvm-svn: 109222
2010-07-23 10:23:01 +00:00
dc0a05df55
Formatting.
...
llvm-svn: 109216
2010-07-23 04:19:34 +00:00
1e5d7c6e82
Get rid of exceptions in llvmc.
...
llvmc can be now compiled with llvm-gcc on Windows.
llvm-svn: 109215
2010-07-23 03:42:55 +00:00
d618c8ac64
Declare CLMUL as a subtarget feature
...
llvm-svn: 109207
2010-07-23 01:22:45 +00:00
09dc24beac
Add x86 CLMUL (Carry-less multiplication) cpu feature
...
llvm-svn: 109206
2010-07-23 01:17:51 +00:00
faf5c76114
80-col.
...
llvm-svn: 109205
2010-07-23 01:05:59 +00:00
acd9230b1b
Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual
...
llvm-svn: 109204
2010-07-23 00:54:35 +00:00
f2d75670b7
The only supported calling convention for X86-64 uses
...
SSE, so we can't return floating point values if this
is disabled. Detect this error for clang.
With SSE1 only, f64 is a problem; it can be done, but
neither llvm-gcc nor clang has ever generated correct
code for it. Since nobody noticed this I think it's
OK to treat it as an error for now.
This also handles SSE-sized vectors of floating point.
8207686, 8204109.
llvm-svn: 109201
2010-07-23 00:30:35 +00:00
e29e389678
Fix some AVX instructions which didnt had HasAVX prefix. And also a problem with PINSRW, which was totally wrong because of a typo I introduced previously
...
llvm-svn: 109198
2010-07-23 00:14:54 +00:00
749ca32da1
eliminate the TargetInstrInfo::GetInstSizeInBytes hook.
...
ARM/PPC/MSP430-specific code (which are the only targets that
implement the hook) can directly reference their target-specific
instrinfo classes.
llvm-svn: 109171
2010-07-22 21:27:00 +00:00
aba8ee38c2
remove the dwarf sizing stuff which is now dead, it was
...
"yet another" copy of the dwarf EH emission code that was
copied, pasted and slightly hacked up.
llvm-svn: 109169
2010-07-22 21:20:39 +00:00
0710c74f29
Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step
...
llvm-svn: 109168
2010-07-22 21:18:49 +00:00
8f3adc9057
remove the JIT "NeedsExactSize" feature and supporting logic.
...
llvm-svn: 109167
2010-07-22 21:17:55 +00:00
dab6888bb1
switch a private implementation of GetFunctionSizeInBytes.
...
This is probably not the best way to implement "Force LR to
be spilled if the Thumb function size is > 2048." do this,
it should use the branch shortening infrastructure, but I'm
just preserving functionality here.
llvm-svn: 109165
2010-07-22 21:14:33 +00:00
b3f608bbba
X86MCInstLower now depends on AsmPrinter being around.
...
llvm-svn: 109154
2010-07-22 21:10:04 +00:00
083be4d384
instead of migrating it to the MC instruction encoder, just
...
rip out the implementation of X86InstrInfo::GetInstSizeInBytes.
The code being ripped out just implemented a copy and hacked up
version of the (old) instruction encoder, and is buggy and
terrible in other ways. Since "GetInstSizeInBytes" is really
only there to support the JIT's "NeedsExactSize" hook (which
noone is using), just rip out the code. I will rip out the
NeedsExactSize hook next.
This resolves rdar://7617809 - switch X86InstrInfo::GetInstSizeInBytes to use X86MCCodeEmitter
llvm-svn: 109149
2010-07-22 21:05:13 +00:00
5fa3813329
Speculatively revert 109117
...
llvm-svn: 109132
2010-07-22 18:44:00 +00:00
ff66cd43c4
ARMv4 JIT forgets to set the lr register when making a indirect function call. Fixes PR7608
...
llvm-svn: 109125
2010-07-22 17:28:34 +00:00
59f9970ba5
keep in 80 cols
...
llvm-svn: 109122
2010-07-22 17:18:03 +00:00
fac440cfb6
Map MDNode correctly.
...
A non function local MDNode can have an operand which is cloned by MapValue().
llvm-svn: 109117
2010-07-22 16:35:00 +00:00
1a2da423c9
use cascading operator-> feature
...
llvm-svn: 109104
2010-07-22 13:49:27 +00:00
dde79d8f1a
mass elimination of reliance on automatic iterator dereferencing
...
llvm-svn: 109103
2010-07-22 13:36:47 +00:00
84012a93ef
simplify
...
llvm-svn: 109101
2010-07-22 13:07:39 +00:00
b8686360a1
do not access arguments via low-level interface, do not multiply dereference use_iterators
...
llvm-svn: 109100
2010-07-22 13:04:32 +00:00
10bb1f5462
pass dereferenced iterator to dyn_cast
...
llvm-svn: 109099
2010-07-22 11:48:35 +00:00
36f25dfd33
pass dereferenced iterator to dyn_cast
...
llvm-svn: 109098
2010-07-22 11:43:44 +00:00
d9f48ecb2e
use -> instead of (*).
...
llvm-svn: 109094
2010-07-22 11:12:32 +00:00
07c8ad54da
cache dereferenced iterator
...
llvm-svn: 109093
2010-07-22 11:07:46 +00:00
3e44ea1917
undo 80 column trespassing I caused
...
llvm-svn: 109092
2010-07-22 10:37:47 +00:00
a1d7516cb7
Mark an assert-only variable as used.
...
llvm-svn: 109091
2010-07-22 08:02:25 +00:00
2f8db38bb3
Fix the generated file name for CMake.
...
llvm-svn: 109090
2010-07-22 08:00:52 +00:00
336734aca6
Add new RegionInfo pass.
...
The RegionInfo pass detects single entry single exit regions in a function,
where a region is defined as any subgraph that is connected to the remaining
graph at only two spots.
Furthermore an hierarchical region tree is built.
Use it by calling "opt -regions analyze" or "opt -view-regions".
llvm-svn: 109089
2010-07-22 07:46:31 +00:00
3180f9f55f
Attempt to fix linking issues with CMake. Please review other CMake users,
...
especially on other platforms. Is there a better way to fix this.
llvm-svn: 109084
2010-07-22 06:27:45 +00:00
bf32e54bac
Re-apply r109079 with fix.
...
llvm-svn: 109083
2010-07-22 06:24:48 +00:00
6c55cccf87
Revert r109079, which broke a lot of CodeGen tests.
...
llvm-svn: 109082
2010-07-22 06:01:28 +00:00
14646cc074
Update CMake files.
...
llvm-svn: 109081
2010-07-22 06:00:01 +00:00
d85e3c5a86
Initial modifications to MCAssembler and TargetMachine for the MCJIT.
...
Patch by Olivier Meurant!
llvm-svn: 109080
2010-07-22 05:58:53 +00:00
bd81bff672
Initialize RegLimit only when register pressure is being tracked.
...
llvm-svn: 109079
2010-07-22 05:18:41 +00:00
9a77382685
Custom lower the memory barrier instructions and add support
...
for lowering without sse2. Add a couple of new testcases.
Fixes a few libgomp tests and latent bugs. Remove a few todos.
llvm-svn: 109078
2010-07-22 02:48:34 +00:00
3fabe07d4c
Fix constant island pass's handling of tBR_JTr. The offset of the instruction does not have to be 4-byte aligned. Rather, it's the offset + 2 that must be aligned since the instruction expands into:
...
mov pc, r1
.align 2
LJTI0_0_0:
.long LBB0_14
This fixes rdar://8213383. No test case since it's not possible to come up with a suitable small one.
llvm-svn: 109076
2010-07-22 02:09:47 +00:00
a4c435f1fa
80-columns.
...
llvm-svn: 109070
2010-07-22 00:26:08 +00:00
68a069a188
Make fast isel win64-aware w.r.t. call-clobbered regs
...
llvm-svn: 109069
2010-07-22 00:09:39 +00:00
285903853f
More register pressure aware scheduling work.
...
llvm-svn: 109064
2010-07-21 23:53:58 +00:00
e3acfd4d58
Add more 256-bit forms for a bunch of regular AVX instructions
...
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)
llvm-svn: 109063
2010-07-21 23:53:50 +00:00
2637cc1a38
Make NamedMDNode not be a subclass of Value, and simplify the interface
...
for creating and populating NamedMDNodes.
llvm-svn: 109061
2010-07-21 23:38:33 +00:00
350b1a449f
Fixes win64. It was broken by a previous patch where I missed the !isWin64
...
and then forced every register to be a vr128 on win64.
llvm-svn: 109060
2010-07-21 23:19:57 +00:00
ac4a1ede17
Add INSTANTIATE_AG_PASS, which combines RegisterPass<> with RegisterAnalysisGroup<> for pass registration.
...
llvm-svn: 109058
2010-07-21 23:07:00 +00:00
965a73a28c
For ARM/Darwin, add a dwarf entry indicating whether a function is arm or thumb
...
rdar://8202967
llvm-svn: 109057
2010-07-21 23:03:52 +00:00
5c91a5e747
add some rough support for making mcinst lowering work without an
...
asmprinter or mangler around. This is option #B for killing off
X86InstrInfo::GetInstSizeInBytes. Option #A (killing
"needsexactsize") was sent for consideration to llvmdev.
llvm-svn: 109056
2010-07-21 23:03:35 +00:00
84bdfd80df
Baby steps towards ARM fast-isel.
...
llvm-svn: 109047
2010-07-21 22:26:11 +00:00
a57b97e7e7
Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
...
llvm-svn: 109045
2010-07-21 22:09:45 +00:00
6238c1d102
Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it
...
llvm-svn: 109039
2010-07-21 21:37:59 +00:00
6cd0deb997
tidy up.
...
llvm-svn: 109038
2010-07-21 21:36:25 +00:00
a8683bb033
80 column and trailing whitespace cleanup
...
llvm-svn: 109037
2010-07-21 21:21:52 +00:00
47dc8fd67a
Add some debug output to help diagnose PR7689.
...
llvm-svn: 109036
2010-07-21 21:18:37 +00:00
784e062b2a
Fix a couple issues with Win64 ABI
...
1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing
Still to look into:
xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.
llvm-svn: 109035
2010-07-21 20:49:52 +00:00
19b3830142
Avoid AVX instructions to be selected instead of its SSE form
...
llvm-svn: 109032
2010-07-21 20:38:42 +00:00
477498f3d7
NamedMDNode is never an operand.
...
llvm-svn: 109031
2010-07-21 20:25:43 +00:00
093cb79d4b
Disallow null as a named metadata operand.
...
Make MDNode::destroy private.
Fix the one thing that used MDNode::destroy, outside of MDNode itself.
One should never delete or destroy an MDNode explicitly. MDNodes
implicitly go away when there are no references to them (implementation
details aside).
llvm-svn: 109028
2010-07-21 18:54:18 +00:00
846b9e15db
Use TrackingVH instead of WeakVH for NamedMDNode's operands, since nodes
...
referenced by NamedMDNodes shouldn't be deleted.
llvm-svn: 109021
2010-07-21 18:01:42 +00:00
2b68cc68ed
Tidy.
...
llvm-svn: 109020
2010-07-21 17:53:53 +00:00
845b14ef66
Move the smarts of AnalysisGroup registration into PassRegistry.
...
llvm-svn: 109019
2010-07-21 17:52:45 +00:00
4277e14dc4
Fix calling convention on ARM if vfp2+ is enabled.
...
llvm-svn: 109009
2010-07-21 11:38:30 +00:00
d27913e516
Pulling out previous patch, must've run the tests in
...
the wrong directory.
llvm-svn: 109005
2010-07-21 09:23:56 +00:00
b2d1067024
Lower MEMBARRIER on x86 and support processors without SSE2.
...
Fixes a pile of libgomp failures in the llvm-gcc testsuite due
to the libcall not existing.
llvm-svn: 109004
2010-07-21 09:05:23 +00:00
bdafcc633d
Changed OStream templates to functions on raw_ostream, removed the unused "renderWarnings" function.
...
llvm-svn: 109003
2010-07-21 09:02:06 +00:00
cdbec62510
Add AVX only vzeroall and vzeroupper instructions
...
llvm-svn: 109002
2010-07-21 08:56:24 +00:00
a77f3d3b37
Teach bottom up pre-ra scheduler to track register pressure. Work in progress.
...
llvm-svn: 108991
2010-07-21 06:09:07 +00:00
3499934da6
Add new AVX vpermilps, vpermilpd and vperm2f128 instructions
...
llvm-svn: 108984
2010-07-21 03:07:42 +00:00
3ceaf7a0a2
Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it
...
llvm-svn: 108983
2010-07-21 02:46:58 +00:00
a2489d1bb6
Give MDNode printing has access to the current Module in more
...
cases. This will be needed when function-local metadata can
appear in places that aren't intrinsic function arguments.
llvm-svn: 108971
2010-07-20 23:55:01 +00:00
0fef9dda8e
Change the createSpiller interface to take a MachineFunctionPass argument.
...
The spillers can pluck the analyses they need from the pass reference.
Switch some never-null pointers to references.
llvm-svn: 108969
2010-07-20 23:50:15 +00:00
afbe4a7a10
Make this code a little more readable.
...
llvm-svn: 108968
2010-07-20 23:49:44 +00:00
7373bd9973
Use DebugLocs instead of MDNodes.
...
llvm-svn: 108967
2010-07-20 23:49:05 +00:00
7fc9fe7553
Move the handling of PassRegistrationListener's to PassRegistry.
...
llvm-svn: 108966
2010-07-20 23:41:56 +00:00
e706501975
Add new AVX vextractf128 instructions
...
llvm-svn: 108964
2010-07-20 23:19:02 +00:00
b22dd85bb3
Fix a typo.
...
llvm-svn: 108962
2010-07-20 23:10:36 +00:00
5c2e65b7bf
Don't look up the "dbg" metadata kind by name.
...
llvm-svn: 108961
2010-07-20 23:09:34 +00:00
41ff5d4d91
make asmprinter optional, even though passing in null will cause things to explode right now.
...
llvm-svn: 108955
2010-07-20 22:45:33 +00:00
b4dc58975b
continue pushing dependencies around.
...
llvm-svn: 108952
2010-07-20 22:35:40 +00:00
2366d95af9
reduce X86MCInstLower dependencies on asmprinter.
...
llvm-svn: 108950
2010-07-20 22:30:53 +00:00
7fbdd7c852
pass around MF, not MMI.
...
llvm-svn: 108949
2010-07-20 22:26:07 +00:00
48a995f7e9
Rename removeAllMetadata to clearMetadataHashEntries and simplify
...
it to just do the things that need to be done when an instruction
is deleted.
llvm-svn: 108948
2010-07-20 22:25:04 +00:00
d3f3a89425
cleanups.
...
llvm-svn: 108947
2010-07-20 22:23:57 +00:00
5ca516b87c
move two asmprinter methods into the asmprinter .cpp file.
...
llvm-svn: 108945
2010-07-20 22:18:19 +00:00
ed4075cc3b
Implement loop splitting analysis.
...
Determine which loop exit blocks need a 'pre-exit' block inserted.
Recognize when this would be impossible.
llvm-svn: 108941
2010-07-20 21:46:58 +00:00
43aa8f03c1
Add support for remapping metadata kind IDs when reading in a
...
bitcode file, so that two bitcode files where the same metadata kind
name happens to have been assigned a different ID can still be
linked together.
Eliminate the restriction that metadata kind IDs can't be 0.
Change MD_dbg from 1 to 0, because we can now, and because it's
less mysterious that way.
llvm-svn: 108939
2010-07-20 21:42:28 +00:00
6e5ec6263e
Fix test for switch statements and increase
...
threshold a bit per experimentation.
llvm-svn: 108935
2010-07-20 21:29:12 +00:00
4154061b92
Move more functionality from Pass.cpp to PassRegistry.cpp. This global will go away eventually, but for now we still need it around.
...
llvm-svn: 108932
2010-07-20 21:22:24 +00:00
cbe9856fce
prune #includes a little.
...
llvm-svn: 108929
2010-07-20 21:17:29 +00:00
a8f6c1cc26
Add some more handlers for ELF section directives.
...
llvm-svn: 108928
2010-07-20 21:12:46 +00:00
47a0f0d56f
Remove setDbgMetadata and getDbgMetadata; their users have been
...
replaced with setDebugLoc and getDebugLoc.
llvm-svn: 108914
2010-07-20 20:18:21 +00:00
14d74d649a
Let's get those buildbots green: #include is needed in the header, not just the implementation.
...
llvm-svn: 108912
2010-07-20 20:16:11 +00:00
d2c7e52d05
Use getDebugLoc and setDebugLoc instead of getDbgMetadata and setDbgMetadata,
...
avoiding MDNode overhead.
llvm-svn: 108909
2010-07-20 20:09:07 +00:00
073660336c
apparently also missing an include.
...
llvm-svn: 108908
2010-07-20 20:06:19 +00:00
4e8e93f142
this is in System
...
llvm-svn: 108895
2010-07-20 19:54:01 +00:00
3b505848fd
Add new AVX instruction vinsertf128
...
llvm-svn: 108892
2010-07-20 19:44:51 +00:00
6faea9668f
turn this into a normal header.
...
llvm-svn: 108891
2010-07-20 19:43:19 +00:00
55cdb62dd0
hopefully heal the linux builders
...
llvm-svn: 108890
2010-07-20 19:40:51 +00:00
660466ed42
I just fail with SVN today.
...
llvm-svn: 108888
2010-07-20 19:23:55 +00:00
91773ea9b2
there is no reason to dynamically generate a static header.
...
llvm-svn: 108887
2010-07-20 18:59:58 +00:00
7e52a45f8a
drop edinfo.inc into the objdir for src!=objdir builds.
...
llvm-svn: 108886
2010-07-20 18:53:27 +00:00
529989b8b6
Update header.
...
llvm-svn: 108883
2010-07-20 18:46:43 +00:00
1e8ae64f83
Convert the internal PassRegistrar class into a new, external PassRegistry class. No intended functionality change at this point.
...
llvm-svn: 108877
2010-07-20 18:39:06 +00:00
79d68ddda8
hopefully teach cmake to build the .inc file.
...
llvm-svn: 108874
2010-07-20 18:33:21 +00:00
6219596ff6
cmake too
...
llvm-svn: 108872
2010-07-20 18:30:37 +00:00
3a14721829
forgot to add a file
...
llvm-svn: 108870
2010-07-20 18:29:50 +00:00
979634bbb0
start straightening out libedis's dependencies and make it fit
...
better in the llvm world. Among other things, this changes:
1. The guts of libedis are now moved into lib/MC/MCDisassembler
2. llvm-mc now depends on lib/MC/MCDisassembler, not tools/edis,
so edis and mc don't have to be built in series.
3. lib/MC/MCDisassembler no longer depends on the C api, the C
API depends on it.
4. Various code cleanup changes.
There is still a lot to be done to make edis fit with the llvm
design, but this is an incremental step in the right direction.
llvm-svn: 108869
2010-07-20 18:25:19 +00:00
12725c7d46
Remember that the induction variable is always a PHINode and
...
use getIncomingValueForBlock instead of
LoopInfo::getCanonicalInductionVariableIncrement.
llvm-svn: 108865
2010-07-20 17:18:52 +00:00
625fd2292d
Fix SCEV denormalization of expressions where the exit value from
...
one loop is involved in the increment of an addrec for another
loop. This fixes rdar://8168938.
llvm-svn: 108863
2010-07-20 17:06:20 +00:00
3183ef1120
Pull out r108755. After offline discussion with Chris, we're going to go a different direction with this.
...
llvm-svn: 108856
2010-07-20 16:55:05 +00:00
46f00a25f9
Add a fast path for x - x.
...
llvm-svn: 108855
2010-07-20 16:53:00 +00:00
31158756e4
Simplify this code; LoopInfo::getCanonicalInductionVariable will only
...
find integer induction variables.
llvm-svn: 108853
2010-07-20 16:46:58 +00:00
4fd92434f1
Make getOrInsertCanonicalInductionVariable guarantee that its
...
result is a PHINode*.
llvm-svn: 108852
2010-07-20 16:44:52 +00:00
191f2e4dbd
Change an argument from an Instruction* to a Value*, which is all
...
that is needed here.
llvm-svn: 108850
2010-07-20 16:34:50 +00:00
d1488fd8bc
Minor code cleanups.
...
llvm-svn: 108848
2010-07-20 16:32:11 +00:00
ff095507e3
Appease the colonials.
...
llvm-svn: 108845
2010-07-20 16:12:37 +00:00
3680f70c9d
Using BIC for immediates needs an extra bump for its complexity to get
...
instruction selection to prefer it when possible. rdar://7903972
llvm-svn: 108844
2010-07-20 16:07:04 +00:00
36d12c679d
Beginning SplitKit - utility classes for live range splitting.
...
This is a work in progress. So far we have some basic loop analysis to help
determine where it is useful to split a live range around a loop.
The actual loop splitting code from Splitter.cpp is also going to move in here.
llvm-svn: 108842
2010-07-20 15:41:07 +00:00
9c7708cc1b
Removed un-used code.
...
llvm-svn: 108841
2010-07-20 14:51:32 +00:00
31dfb75b52
Updated css classes for the pressure table legend.
...
llvm-svn: 108839
2010-07-20 14:35:55 +00:00
2ff2193a80
Oops - I tables render poorly in Chrome without this explicit height specification.
...
llvm-svn: 108824
2010-07-20 10:29:46 +00:00
a475ab7f02
Use run-length encoding to represent identical adjacent cells in the pressure
...
and interval table. Reduces output HTML file sizes by ~80% in my test cases.
Also fix access of private member type by << operator.
llvm-svn: 108823
2010-07-20 10:18:54 +00:00
716b184108
Added support for turning HTML indentation on and off (indentation off by default).
...
Reduces output file size ~20% on my test cases.
llvm-svn: 108822
2010-07-20 09:13:29 +00:00
160695fecb
Fix PR7174, a couple o Mips fixes:
...
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.
Patch by stetorvs@gmail.com
llvm-svn: 108820
2010-07-20 08:37:04 +00:00
81781220d2
Speculatively revert r108813, in an attempt to get the self-host buildbots working again. I don't see why this patch
...
would cause them to fail the way they are, but none of the other intervening patches seem likely either.
llvm-svn: 108818
2010-07-20 08:26:15 +00:00
ea7863647b
Fix Mips PR7473. Patch by stetorvs@gmail.com
...
llvm-svn: 108816
2010-07-20 07:58:51 +00:00
a93fe2de3c
Switched to rendering after allocation (but before rewriting) in PBQP.
...
Updated renderer to use allocation information from VirtRegMap (if
available) to render spilled intervals differently.
llvm-svn: 108815
2010-07-20 07:41:44 +00:00
8dc129325f
Reapply r108794, a fix for the failing test from last time.
...
llvm-svn: 108813
2010-07-20 06:52:42 +00:00
4adaccf0bf
Constify some arguments.
...
llvm-svn: 108812
2010-07-20 06:52:21 +00:00
4a35d6f8cd
Revert r108794, "Separate PassInfo into two classes: a constructor-free
...
superclass (StaticPassInfo) and a constructor-ful subclass (PassInfo).", it is
breaking teh everything.
llvm-svn: 108805
2010-07-20 03:06:07 +00:00
e7c5fe586a
Separate PassInfo into two classes: a constructor-free superclass (StaticPassInfo) and a constructor-ful subclass (PassInfo).
...
llvm-svn: 108794
2010-07-20 01:19:58 +00:00
3ff13affda
Minor code simplification.
...
llvm-svn: 108793
2010-07-20 00:57:18 +00:00
08645f1991
Don't hoist things out of a large switch inside a
...
loop, for the reasons in the comments. This is a
major win on 253.perlbmk on ARM Darwin. I expect it
to be a good heuristic in general, but it's possible
some things will regress; I'll be watching.
7940152
2010-07-20 00:50:13 +00:00
14c5fd437c
Add AVX vbroadcast new instruction
...
llvm-svn: 108788
2010-07-20 00:11:13 +00:00
0aff8033c6
Update CMake files.
...
llvm-svn: 108787
2010-07-20 00:08:13 +00:00
61475c5c3c
Correct line info for declarations/definitions. Radar 8063111.
...
llvm-svn: 108784
2010-07-19 23:56:30 +00:00
b792b463af
sink the arm implementations of ASmPrinter and MCInstLower
...
out of the AsmPrinter directory into libarm. Now the
ARM InstPrinters depend jsut on the MC stuff, not on vmcore
or codegen.
llvm-svn: 108783
2010-07-19 23:44:46 +00:00
64fffadad3
fix a layering problem by moving the x86 implementation
...
of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory. Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.
llvm-svn: 108782
2010-07-19 23:41:57 +00:00
9de0ca73d4
Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
...
llvm-svn: 108769
2010-07-19 23:32:44 +00:00
d61b735d25
Fix memory leak reported by valgrind.
...
Do not visit operands of old instruction. Visit all operands of new instruction.
llvm-svn: 108767
2010-07-19 23:25:39 +00:00
b5e918dc05
After a custom inserter, in a block which has constant instructions,
...
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
llvm-svn: 108765
2010-07-19 22:48:56 +00:00
10f99a3490
ARM has to provide its own TargetLowering::findRepresentativeClass because its scalar floating point registers alias its vector registers.
...
llvm-svn: 108761
2010-07-19 22:15:08 +00:00
0edf6a1131
Change the implemented interfaces list on PassInfo from a std::vector to a manually implemented
...
linked list. This is a little slower and involves more malloc'ing, but these lists are
typically short, and it allows PassInfo to be entirely constant initializable.
llvm-svn: 108755
2010-07-19 21:44:48 +00:00
6b4391aa69
MC/Mach-O: Silently ignore .file directives instead of error'ing out on
...
them. They aren't important enough to abort the entire assembly, and failing
early makes testing more annoying.
llvm-svn: 108747
2010-07-19 20:44:20 +00:00
9db7d0addd
X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same
...
instruction, we only want to allow the one for the current subtarget.
- This also fixes suffix matching for jmp instructions, because it eliminates
the ambiguity between 'jmpl' and 'jmpq'.
llvm-svn: 108746
2010-07-19 20:44:16 +00:00
84774eda4b
Tweak per Chris' comments.
...
llvm-svn: 108736
2010-07-19 19:23:32 +00:00
7a135510e3
Teach computeRegisterProperties() to compute "representative" register class for legal value types. A "representative" register class is the largest legal super-reg register class for a value type. e.g. On i386, GR32 is the rep register class for i8 / i16 / i32; on x86_64 it would be GR64.
...
This property will be used by the register pressure tracking instruction scheduler.
llvm-svn: 108735
2010-07-19 18:47:01 +00:00
a58a7e7f9e
Spillers may alter MachineLoopInfo when breaking critical edges, so make it
...
non-const.
llvm-svn: 108734
2010-07-19 18:41:20 +00:00
18efced1a2
Fix PR 7662.
...
Do not try to insert local variable info to a DIE used for function declaration.
llvm-svn: 108731
2010-07-19 17:53:55 +00:00
8d3ba7349c
Since ARM emits inline jump tables as part of the ConstantIsland pass,
...
it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR6581.
llvm-svn: 108730
2010-07-19 17:20:38 +00:00
d9ad52adff
revert so I can get the right PR# in the log message.
...
llvm-svn: 108727
2010-07-19 17:19:40 +00:00
c685756cfb
Since ARM emits inline jump tables as part of the ConstantIsland pass,
...
it should set the jump table encloding the EK_Inline. This prevents
a second, unused, copy of the table from being emitted after the function
body. PR7499.
llvm-svn: 108722
2010-07-19 17:18:28 +00:00
58c283ee85
Update CMake build.
...
llvm-svn: 108700
2010-07-19 15:37:03 +00:00
b1d61aab06
Expose BasicBlock::moveBefore and moveAfter in C API, patch
...
by Benjamin Saunders.
llvm-svn: 108699
2010-07-19 15:31:07 +00:00
6624efb711
Render MachineFunctions to HTML pages, with options to render register
...
pressure estimates and liveness alongside.
Still experimental.
llvm-svn: 108698
2010-07-19 15:22:28 +00:00
39c06b3b23
precompute 20 tags
...
llvm-svn: 108695
2010-07-19 14:48:15 +00:00
953e617de6
Fix indentation.
...
llvm-svn: 108691
2010-07-19 09:36:45 +00:00
330134bf15
Expose JIT::recompileAndRelinkFunction for use through the C API.
...
Patch by Benjamin Saunders.
llvm-svn: 108690
2010-07-19 09:33:13 +00:00
9c271e2835
Remove r108639 now that it is handled by InstCombine instead.
...
llvm-svn: 108688
2010-07-19 08:10:24 +00:00
32a58342ed
Reimplement r108639 in InstCombine rather than DAGCombine.
...
llvm-svn: 108687
2010-07-19 08:09:34 +00:00
9aefb8ee4c
X86-64: Mark WINCALL and more tail call instructions as code gen only.
...
llvm-svn: 108685
2010-07-19 07:21:07 +00:00
2e9f58517d
X86: Mark some tail call pseduo instruction as code gen only.
...
llvm-svn: 108684
2010-07-19 07:21:04 +00:00
1cd02510d3
X86: Mark In32/64BitMode on LEAVE[64] and SYSEXIT[64].
...
llvm-svn: 108683
2010-07-19 07:21:01 +00:00
2ed9f4bd39
_[A-Z] identifiers are reserved for the implementation.
...
llvm-svn: 108682
2010-07-19 06:26:19 +00:00
b82cd9319b
MC/X86: We now match instructions like "incl %eax" correctly for the arch we are
...
assembling; remove crufty custom cleanup code.
llvm-svn: 108681
2010-07-19 06:14:54 +00:00
150d948d3a
X86: Mark MOV.*_{TC,NOREX} instruction as code gen only, they aren't real.
...
llvm-svn: 108680
2010-07-19 06:14:49 +00:00
961543377d
X86: MOV8o8a, MOV8ao8, etc. are only valid in 32-bit mode.
...
llvm-svn: 108679
2010-07-19 06:14:44 +00:00
e2da0a478d
MC: Add WinCOFFStreamer implementation and merge common code from MachO
...
into MCObjectStreamer.
Origonal Windows COFF implementation by Nathan Jedffords.
llvm-svn: 108678
2010-07-19 06:13:10 +00:00
eefe8616be
TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
...
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.
llvm-svn: 108677
2010-07-19 05:44:09 +00:00
20b026464e
Make .align parse correctly on platforms where .align is measured in bytes.
...
llvm-svn: 108674
2010-07-19 04:17:25 +00:00
419197cc4d
Target: Give the TargetAsmParser access to the TargetMachine.
...
- Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.
llvm-svn: 108664
2010-07-19 00:33:49 +00:00
8897d479b5
MC/AsmParser: Stop playing unsafe member function pointer calls, this isn't
...
portable enough.
- Downside is we now double dispatch through a stub function, but this isn't
performance critical.
llvm-svn: 108661
2010-07-18 22:22:07 +00:00
40a564f09f
MC/AsmParser: Fix .abort and .secure_log_unique to accept arbitrary token
...
sequences, not just strings.
llvm-svn: 108655
2010-07-18 20:15:59 +00:00
6fb1c3ad8a
MC/AsmParser: Add macro argument substitution support.
...
llvm-svn: 108654
2010-07-18 19:00:10 +00:00
4323571efb
MC/AsmParser: Add basic support for macro instantiation.
...
llvm-svn: 108653
2010-07-18 18:54:11 +00:00
c1f58ec83c
MC/AsmParser: Add basic parsing support for .macro definitions.
...
llvm-svn: 108652
2010-07-18 18:47:21 +00:00
828984ff4e
MC/AsmParser: Add .macros_{off,on} support, not that makes sense since we don't
...
support macros.
llvm-svn: 108649
2010-07-18 18:38:02 +00:00
d8a1845c31
MC/AsmParser: Use Error() instead of calling PrintMessage() directly.
...
llvm-svn: 108648
2010-07-18 18:31:45 +00:00
ba6e354b61
MC/AsmParser: Fix TokError() to accept a Twine.
...
llvm-svn: 108647
2010-07-18 18:31:42 +00:00
2a2c6cf5f9
MC/AsmParser: Hide the AsmParser implementation.
...
llvm-svn: 108646
2010-07-18 18:31:38 +00:00
7f5bf5ae2a
MC: Move several clients to using AsmParser constructor function.
...
llvm-svn: 108645
2010-07-18 18:31:33 +00:00
8ff89f5c02
Fix struct/class mismatch
...
llvm-svn: 108642
2010-07-18 11:47:56 +00:00
f7f9c8a2f7
Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions.
...
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.
This fixed <rdar://problem/8197504>.
llvm-svn: 108639
2010-07-18 08:47:54 +00:00
1392b8eb79
Added -pbqp-pre-coalescing flag to PBQP. If enabled this will cause PBQP to require
...
LoopSplitter be run prior to register allocation.
Entirely for testing purposes at the moment.
llvm-svn: 108634
2010-07-18 00:57:59 +00:00
2960987ddb
fullStopTag cannot happen here, it is handled above
...
llvm-svn: 108631
2010-07-17 20:52:46 +00:00
ac67e99d53
Use isPrologLabel() instead of checking the opcode directly.
...
llvm-svn: 108628
2010-07-17 19:18:44 +00:00
5218343970
the stackifier is global!
...
llvm-svn: 108626
2010-07-17 17:42:04 +00:00
8f440bb9b0
doxygenify some comments.
...
llvm-svn: 108625
2010-07-17 17:40:51 +00:00
b653ce648d
update CMakeLists.txt
...
llvm-svn: 108620
2010-07-17 12:12:42 +00:00
5864012cc0
Removed unused inRange variable.
...
llvm-svn: 108618
2010-07-17 11:43:07 +00:00
225977d4f9
LoopSplitter - intended to split live intervals over loop boundaries.
...
Still very much under development. Comments and fixes will be forthcoming.
(This commit includes some small tweaks to LiveIntervals & LoopInfo to support the splitter)
llvm-svn: 108615
2010-07-17 07:34:01 +00:00
7d2818b073
Another attempt at getting the clang self-host to like my instcombine patch.
...
llvm-svn: 108614
2010-07-17 06:56:35 +00:00
211e7ce7e7
Iterating over sets of pointers in a heuristic was a bad idea. Switching
...
any command line paramater changed the register allocation produced by
PBQP.
Turns out variety is not the spice of life.
Fixed some comparators, added others. All good now.
llvm-svn: 108613
2010-07-17 06:31:41 +00:00
9de5967244
Start of .sleb128/.uleb128 parsing support.
...
llvm-svn: 108612
2010-07-17 06:27:28 +00:00
718da70ca2
Fix PR7658, a problem where type refinement can trigger
...
constant replacement which was botching its handling of
types. Use of getType() instead of getRawType() was causing
the type map in constant folding to be updated wrong.
llvm-svn: 108610
2010-07-17 06:13:52 +00:00
9e36dd001a
Work-in-progress parsing for ELF .section directive.
...
llvm-svn: 108609
2010-07-17 04:29:04 +00:00
b97e2bbe32
Add combiner patterns to more effectively utilize the BFI (bitfield insert)
...
instruction for non-constant operands. This includes the case referenced
in the README.txt regarding a bitfield copy.
llvm-svn: 108608
2010-07-17 03:30:54 +00:00
56178a07bf
Add support for parsing .size directives for ELF.
...
llvm-svn: 108606
2010-07-17 03:09:18 +00:00
01e3607d70
MC/AsmParser: Lift Run() and TargetParser to base class.
...
Also, add constructor function for creating AsmParser instances.
llvm-svn: 108604
2010-07-17 02:26:10 +00:00
6e3b5fa91c
add BFI to getTargetNodeName()
...
llvm-svn: 108603
2010-07-17 01:50:57 +00:00
adc81f8ee8
Fix logic think-o
...
llvm-svn: 108601
2010-07-17 01:22:19 +00:00
83f250f005
Remove unnecessary check that was subsumed into canRealignStack.
...
llvm-svn: 108588
2010-07-17 00:33:04 +00:00
0baaa9bcc1
Propagate alloca alignment information via variable size object frame
...
information.
No functional change yet.
llvm-svn: 108583
2010-07-17 00:28:22 +00:00
24e3aa011a
Make more explicit and add some currently disabled error messages for
...
stack realignment on ARM.
Also check for function attributes as we do on X86 as well as
make explicit that we're checking can as well as needs in this function.
llvm-svn: 108582
2010-07-17 00:27:24 +00:00
c0be37287c
Make comment a bit more clear as well as return statement since
...
needsStackRealignment is currently checking the can conditions as well.
llvm-svn: 108581
2010-07-17 00:25:41 +00:00
11013eda5a
Add basic support to code-gen the ARM/Thumb2 bit-field insert (BFI) instruction
...
and a combine pattern to use it for setting a bit-field to a constant
value. More to come for non-constant stores.
llvm-svn: 108570
2010-07-16 23:05:05 +00:00
9a54c17582
Fix whitespace.
...
llvm-svn: 108569
2010-07-16 22:58:39 +00:00
bf8370ff36
Consider this function:
...
void foo() { __builtin_unreachable(); }
It will output the following on Darwin X86:
_func1:
Leh_func_begin0:
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
This prolog adds a new Call Frame Information (CFI) row to the FDE with an
address that is not within the address range of the code it describes -- part is
equal to the end of the function -- and therefore results in an invalid EH
frame. If we emit a nop in this situation, then the CFI row is now within the
address range.
llvm-svn: 108568
2010-07-16 22:51:10 +00:00
8289f78569
Remove the isMoveInstr() hook.
...
llvm-svn: 108567
2010-07-16 22:35:46 +00:00
8e767bde16
Avoid isMoveInstr when printing XCore pseudo-moves.
...
llvm-svn: 108566
2010-07-16 22:35:37 +00:00
2c130b8ead
Use MI.isCopy.
...
llvm-svn: 108565
2010-07-16 22:35:34 +00:00
54bcf5049e
Use a small local function for a single remaining late isMoveInstr call in
...
Thumb2ITBlockPass.
llvm-svn: 108564
2010-07-16 22:35:32 +00:00
499f797cdd
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
...
thus is a much more meaningful name.
llvm-svn: 108563
2010-07-16 22:20:36 +00:00
8d51149102
Keep valgrind quiet.
...
The isLive() method can read uninitialized memory, but it still gives correct
results.
llvm-svn: 108561
2010-07-16 22:00:33 +00:00
c9c22862d4
tidy up
...
llvm-svn: 108560
2010-07-16 21:20:46 +00:00
b15cbd343c
Remove remaining calls to TII::isMoveInstr.
...
llvm-svn: 108556
2010-07-16 21:03:55 +00:00
44629eb81b
Emit COPY instead of FMR/FMSD instructions for floating point conversion on
...
PowerPC.
llvm-svn: 108555
2010-07-16 21:03:52 +00:00
27e997a168
eliminate unlockedRefineAbstractTypeTo, types are all per-llvmcontext,
...
so there is no locking involved in type refinement.
llvm-svn: 108553
2010-07-16 20:50:13 +00:00
fee4dafbd0
get the first few tags from a precomputed table (count can be increased if desired)
...
llvm-svn: 108549
2010-07-16 20:35:19 +00:00
ba9b25a6ba
Add missing attributes to cpp backend.
...
llvm-svn: 108547
2010-07-16 18:47:20 +00:00
da3e05db70
Accept registers with P modifier. PR 5314.
...
llvm-svn: 108545
2010-07-16 18:35:46 +00:00
6353e534ec
Teach PPCInstrInfo::storeRegToStackSlot and loadRegFromStackSlot to add memory
...
operands.
Hopefully this fixes the llvm-gcc-powerpc-darwin9 buildbot. It really shouldn't
since missing memoperands should not affect correctness.
llvm-svn: 108540
2010-07-16 18:22:00 +00:00
efd7f9c360
Reorder the contents of various getAnalysisUsage functions, eliminating
...
a redundant loopsimplify run from the default -O2 sequence.
llvm-svn: 108539
2010-07-16 17:58:45 +00:00
1e936277c3
Revert r108369, sorting llvm.dbg.declare information by source position,
...
since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
llvm-svn: 108538
2010-07-16 17:54:27 +00:00
c30b4ddc58
Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill
...
pass that inserted it.
It is no longer necessary to limit the live ranges of FP registers to a single
basic block.
llvm-svn: 108536
2010-07-16 17:41:44 +00:00
f0af236874
Search for a free FP register instead of just assuming FP7 is not in use.
...
llvm-svn: 108535
2010-07-16 17:41:40 +00:00
8a39c807e2
Remove the rest of my instcombine changes. Back to the drawing board on this one.
...
llvm-svn: 108530
2010-07-16 16:39:00 +00:00
0e5fb020a0
Allow x87 FP registers to be alive globally in a function.
...
FP_REG_KILL instructions are still inserted, but can be disabled by passing
-live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly.
CFG edges are partioned into bundles where the x87 stack must be allocated
identically. Code is insertad at the end of each basic block that shuffles the
live FP registers to match the outgoing bundles expectations.
This fix is in preparation for some upcoming register allocator improvements
that may extend the live range of registers beyond a basic block, similar to
LICM. It also provides a nice runtime speedup if you are building with
-mfpmath=387.
llvm-svn: 108529
2010-07-16 16:38:12 +00:00
6d673953e3
eliminate CallInst::ArgOffset
...
llvm-svn: 108522
2010-07-16 09:38:02 +00:00
17c5a23559
Get rid of a bunch of duplicated ELF enum values.
...
llvm-svn: 108520
2010-07-16 07:53:29 +00:00
375efe3157
Arrays and vectors with different numbers of elements are not equivalent.
...
llvm-svn: 108517
2010-07-16 06:31:12 +00:00
3d84c9c793
LoopSimplify does not update domfrontier correctly.
...
This fixes PR7649.
llvm-svn: 108513
2010-07-16 05:59:45 +00:00
bd7c9f701b
Add dump() to DominanceFrontier
...
llvm-svn: 108512
2010-07-16 05:59:39 +00:00
37c42a3d02
Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
...
TII::isMoveInstr is going tobe completely removed.
llvm-svn: 108507
2010-07-16 04:45:42 +00:00
103c4ebea5
Use the source-order scheduler instead of the "fast" scheduler at -O0,
...
because it's more likely to keep debug line information in its original
order.
llvm-svn: 108496
2010-07-16 02:01:19 +00:00
15a81cddb4
Also revert 108422, it's causing some test failures.
...
Working on testcases for Owen.
llvm-svn: 108494
2010-07-16 01:36:12 +00:00
bfd4fd7bb7
The SelectionDAGBuilder's handling of debug info, on rare
...
occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place. 7797940 (6/29/2010..7/15/2010).
llvm-svn: 108484
2010-07-16 00:02:08 +00:00
4bda1c8e68
Revert. This isn't the correct way to go.
...
llvm-svn: 108478
2010-07-15 23:42:21 +00:00
fbbdfcaea7
Fix the order that SCEVExpander considers add operands in so that
...
it doesn't miss an opportunity to form a GEP, regardless of the
relative loop depths of the operands. This fixes rdar://8197217.
llvm-svn: 108475
2010-07-15 23:38:13 +00:00
973dc3b1d8
Handle code gen for the unreachable instruction if it's the only instruction in
...
the function. We'll just turn it into a "trap" instruction instead.
The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:
$ cat t.ll
define void @foo() {
entry:
unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
.section __TEXT,__text,regular,pure_instructions
.globl _foo
.align 4, 0x90
_foo: ## @foo
Leh_func_begin0:
## BB#0: ## %entry
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
...
The unwind tables then have bad data in them causing all sorts of problems.
Fixes <rdar://problem/8096481>.
llvm-svn: 108473
2010-07-15 23:32:40 +00:00
55f0c6b9fc
Split -enable-finite-only-fp-math to two options:
...
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.
llvm-svn: 108465
2010-07-15 22:07:12 +00:00
60b131654b
fix the definitions of ConstTextCoalSection/ConstDataCoalSection
...
to keep "Text" in sync with the "pure instructions" section attribute.
Lack of this attribute was preventing the assembler from emitting
multibyte noops instructions for templates (and inlines, and other
coalesced stuff) and was causing the assembler to mismatch .o files.
This fixes rdar://8018335
llvm-svn: 108461
2010-07-15 21:22:00 +00:00
c2b3675f8b
fix indentation and 80 cols
...
llvm-svn: 108460
2010-07-15 21:19:31 +00:00
1415208292
Don't merge uses when they are targetting fixup sites with
...
different widths. In a use with a narrower fixup, formulae
may be wider than the fixup, in which case the high bits
aren't necessarily meaningful, so it isn't safe to reuse
them for uses with wider fixups.
This fixes PR7618, though the testcase is too large for a
reasonable regression test, since it heavily dependes on
hitting LSR's heuristics in a certain way.
llvm-svn: 108455
2010-07-15 20:24:58 +00:00
620693806a
fix the encoding of MMX_MOVFR642Qrr, it starts with 0xF2 not 0xF3,
...
this fixes rdar://8192860. Unfortunately it can only be triggered
with llc because llvm-mc matches another (correctly encoded) version
of this, so no testcase.
llvm-svn: 108454
2010-07-15 20:13:34 +00:00
a1501b9c50
Use dbgs() instead of errs() in a DEBUG.
...
llvm-svn: 108453
2010-07-15 20:12:42 +00:00
2da75ef315
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108452
2010-07-15 20:04:36 +00:00
64b1e82a7c
Teach ScalarEvolution how to fold trunc(undef) and anyext(undef) to undef.
...
This helps LSR behave more consistently on bugpoint-reduced testcases.
llvm-svn: 108451
2010-07-15 20:02:11 +00:00
dd5e9d8faf
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108450
2010-07-15 20:01:02 +00:00
51a9c0a1b3
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. This time
...
make sure to allocate enough space in the std::vector.
llvm-svn: 108449
2010-07-15 19:58:14 +00:00
5a8d15c553
Reserve a goodly amount of room for the vectors.
...
llvm-svn: 108448
2010-07-15 19:41:20 +00:00
df09db62e2
Fix crash reported in PR7653.
...
llvm-svn: 108441
2010-07-15 18:45:27 +00:00
030b0286ec
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108440
2010-07-15 18:43:09 +00:00
57681404b0
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108438
2010-07-15 18:40:50 +00:00
eaf64d5c1e
Speculatively revert r108429 to fix the clang self-host.
...
llvm-svn: 108436
2010-07-15 18:18:57 +00:00
eb08d01061
Per Chris' suggestion, get rid of the select canonicalization and just add
...
the corresponding or-icmp-and pattern. This has the added benefit of doing
the matching earlier, and thus being less susceptible to being confused by
earlier transforms.
llvm-svn: 108429
2010-07-15 17:24:23 +00:00
13700ebb02
Remove unneeded check, and correct style.
...
llvm-svn: 108427
2010-07-15 16:38:22 +00:00
4afd412d6b
Watch out for a constant offset cancelling out a base register, forming
...
a zero. This situation arrises in Fortran code with induction variables
that start at 1 instead of 0. This fixes PR7651.
llvm-svn: 108424
2010-07-15 15:14:45 +00:00
7151dfd48a
Reapply r108378, with bugfixes, testcase, and improved comment formatting.
...
This now passes LIT, nighty test, and llvm-gcc bootstrap on my machine.
llvm-svn: 108422
2010-07-15 15:00:23 +00:00
26ec65ac3c
cache another dereferenced iterator
...
llvm-svn: 108421
2010-07-15 10:19:23 +00:00
c48adb60ca
revert bill's patches in an attempt to fix the buildbot.
...
llvm-svn: 108419
2010-07-15 06:51:46 +00:00
485ce5a49c
This is a full sentence.
...
llvm-svn: 108418
2010-07-15 06:51:22 +00:00
e6f3287cbb
Disable aliases on all platforms.
...
llvm-svn: 108417
2010-07-15 06:48:56 +00:00
19eff2a9f6
Fix PR7647, handling the case when 'To' ends up being
...
mutated by recursive simplification. This also enhances
ReplaceAndSimplifyAllUses to actually do a real RAUW
at the end of it, which updates any value handles
pointing to "From" to start pointing to "To". This
seems useful for debug info and random other VH users.
llvm-svn: 108415
2010-07-15 06:36:08 +00:00
e41ab07c61
make various clients of ReplaceAndSimplifyAllUses tolerate
...
it *changing* the things it replaces, not just causing them
to drop to null. There is no functionality change yet, but
this is required for a subsequent patch.
llvm-svn: 108414
2010-07-15 06:06:04 +00:00
1f7071a3e4
Fix headers.
...
llvm-svn: 108413
2010-07-15 06:05:18 +00:00
e7e6ca5c57
Use std::vector instead of a hard-coded array. The length of that array could
...
get *very* large, but we only need it to be the size of the number of pregs.
llvm-svn: 108412
2010-07-15 06:04:38 +00:00
d5b390189d
Use std::vector instead of a hard-coded array. The length of that array could
...
get *very* large, but we only need it to be the size of thenumber of pregs.
llvm-svn: 108411
2010-07-15 05:56:32 +00:00
8b3a17e613
Revert r108401; it breaks bootstrap :(
...
llvm-svn: 108407
2010-07-15 05:09:31 +00:00
fd473a746c
Add AssertingVH which makes PR7647 break consistently.
...
llvm-svn: 108401
2010-07-15 04:46:14 +00:00
e4be4308a9
Random note about bswap.
...
llvm-svn: 108396
2010-07-15 02:20:38 +00:00
28fd6785bc
a more graceful fix for test/Other/inline-asm-newline-terminator.ll,
...
follow on to r103765
llvm-svn: 108390
2010-07-15 00:37:34 +00:00
a8b4e3732b
Speculatively revert r108378; may be causing bootstrap failures.
...
llvm-svn: 108389
2010-07-15 00:33:00 +00:00
8b1bb8cfbd
Last COPY conversion.
...
llvm-svn: 108387
2010-07-14 23:58:21 +00:00
0b9aafddc5
Remove restriction on NEON alignment values. Some of the NEON ld/st
...
instructions use different values (e.g., 2-byte or 4-byte alignment).
Also fix ARMInstPrinter to print these alignments as bits instead of bytes.
llvm-svn: 108386
2010-07-14 23:54:43 +00:00
9b449d5a92
Use TargetOpcode::COPY instead of X86-native register copy instructions when
...
lowering atomics. This will allow those copies to still be coalesced after
TII::isMoveInstr is removed.
llvm-svn: 108385
2010-07-14 23:50:27 +00:00
474e56a2bf
80-col.
...
llvm-svn: 108381
2010-07-14 23:41:32 +00:00
37d91d84af
Add instcombine transforms to optimize tests of multiple bits of the same value into a single larger comparison.
...
llvm-svn: 108378
2010-07-14 23:33:51 +00:00
f10cd5c6cb
Make the order in which variables are described in debug information
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independent of the order that isel happens to visit the dbg_declare
intrinsics. This fixes a bug in which the formal arguments were
being printed in reverse order, now that fast isel is going bottom up.
llvm-svn: 108369
2010-07-14 23:08:16 +00:00
769aedd523
fix indentation
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llvm-svn: 108368
2010-07-14 23:04:59 +00:00
92d8998348
Don't pass StringRef by reference.
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llvm-svn: 108366
2010-07-14 22:38:02 +00:00
c12a6731c5
Properly restore DebugLoc after leaving the local constant area.
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llvm-svn: 108364
2010-07-14 22:01:31 +00:00
1513217e27
Just use getParent() instead of getModuleFromVal when the value is a Function.
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llvm-svn: 108358
2010-07-14 21:12:44 +00:00
efb8dbb3f1
Rename WriteConstantInt to WriteConstantInternal, to avoid confusion.
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llvm-svn: 108357
2010-07-14 20:57:55 +00:00
2cfe91379b
Extend SimplifyCFG's common-destination folding heuristic to allow a single
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"bonus" instruction to be speculatively executed. Add a heuristic to
ensure we're not tripping up out-of-order execution by checking that this bonus
instruction only uses values that were already guaranteed to be available.
This allows us to eliminate the short circuit in (x&1)&&(x&2).
llvm-svn: 108351
2010-07-14 19:52:16 +00:00
8939ba337d
Factor out metadata parsing into a separate function.
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llvm-svn: 108343
2010-07-14 18:26:50 +00:00
254858031a
Merge lib/Target/X86/X86COFF.h into include/llvm/Support/COFF.h,
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patch by Michael Spencer!
llvm-svn: 108342
2010-07-14 18:14:33 +00:00
a90af1ba38
Improve 64-subtraction of immediates when parts of the immediate can fit
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in the literal field of an instruction. E.g.,
long long foo(long long a) {
return a - 734439407618LL;
}
rdar://7038284
llvm-svn: 108339
2010-07-14 17:45:16 +00:00
042523340b
Delete fast-isel's trivial load optimization; it breaks debugging because
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it can look past points where a debugger might modify user variables.
llvm-svn: 108336
2010-07-14 17:25:37 +00:00
1aef53403f
Add missing address register update to t2LDM_RET instruction.
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Patch by Brian Lucas. PR7636.
llvm-svn: 108332
2010-07-14 16:02:13 +00:00
7a68cd094b
Rather than using an ifdef on the target to zero out fields,
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just use memset to zero the entire struct.
llvm-svn: 108330
2010-07-14 14:32:33 +00:00
c4d70125ee
A couple potential optimizations inspired by comment 4 in PR6773.
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llvm-svn: 108328
2010-07-14 06:58:26 +00:00
a8e8874552
Fix for PR7193 was overly conservative. The only case where sibcall callee
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address cannot be allocated a register is in 32-bit mode where the first
three arguments are marked inreg. In that case EAX, EDX, and ECX will be
used for argument passing.
This fixes PR7610.
llvm-svn: 108327
2010-07-14 06:44:01 +00:00
bad47f62f6
Add support for NEON VMVN immediate instructions.
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llvm-svn: 108324
2010-07-14 06:31:50 +00:00
bd54a53628
The bits in the cmode field of 32-bit VMOV immediate instructions all depend
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of the value of the immediate.
llvm-svn: 108323
2010-07-14 06:30:44 +00:00
ec0e7b1643
revert r108320, I see the failures now...
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llvm-svn: 108322
2010-07-14 06:16:35 +00:00
658680b2f5
reapply benjamin's instcombine patch, I don't see anything wrong with it and can't repro any problems with a manual self-host.
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llvm-svn: 108320
2010-07-14 05:59:13 +00:00
164a0775bb
fix a bug found by a warning I added to clang this morning.
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llvm-svn: 108309
2010-07-14 01:57:17 +00:00
d542414945
Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.
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llvm-svn: 108304
2010-07-14 01:22:19 +00:00
103a0dcfe1
Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes.
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Radar 7373643.
llvm-svn: 108303
2010-07-14 01:22:12 +00:00
1f471435f8
Don't propagate debug locations to instructions for materializing
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constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.
llvm-svn: 108302
2010-07-14 01:07:44 +00:00
6c6c14a55c
Add AVX 256-bit compare instructions and a bunch of testcases
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llvm-svn: 108286
2010-07-13 22:06:38 +00:00
cd7a40f4ec
Print VNInfo flags.
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llvm-svn: 108277
2010-07-13 21:19:05 +00:00
a3f1901531
Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent
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NEON VMOV-immediate instructions. This simplifies some things.
llvm-svn: 108275
2010-07-13 21:16:48 +00:00
fd8bfcd6e1
AVX 256-bit conversion instructions
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Add the x86 VEX_L form to handle special cases where VEX_L must be set.
llvm-svn: 108274
2010-07-13 21:07:28 +00:00
caca5488dc
In inline asm treat indirect 'X' constraint as 'm'.
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This may not be right in all cases, but it's better
than asserting which it was doing before. PR 7528.
llvm-svn: 108268
2010-07-13 20:17:05 +00:00
76a6b663a3
Added a check that pusha cannot be encoded in 64-bit mode.
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llvm-svn: 108265
2010-07-13 20:05:41 +00:00
fc4b8b8e80
Add an assertion to make PR7542 fail consistently.
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LiveInterval::overlapsFrom dereferences end() if it is called on an empty
interval.
It would be reasonable to just return false - an empty interval doesn't overlap
anything, but I want to know who is doing it first.
llvm-svn: 108264
2010-07-13 19:56:28 +00:00
afd69cf5b7
Add support for empty named metadata too. This isn't particularly
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useful, but it is nice for consistency.
llvm-svn: 108262
2010-07-13 19:42:44 +00:00
b43455feaf
Fix LiveInterval::overlaps so it doesn't claim touching intervals overlap.
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Also, one binary search is enough.
llvm-svn: 108261
2010-07-13 19:42:20 +00:00
1e0213a758
Add support for empty metadata nodes: !{}.
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llvm-svn: 108259
2010-07-13 19:33:27 +00:00
0cc4ad983d
Extend the r107852 optimization which turns some fp compare to code sequence using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0.
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llvm-svn: 108258
2010-07-13 19:27:42 +00:00
58066e337d
Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles).
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llvm-svn: 108256
2010-07-13 19:21:50 +00:00
f43961007c
-enable-unsafe-fp-math should not imply -enable-finite-only-fp-math.
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llvm-svn: 108254
2010-07-13 18:46:14 +00:00
ea282034b6
Grammar.
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llvm-svn: 108252
2010-07-13 18:27:13 +00:00
f88a284579
Handle the case of a tail recursion in which the tail call is followed
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by a return that returns a constant, while elsewhere in the function
another return instruction returns a different constant. This is a
special case of accumulator recursion, so just generalize the existing
logic a bit.
llvm-svn: 108241
2010-07-13 15:41:41 +00:00
03e7e68caa
rotate CallInst operands
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with this commit the callee moves to the end of
the operand array (from the start) and the call
arguments now start at index 0 (formerly 1)
this ordering is now consistent with InvokeInst
this commit only flips the switch,
functionally it is equivalent to
r101465
I intend to commit several cleanups after a few
days of soak period
llvm-svn: 108240
2010-07-13 15:31:36 +00:00
c1c6f4796e
Move NEON "modified immediate" encode/decode into ARMAddressingModes.h to
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avoid replicated code.
llvm-svn: 108227
2010-07-13 04:44:34 +00:00
55595fb291
my work on adding segment registers to LEA missed the
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disassembler. Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.
llvm-svn: 108226
2010-07-13 04:23:55 +00:00
dff283e146
Add AVX 256-bit packed logical forms
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llvm-svn: 108224
2010-07-13 02:38:35 +00:00
36b32aeaa5
Add AVX 256-bit unop arithmetic instructions
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llvm-svn: 108223
2010-07-13 01:53:31 +00:00
77a3c4462f
Since AVX is a superset of all SSE versions, only use HasAVX for AVX instructions
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llvm-svn: 108222
2010-07-13 00:38:47 +00:00
54e620d2c7
Don't add memory operands to storeRegToStackSlot / loadRegFromStackSlot results,
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they already have one.
This fixes the himenobmtxpa miscompilation on ARM.
The PostRA scheduler got confused by the double memoperand and hoisted a stack
slot load above a store to the same slot.
llvm-svn: 108219
2010-07-13 00:23:30 +00:00
03264efe30
Move some SIMD fragment code into X86InstrFragmentsSIMD so that the
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utility classes can be used from multiple files. This will aid
transitioning to a new refactored x86 SIMD specification.
llvm-svn: 108213
2010-07-12 23:41:28 +00:00
8e67a0482e
Add AVX 256 binary arithmetic instructions
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llvm-svn: 108207
2010-07-12 23:04:15 +00:00
91806311c9
More refactoring of basic SSE arith instructions. Open room for 256-bit instructions
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llvm-svn: 108204
2010-07-12 22:41:32 +00:00
ab058b83e0
MC/AsmParser: Move ELF specific parser to ELFAsmParser.cpp.
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llvm-svn: 108196
2010-07-12 21:23:32 +00:00
0cb91cfc74
MC/AsmParser: Move Darwin specific parse to DarwinAsmParser.cpp.
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llvm-svn: 108193
2010-07-12 20:51:51 +00:00
51e6d9bbf6
Apply the SSE dependence idiom for SSE unary operations to
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SD instructions too, in addition to SS instructions. And
add a comment about it.
llvm-svn: 108191
2010-07-12 20:46:04 +00:00
a5bf6b6001
MC/AsmParser: Move .section parsing to Darwin specific parser.
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llvm-svn: 108190
2010-07-12 20:42:34 +00:00
aa59cf2686
MC/AsmParser: Move special section directive parsing to Darwin specific parser.
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llvm-svn: 108187
2010-07-12 20:23:36 +00:00
8a2bdc8231
Remove some code that doesn't appear to do anything. All the ARM call
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instructions already have implicit defs of LR. The comment suggests that
this is intended to fix something like pr6111, but it doesn't really do
that either.
llvm-svn: 108186
2010-07-12 20:22:45 +00:00
80be44a2ac
MC/AsmParser: Add a basic ELFAsmParser extension.
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llvm-svn: 108185
2010-07-12 20:08:04 +00:00
f9bcaad76d
Add AVX 256-bit MOVMSK forms
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llvm-svn: 108184
2010-07-12 20:06:32 +00:00
101c14c940
MC/AsmParser: Inline AsmParser::CreateSymbol into callers.
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llvm-svn: 108183
2010-07-12 19:52:10 +00:00
d388c93f87
MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser.
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llvm-svn: 108180
2010-07-12 19:37:35 +00:00
63a379dd5c
MC/AsmParser: Move .desc parsing to Darwin specific parser.
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llvm-svn: 108179
2010-07-12 19:22:53 +00:00
b992f1a95b
MC/AsmParser: Move .lsym parsing to Darwin specific parser.
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llvm-svn: 108176
2010-07-12 19:08:25 +00:00
ae9da1481a
MC/AsmParser: Move some misc. Darwin directive handling to DarwinAsmParser.
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llvm-svn: 108174
2010-07-12 18:49:22 +00:00
425b35681f
Check begin!=end, rather than !begin.
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llvm-svn: 108167
2010-07-12 18:12:35 +00:00
c5011088cd
MC/AsmParser: Add a DarwinAsmParser extension.
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- Currently initialization is a bit of a hack, but harmless. We need to rework
various parts of target initialization to clean this up.
llvm-svn: 108165
2010-07-12 18:12:02 +00:00
a18c5a0e5e
Fix a typo and fit in 80 columns. Found by Bob Wilson.
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llvm-svn: 108164
2010-07-12 18:11:17 +00:00
dd41dcf270
MC/AsmParser: Switch a bunch of directive parsing to use accessors.
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llvm-svn: 108163
2010-07-12 18:03:11 +00:00
c128e70ff2
Add a lint check for mismatched return types, inspired by PR6944.
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llvm-svn: 108162
2010-07-12 18:02:04 +00:00
86033407c9
MCAsmParser: Pull some directive handling out into a helper class, and change
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DirectiveMap to be based on MCAsmParserExtension.
llvm-svn: 108161
2010-07-12 17:54:38 +00:00
cc21af1dfb
MC/AsmParser: Switch some directive parsing to use accessor methods.
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llvm-svn: 108160
2010-07-12 17:45:27 +00:00
af3d1de891
MC: Add MCAsmParserExtension, a base class for all the target/object specific
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classes which want to extend the basic asm parser.
llvm-svn: 108158
2010-07-12 17:27:45 +00:00
4be8f2ffad
MC: Move AsmParser::TokError to MCAsmParser().
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llvm-svn: 108155
2010-07-12 17:18:45 +00:00
4042c33cd8
MC: Move getLoc() to MCAsmLexer().
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llvm-svn: 108154
2010-07-12 17:10:00 +00:00
8f36402ac2
Nope, still breaks the release selfhost bots :(
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llvm-svn: 108153
2010-07-12 16:38:48 +00:00
07b695e052
Reapply the "or" half of r108136, which seems to be less problematic.
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llvm-svn: 108152
2010-07-12 16:15:48 +00:00
1b787df129
cache result of operator*
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llvm-svn: 108150
2010-07-12 15:48:26 +00:00
68d7424a65
Don't fast-isel an x87 comparison opcode, as fast-isel doesn't
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support branching on x87 comparisons yet. This fixes PR7624.
llvm-svn: 108149
2010-07-12 15:46:30 +00:00
c719e8ae9e
Revert r108141 again, sigh.
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llvm-svn: 108148
2010-07-12 14:42:04 +00:00
96fedcb136
cache result of operator*
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llvm-svn: 108147
2010-07-12 14:15:58 +00:00
f9c38b5a45
cache result of operator*
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llvm-svn: 108146
2010-07-12 14:15:10 +00:00
88dd73b75e
cache result of operator*
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llvm-svn: 108145
2010-07-12 14:14:03 +00:00
a75ed761a9
cache result of operator*
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llvm-svn: 108144
2010-07-12 14:13:15 +00:00
15445db11b
cache results of operator*
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llvm-svn: 108143
2010-07-12 14:12:11 +00:00
a5fa885d47
cache results of operator*
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llvm-svn: 108142
2010-07-12 14:10:24 +00:00
f578c36035
Reapply 108136 with an ugly pasto fixed.
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llvm-svn: 108141
2010-07-12 13:44:00 +00:00
11743249e6
Move optimization to avoid redundant matching.
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llvm-svn: 108140
2010-07-12 13:34:22 +00:00
9675e759cf
Revert r108136 until I figure out why it broke selfhost.
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llvm-svn: 108139
2010-07-12 12:35:49 +00:00
782f62412f
cache dereferenced iterators
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llvm-svn: 108138
2010-07-12 12:03:02 +00:00
433b975fe2
recommit r108131 (hich has been backed out in r108135) with a fix
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llvm-svn: 108137
2010-07-12 12:02:10 +00:00
Jim Grosbach