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Author SHA1 Message Date
NAKAMURA Takumi 704de074b8 llvm/lib: [CMake] Add explicit dependency to intrinsics_gen. 
llvm-svn: 159112
 2012-06-24 13:32:01 +00:00
Akira Hatanaka 765c312314 1. fix null program output after some other changes 
2. re-enable null.ll test
3. fix some minor style violations

Patch by Reed Kotler.

llvm-svn: 158935
 2012-06-21 20:39:10 +00:00
Jack Carter b2fd5f66b4 The inline asm operand modifier 'c' is suppose 
to be generic across architectures. It has the
following description in the gnu sources:

    Substitute immediate value without immediate syntax

Several Architectures such as x86 have local implementations
of operand modifier 'c' which go beyond the above description
slightly. To make use of the generic modifiers without overriding
local implementation one can make a call to the base class method
for AsmPrinter::PrintAsmOperand() in the locally derived method's 
"default" case in the switch statement. That way if it is already
defined locally the generic version will never get called.

This change is needed when test/CodeGen/generic/asm-large-immediate.ll
failed on a native Mips board. The test was assuming a generic
implementation was in place.

Affected files:

    lib/Target/Mips/MipsAsmPrinter.cpp:
        Changed the default case to call the base method.
    lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
        Added 'c' to the switch cases.
    test/CodeGen/Mips/asm-large-immediate.ll
        Mips compiled version of the generic one

Contributer: Jack Carter
llvm-svn: 158925
 2012-06-21 17:14:46 +00:00
Akira Hatanaka 87505f46ac Revert r158846. 
llvm-svn: 158855
 2012-06-20 21:19:39 +00:00
Akira Hatanaka da448fe0b1 In MipsDisassembler.cpp, instead of defining register class tables, use the ones 
that are generated by TableGen and are already available in
MipsGenRegisterInfo.inc. Suggested by Jakob Stoklund Olesen.

Also, fix bug in function DecodeAFGR64RegisterClass.

Patch by Vladimir Medic. 

llvm-svn: 158846
 2012-06-20 20:39:23 +00:00
Akira Hatanaka 9f96bb8619 Make MipsLongBranch::runOnMachineFunction return true. 
llvm-svn: 158702
 2012-06-19 03:45:29 +00:00
Akira Hatanaka 9846239bbc Use MachineBasicBlock::instr_iterator instead of MachineBasicBlock::iterator in 
MipsCodeEmitter.cpp.

llvm-svn: 158701
 2012-06-19 03:39:45 +00:00
NAKAMURA Takumi e2d4a09305 Mips/AsmParser/CMakeLists.txt: Fix dependency. 
llvm-svn: 158602
 2012-06-16 15:33:52 +00:00
Akira Hatanaka 5fd22485a3 Fix coding style violations. Remove white spaces and tabs. 
llvm-svn: 158471
 2012-06-14 21:10:56 +00:00
Akira Hatanaka d8ab16b86f 1. introduce MipsPat in place of Pat in order to exclude those from 
being used by Mips16 or Micro Mips
2. clean up a few lines too long encountered

Patch by Reed Kotler.

llvm-svn: 158470
 2012-06-14 21:03:23 +00:00
NAKAMURA Takumi 27bdc671ed MipsLongBranch.cpp: Tweak llvm::next() to appease msvc. 
llvm-svn: 158446
 2012-06-14 12:29:48 +00:00
Akira Hatanaka d74b1c1a48 Fix Mips/CMakeLists.txt. 
llvm-svn: 158437
 2012-06-14 01:23:55 +00:00
Akira Hatanaka a215929d5f Add file MipsLongBranch.cpp. 
llvm-svn: 158436
 2012-06-14 01:22:24 +00:00
Akira Hatanaka a1b142f97c Remove code in MipsAsmPrinter and MipsMCInstLower. 
llvm-svn: 158434
 2012-06-14 01:20:12 +00:00
Akira Hatanaka eb36522a4d Add long branch expansion pass for MIPS. 
llvm-svn: 158433
 2012-06-14 01:19:35 +00:00
Akira Hatanaka 64f8df28ed Add AT to the list of registers clobbered by branches so that it is available 
as a scratch register when they are expanded to long branches.

llvm-svn: 158432
 2012-06-14 01:17:59 +00:00
Akira Hatanaka 194a8773ea In MipsRegisterInfo::eliminateFrameIndex, call Mips::loadImmediate 
to load an immediate that does not fit into 16-bit. 

llvm-svn: 158431
 2012-06-14 01:17:36 +00:00
Akira Hatanaka 2372c8bb5f In MipsFrameLowering::emitPrologue and emitEpilogue, call Mips::loadImmediate 
to load an immediate that does not fit into 16-bit. Also, take into
consideration the global base register slot on the stack when computing the
stack size. 

llvm-svn: 158430
 2012-06-14 01:17:13 +00:00
Akira Hatanaka acd1a7dc68 Define function MipsInstrInfo::GetInstSizeInBytes, which will be called to 
compute the size of basic blocks in a function. Also, define a function which
emits a series of instructions to load an immediate.

llvm-svn: 158429
 2012-06-14 01:16:45 +00:00
Akira Hatanaka 0c76448471 In MipsISelDAGToDAG.cpp, store the global base register to a stack frame object. 
Long-branches need access to the global base register to get the destination
address.

llvm-svn: 158428
 2012-06-14 01:16:15 +00:00
Akira Hatanaka 51c70c62cf Add methods to MipsFunctionInfo for initializing and accessing the stack frame 
object for the global base register.

This is the first of a series of patches which implements long branch expansion
for MIPS.

llvm-svn: 158427
 2012-06-14 01:15:36 +00:00
Akira Hatanaka 5ac78681c1 Bundle jump/branch instructions with the instructions in the delay slot in 
delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen.

This change, along with the fix in r158154, enables machine verification
to be run after delay slot filling.

llvm-svn: 158426
 2012-06-13 23:25:52 +00:00
Akira Hatanaka df5205ef3d Implement a DAGCombine in MipsISelLowering.cpp which transforms the following 
pattern:

(add v0, (add v1, abs_lo(tjt))) => (add (add v0, v1), abs_lo(tjt))

"tjt" is a TargetJumpTable node. 

llvm-svn: 158419
 2012-06-13 20:33:18 +00:00
Akira Hatanaka 1daf8c2a16 Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp. 
llvm-svn: 158414
 2012-06-13 19:33:32 +00:00
Akira Hatanaka 9586618c58 Simplify CreateLoadLR and CreateStoreLR in MipsISelLowering.cpp. 
llvm-svn: 158413
 2012-06-13 19:06:08 +00:00
Akira Hatanaka f0273603f5 Implement fastcc calling convention for MIPS. 
llvm-svn: 158410
 2012-06-13 18:06:00 +00:00
Akira Hatanaka 21371766d1 Clean up trailing blanks in Mips16InstrFormats.td 
Patch by Reed Kotler.

llvm-svn: 158382
 2012-06-13 02:42:47 +00:00
Akira Hatanaka 5fa541231b disable use of directive .set nomicromips 
until this directive is pushed in gas to open source fsf

Patch by Reed Kotler.

llvm-svn: 158381
 2012-06-13 02:41:14 +00:00
Akira Hatanaka 3fe00f29ad 1. fix places where immed is used in place of imm to be consistent with 
non mips16
2. fix some comments to change OPcode->EXTEND for extended instructions

Patch by Reed Kotler.

llvm-svn: 158378
 2012-06-13 02:37:54 +00:00
Jack Carter 2db37e8226 Test commit 
llvm-svn: 158250
 2012-06-09 00:27:55 +00:00
Akira Hatanaka 6734685f21 Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node is 
inserted after the shift-left-logical node.

llvm-svn: 157937
 2012-06-04 17:46:29 +00:00
Hans Wennborg 245917b536 MIPS TLS: use the model selected by TargetMachine::getTLSModel(). 
This was mostly done already in r156162, but I missed one place.

llvm-svn: 157929
 2012-06-04 14:02:08 +00:00
Benjamin Kramer bde9176663 Fix typos found by http://github.com/lyda/misspell-check 
llvm-svn: 157885
 2012-06-02 10:20:22 +00:00
Chris Lattner 58268c23ac remove an unused variable. 
llvm-svn: 157872
 2012-06-02 01:03:42 +00:00
Akira Hatanaka 23327b30ef Remove code which is no longer needed in MipsAsmPrinter and MipsMCInstLower. 
llvm-svn: 157867
 2012-06-02 00:05:11 +00:00
Akira Hatanaka 019e592f75 Set operation actions for load/store nodes in the Mips backend. 
llvm-svn: 157866
 2012-06-02 00:04:42 +00:00
Akira Hatanaka f11571d90d Add definitions of 32/64-bit unaligned load/store instructions for Mips. 
llvm-svn: 157865
 2012-06-02 00:04:19 +00:00
Akira Hatanaka 8f1db778a4 Define functions MipsTargetLowering::LowerLOAD and LowerSTORE which 
custom-lower unaligned load and store nodes.

llvm-svn: 157864
 2012-06-02 00:03:49 +00:00
Akira Hatanaka b9ebf8d644 Define Mips specific unaligned load/store nodes. 
llvm-svn: 157863
 2012-06-02 00:03:12 +00:00
Akira Hatanaka 4e76bf8282 Expand unaligned i16 loads/stores for the Mips backend. 
This is the first of a series of patches which make changes to the backend to
emit unaligned load/store instructions (lwl,lwr,swl,swr) during instruction
selection.

llvm-svn: 157862
 2012-06-02 00:02:45 +00:00
Akira Hatanaka 56bf023a6d In MipsMCInstLower::LowerSymbolOperand, get offset from symbol if 
the MachineOperand type has a valid offset. 

llvm-svn: 157861
 2012-06-02 00:02:11 +00:00
Jakob Stoklund Olesen 92a0083944 Switch some getAliasSet clients to MCRegAliasIterator. 
MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

llvm-svn: 157837
 2012-06-01 20:36:54 +00:00
Akira Hatanaka bff8e31d3c Cleanup and factoring of mips16 tablegen classes. Make register classes 
CPU16RegsRegClass and CPURARegRegClass available. Add definition of mips16
jalr instruction.

Patch by Reed Kotler.

llvm-svn: 157730
 2012-05-31 02:59:44 +00:00
Eric Christopher f481ab3877 Add support for the mips inline asm 'm' output modifier. 
Patch by Jack Carter.

llvm-svn: 157709
 2012-05-30 19:05:19 +00:00
Jakob Stoklund Olesen ad8103dc7b Fix some uses of getSubRegisters() to use getSubReg() instead. 
It is better to address sub-registers directly by name instead of
relying on their position in the sub-register list.

llvm-svn: 157703
 2012-05-30 18:40:49 +00:00
Akira Hatanaka 5cec9007bb Fix predicate HasStandardEncoding in MipsInstrInfo.td per suggestion of 
Benjamin Kramer.

llvm-svn: 157504
 2012-05-25 22:15:15 +00:00
Akira Hatanaka 03968fac4f Delete MipsExpandPseudo.cpp. 
llvm-svn: 157496
 2012-05-25 20:54:48 +00:00
Akira Hatanaka d0ac2c93d3 Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo. 
Delete MipsExpandPseudo.

llvm-svn: 157495
 2012-05-25 20:52:52 +00:00
Akira Hatanaka f4554485cb Remove the code that expands MIPS' .cpload directive. 
llvm-svn: 157494
 2012-05-25 20:46:52 +00:00
Akira Hatanaka 5de59266cd Remove the code that emits MIPS' .cprestore directive. 
llvm-svn: 157493
 2012-05-25 20:42:55 +00:00