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125 Commits

Author SHA1 Message Date
Chris Lattner b9d8fa0342 Move the VRBase field from NodeInfo to being a separate, explicit, map. 
llvm-svn: 26686
 2006-03-10 07:25:12 +00:00
Chris Lattner 2f8c7c3d55 Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchy 
llvm-svn: 26682
 2006-03-10 06:34:51 +00:00
Chris Lattner 543832d39d Change the interface for getting a target HazardRecognizer to be more clean. 
llvm-svn: 26608
 2006-03-08 04:25:59 +00:00
Chris Lattner 2d945ba4c7 When a hazard recognizer needs noops to be inserted, do so. This represents 
noops as null pointers in the instruction sequence.

llvm-svn: 26564
 2006-03-05 23:51:47 +00:00
Evan Cheng ed169db8a5 Added an offset field to ConstantPoolSDNode. 
llvm-svn: 26371
 2006-02-25 09:54:52 +00:00
Chris Lattner 5af3fdec12 Pass all the flags to the asm printer, not just the # operands. 
llvm-svn: 26362
 2006-02-24 19:50:58 +00:00
Chris Lattner 2f8a794b13 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope. 
Add support for addressing modes.

llvm-svn: 26361
 2006-02-24 19:18:20 +00:00
Chris Lattner 86c51000db Refactor operand adding out to a new AddOperand method 
llvm-svn: 26358
 2006-02-24 18:54:03 +00:00
Chris Lattner 571d9647c6 Record all of the expanded registers in the DAG and machine instr, fixing 
several bugs in inline asm expanded operands.

llvm-svn: 26332
 2006-02-23 19:21:04 +00:00
Chris Lattner 4576bb74d5 Make MachineConstantPool entries alignments explicit 
llvm-svn: 26071
 2006-02-09 02:23:13 +00:00
Jeff Cohen 95ae171d5b Fix VC++ warning. 
llvm-svn: 25975
 2006-02-04 16:20:31 +00:00
Evan Cheng f9adce90bf Get rid of some memory leaks identified by Valgrind 
llvm-svn: 25960
 2006-02-04 06:49:00 +00:00
Chris Lattner 3b48431333 Add initial support for immediates. This allows us to compile this: 
int %rlwnm(int %A, int %B) {
  %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17)
  ret int %C
}

into:

_rlwnm:
        or r2, r3, r3
        or r3, r4, r4
        rlwnm r2, r2, r3, 4, 17    ;; note the immediates :)
        or r3, r2, r2
        blr

llvm-svn: 25955
 2006-02-04 02:26:14 +00:00
Evan Cheng 32be2dc0af Allow the specification of explicit alignments for constant pool entries. 
llvm-svn: 25855
 2006-01-31 22:23:14 +00:00
Chris Lattner 2e56e89452 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.

llvm-svn: 25827
 2006-01-31 02:03:41 +00:00
Chris Lattner 4df279cfda Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an 
ISD::INLINEASM node.

llvm-svn: 25668
 2006-01-26 23:28:04 +00:00
Evan Cheng 1880f8db02 No need to keep track of top and bottom nodes in a group since the vector is 
already in order. Thanks Jim for pointing it out.

llvm-svn: 25608
 2006-01-25 18:54:24 +00:00
Evan Cheng fbc88a624a Keep track of bottom / top element of a set of flagged nodes. 
llvm-svn: 25600
 2006-01-25 09:13:41 +00:00
Evan Cheng c1e1d9724d Factor out more instruction scheduler code to the base class. 
llvm-svn: 25532
 2006-01-23 07:01:07 +00:00
Evan Cheng 739a6a456e Do some code refactoring on Jim's scheduler in preparation of the new list 
scheduler.

llvm-svn: 25493
 2006-01-21 02:32:06 +00:00
Duraid Madina fb6a914ca7 purity++ 
llvm-svn: 25041
 2005-12-29 05:59:19 +00:00
Jim Laskey 9e296bee9a Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Jim Laskey 9b9688aeb8 Amend comment. 
llvm-svn: 24861
 2005-12-19 16:32:26 +00:00
Jim Laskey ce23987e6b Create a strong dependency for loads following stores. This will leave a 
latency period between the two.

llvm-svn: 24860
 2005-12-19 16:30:13 +00:00
Jeff Cohen c7cb351aac Keep VC++ happy. 
llvm-svn: 24835
 2005-12-18 22:20:05 +00:00
Jim Laskey c97b7d0be9 Fix a bug Sabre was having where the DAG root was a group. The group dominator 
needed to be added to the ordering list, not the first member of the group.

llvm-svn: 24816
 2005-12-18 04:40:52 +00:00
Jim Laskey e220821deb Groups were not emitted if the dominator node and the node in the ordering list 
were not the same node.  Ultimately the test was bogus.

llvm-svn: 24815
 2005-12-18 03:59:21 +00:00
Chris Lattner cf12118965 Simplify code 
llvm-svn: 24806
 2005-12-18 01:03:46 +00:00
Nate Begeman 006bb04f3a Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Evan Cheng 0e0de2f3f0 Added an index field to GlobalAddressSDNode so it can represent X+12, etc. 
llvm-svn: 24523
 2005-11-30 02:04:11 +00:00
Chris Lattner bf4f233214 Switch the allnodes list from a vector of pointers to an ilist of nodes.This eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding 
nodes to the graph.

llvm-svn: 24263
 2005-11-09 23:47:37 +00:00
Chris Lattner 3ba38cba64 Explicitly initialize some instance vars 
llvm-svn: 24247
 2005-11-08 21:54:57 +00:00
Jim Laskey 1d2f26adcc Let's try ignoring resource utilization on the backward pass. 
llvm-svn: 24231
 2005-11-07 19:08:53 +00:00
Jim Laskey 904dbb4a27 Fix logic bug in finding retry slot in tally. 
llvm-svn: 24188
 2005-11-05 00:01:25 +00:00
Jim Laskey ded4759d81 Fix a warning 
llvm-svn: 24187
 2005-11-04 18:26:02 +00:00
Jim Laskey e682b677c1 Scheduling now uses itinerary data. 
llvm-svn: 24180
 2005-11-04 04:05:35 +00:00
Jim Laskey 5ce0538253 1. Embed and not inherit vector for NodeGroup. 
2. Iterate operands and not uses (performance.)

3. Some long pending comment changes.

llvm-svn: 24119
 2005-10-31 12:49:09 +00:00
Chris Lattner dd5663dfa0 Reduce the number of copies emitted as machine instructions by 
generating results in vregs that will need them.  In the case of something
like this:  CopyToReg((add X, Y), reg1024), we no longer emit code like
this:

   reg1025 = add X, Y
   reg1024 = reg 1025

Instead, we emit:

   reg1024 = add X, Y

Whoa! :)

llvm-svn: 24111
 2005-10-30 18:54:27 +00:00
Jim Laskey 5d7a50ac44 Inhibit instructions from being pushed before function calls. This will 
minimize unnecessary spilling.

llvm-svn: 23710
 2005-10-13 16:44:00 +00:00
Jim Laskey 63b1419b74 Finally committing to the new scheduler. Still -sched=none by default. 
llvm-svn: 23702
 2005-10-12 18:29:35 +00:00
Chris Lattner 0832f2635a When emiting a CopyFromReg and the source is already a vreg, do not bother 
creating a new vreg and inserting a copy: just use the input vreg directly.

This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away.  On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.

llvm-svn: 23671
 2005-10-09 05:58:56 +00:00
Jim Laskey 327d4298e1 Reverting to version - until problem isolated. 
llvm-svn: 23622
 2005-10-04 16:41:51 +00:00
Jim Laskey 409a6b204e Refactor gathering node info and emission. 
llvm-svn: 23610
 2005-10-03 12:30:32 +00:00
Chris Lattner 7f718e61e8 silence a bogus warning 
llvm-svn: 23595
 2005-10-02 16:30:51 +00:00
Chris Lattner 704d97f8b2 Add assertions to the trivial scheduler to check that the value types match 
up between defs and uses.

llvm-svn: 23590
 2005-10-02 07:10:55 +00:00
Chris Lattner a038d901fb Codegen CopyFromReg using the regclass that matches the valuetype of the 
destination vreg.

llvm-svn: 23586
 2005-10-02 06:34:16 +00:00
Chris Lattner 5a7bfe0b72 Add some very paranoid checking for operand/result reg class matchup 
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

llvm-svn: 23580
 2005-10-01 07:45:09 +00:00
Jim Laskey d3850457a1 typo 
llvm-svn: 23574
 2005-10-01 00:08:23 +00:00
Jim Laskey 9d96932879 1. Simplify the gathering of node groups. 
2. Printing node groups when displaying nodes.

llvm-svn: 23573
 2005-10-01 00:03:07 +00:00
Jim Laskey 3fe3841c2a 1. Made things node-centric (from operand). 
2. Added node groups to handle flagged nodes.

3. Started weaning simple scheduling off existing emitter.

llvm-svn: 23566
 2005-09-30 19:15:27 +00:00
Jeff Cohen b01a41a06d Silence VC++ redeclaration warnings. 
llvm-svn: 23516
 2005-09-29 01:59:49 +00:00
Jim Laskey 63523f98d5 Remove some redundancies. 
llvm-svn: 23469
 2005-09-27 17:32:45 +00:00
Jim Laskey 5f2443c8a3 Addition of a simple two pass scheduler. This version is currently hacked up 
for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)

llvm-svn: 23455
 2005-09-26 21:57:04 +00:00
Chris Lattner b6cde17d29 Fix the release build, noticed by Eric van Riet Paap 
llvm-svn: 23215
 2005-09-02 07:09:28 +00:00
Chris Lattner 975f5c9f46 It is NDEBUG not _NDEBUG 
llvm-svn: 23186
 2005-09-01 18:44:10 +00:00
Chris Lattner 08a1e38730 Name this variable to be what it really is! 
llvm-svn: 23145
 2005-08-30 01:58:51 +00:00
Chris Lattner 04cb82278a Handle CopyToReg nodes with flag operands correctly 
llvm-svn: 23144
 2005-08-30 01:57:23 +00:00
Chris Lattner f7e5ec84c6 Add a hack to avoid some horrible code in some cases by always emitting 
token chains first.  For this C function:

int test() {
  int i;
  for (i = 0; i < 100000; ++i)
    foo();
}

Instead of emitting this (condition before call)

.LBB_test_1:    ; no_exit
        addi r30, r30, 1
        lis r2, 1
        ori r2, r2, 34464
        cmpw cr2, r30, r2
        bl L_foo$stub
        bne cr2, .LBB_test_1    ; no_exit

Emit this:

.LBB_test_1:    ; no_exit
        bl L_foo$stub
        addi r30, r30, 1
        lis r2, 1
        ori r2, r2, 34464
        cmpw cr0, r30, r2
        bne cr0, .LBB_test_1    ; no_exit

Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.

This also makes the code much more similar to what the pattern isel produces.

llvm-svn: 23135
 2005-08-29 23:21:29 +00:00
Chris Lattner 5ee85e89b6 fix PHI node emission for basic blocks that have select_cc's in them on ppc32 
llvm-svn: 23113
 2005-08-27 00:58:02 +00:00
Chris Lattner 13d7c252e5 Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter 
flag is set on an instruction.

llvm-svn: 23098
 2005-08-26 20:54:47 +00:00
Chris Lattner c30405e0ee Change ConstantPoolSDNode to actually hold the Constant itself instead of 
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.

llvm-svn: 23081
 2005-08-26 17:15:30 +00:00
Chris Lattner 8a93f64efa Add support for flag operands 
llvm-svn: 23050
 2005-08-25 17:48:54 +00:00
Chris Lattner ad9565dfbe Add support for external symbols, and support for variable arity instructions 
llvm-svn: 23022
 2005-08-24 22:02:41 +00:00
Chris Lattner 92626b9bc5 Add a fast-path for register values. Add support for constant pool entries, 
allowing us to compile this:

float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, 10.1
        ret float %R
}

to this:

_test2:
        lfs r2, 0(r3)
        lis r3, ha16(.CPI_test2_0)
        lfs r3, lo16(.CPI_test2_0)(r3)
        fadds f1, r2, r3
        blr

llvm-svn: 22962
 2005-08-22 01:04:32 +00:00
Chris Lattner 4866356907 Add support for frame index nodes 
llvm-svn: 22956
 2005-08-21 19:56:04 +00:00
Chris Lattner 154b2bc59b Add support for basic blocks, fix a bug in result # computation 
llvm-svn: 22948
 2005-08-21 18:49:29 +00:00
Chris Lattner 4b08ba26d8 fix bogus warning 
llvm-svn: 22943
 2005-08-20 18:07:27 +00:00
Chris Lattner 319e65696d Add support for global address nodes 
llvm-svn: 22940
 2005-08-19 22:38:24 +00:00
Chris Lattner 6d7f814b01 Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows 
us to compile stuff like this:

double %test(double %A, double %B, double %C, double %E) {
        %F = mul double %A, %A
        %G = add double %F, %B
        %H = sub double -0.0, %G
        %I = mul double %H, %C
        %J = add double %I, %E
        ret double %J
}

to:

_test:
        fnmadd f0, f1, f1, f2
        fmadd f1, f0, f3, f4
        blr

woot!

llvm-svn: 22937
 2005-08-19 21:43:53 +00:00
Chris Lattner 78b200eb74 Before implementing copyfromreg, we'll implement copytoreg correctly. 
This gets us this for the previous testcase:

_test:
        lis r2, 0
        ori r3, r2, 65535
        blr

Note that we actually write to r3 (the return reg) correctly now :)

llvm-svn: 22933
 2005-08-19 20:50:53 +00:00
Chris Lattner cc3035e989 Now that we have operand info for machine instructions, use it to create 
temporary registers for things that define a register.  This allows dag->dag
isel to compile this:

int %test() { ret int 65535 }

into:

_test:
        lis r2, 0
        ori r2, r2, 65535
        blr

Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.

llvm-svn: 22932
 2005-08-19 20:45:43 +00:00
Chris Lattner d18beab94c Fix computation of # operands, add a temporary hack for CopyToReg 
llvm-svn: 22896
 2005-08-19 01:01:34 +00:00
Chris Lattner 0c8c2c102d add a new -view-sched-dags option to view dags as they are sent to the scheduler. 
llvm-svn: 22878
 2005-08-18 20:11:49 +00:00
Chris Lattner d342de9aaa Implement the first chunk of a code emitter. This is sophisticated enough to 
codegen:

_empty:
.LBB_empty_0:   ;
        blr

but can't do anything more (yet). :)

llvm-svn: 22876
 2005-08-18 20:07:59 +00:00
Chris Lattner 1b4727de7d new file, obviously just a stub 
llvm-svn: 22868
 2005-08-18 18:45:24 +00:00