Commit Graph

73 Commits

Author SHA1 Message Date
Fangrui Song 11cb39c5fc [X86][PPC] Support -mlong-double-64
-mlong-double-64 is supported on some ports of gcc (i386, x86_64, and ppc{32,64}).
On many other targets, there will be an error:

    error: unrecognized command line option '-mlong-double-64'

This patch makes the driver option -mlong-double-64 available for x86
and ppc. The CC1 option -mlong-double-64 is available on all targets for
users to test on unsupported targets.

LongDoubleSize is added as a VALUE_LANGOPT so that the option can be
shared with -mlong-double-128 when we support it in clang.

Also, make powerpc*-linux-musl default to use 64-bit long double. It is
currently the only supported ABI on musl and is also how people
configure powerpc*-linux-musl-gcc.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D64067

llvm-svn: 365412
2019-07-09 00:27:43 +00:00
Fangrui Song 1f333562de [PowerPC] Support constraint code "ww"
Summary:
"ww" and "ws" are both constraint codes for VSX vector registers that
hold scalar double data. "ww" is preferred for float while "ws" is
preferred for double.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D64119

llvm-svn: 365106
2019-07-04 04:44:42 +00:00
Fangrui Song f69c992485 [PPC64] Fix PPC64TargetInfo ABI on clang side after D61950
llvm-svn: 361365
2019-05-22 09:26:46 +00:00
Fangrui Song 091aaa69d3 [PPC64] Fix PPC64TargetInfo after D61950
llvm-svn: 361363
2019-05-22 09:17:21 +00:00
Fangrui Song 1c61471ab1 [PPC64] Parse -elfv1 -elfv2 when specified on target triple
Summary:
For big-endian powerpc64, the default ABI is ELFv1. OpenPower ABI ELFv2 is supported when -mabi=elfv2 is specified. FreeBSD support for PowerPC64 ELFv2 ABI with LLVM is in progress[1]. This patch adds an alternative way to specify ELFv2 ABI on target triple [2].

The following results are expected:

ELFv1 when using:
-target powerpc64-unknown-freebsd12.0
-target powerpc64-unknown-freebsd12.0 -mabi=elfv1
-target powerpc64-unknown-freebsd12.0-elfv1

ELFv2 when using:
-target powerpc64-unknown-freebsd12.0 -mabi=elfv2
-target powerpc64-unknown-freebsd12.0-elfv2

[1] https://wiki.freebsd.org/powerpc/llvm-elfv2
[2] https://clang.llvm.org/docs/CrossCompilation.html

Patch by Alfredo Dal'Ava Júnior!

Differential Revision: https://reviews.llvm.org/D61950

llvm-svn: 361355
2019-05-22 07:29:59 +00:00
Simon Pilgrim 4bad9c2170 Fix Wimplicit-fallthrough warning introduced in rL357466. NFCI.
llvm-svn: 357467
2019-04-02 11:25:38 +00:00
Strahinja Petrovic 4f839ac188 [PowerPC] Fix issue with inline asm - soft float mode
This patch prevents floating point register
constraints in soft float mode.

Differential Revision: https://reviews.llvm.org/D59310

llvm-svn: 357466
2019-04-02 11:00:09 +00:00
Jason Liu 7f7867b05a Reland the rest of "Add AIX Target Info"
llvm-svn 356197 relanded previously failing test case max_align.c.
This commit will reland the rest of llvm-svn 356060 commit.

Differential Revision: https://reviews.llvm.org/D59048

llvm-svn: 356208
2019-03-14 21:54:30 +00:00
Jason Liu e62ccefe44 Revert "Add AIX Target Info"
This reverts commit 4e192d0e1e.
The newly added test case max_align.c do not work on all platforms.

original llvm-svn: 356060

llvm-svn: 356070
2019-03-13 17:57:23 +00:00
Jason Liu 4e192d0e1e Add AIX Target Info
Summary:
A first pass over platform-specific properties of the C API/ABI
on AIX for both 32-bit and 64-bit modes.
This is a continuation of D18360 by Andrew Paprocki and further work by Wu Zhao.

Patch by Andus Yu

Reviewers: apaprocki, chandlerc, hubert.reinterpretcast, jasonliu,
xingxue, sfertile

Reviewed by: hubert.reinterpretcast, apaprocki, sfertile

Differential Revision: https://reviews.llvm.org/D59048

llvm-svn: 356060
2019-03-13 16:02:26 +00:00
Hubert Tong 45195c873b [PowerPC] Stop defining _ARCH_PWR6X on POWER7 and up
Summary:
The predefined macro `_ARCH_PWR6X` is associated with GCC's
`-mcpu=power6x` option, which enables generation of P6 "raw mode"
instructions such as `mftgpr`.

Later POWER processors build upon the "architected mode", not the raw
one. `_ARCH_PWR6X` should not be defined for these later processors.

Fixes PR#40236.

Reviewers: echristo, hfinkel, kbarton, nemanjai, wschmidt

Reviewed By: hfinkel

Subscribers: jsji, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D58128

llvm-svn: 353975
2019-02-13 20:17:13 +00:00
Brad Smith 09699a7603 long double is double on OpenBSD/NetBSD/PPC.
Patch by George Koehler.

llvm-svn: 353656
2019-02-11 02:53:16 +00:00
Chandler Carruth 2946cd7010 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
2019-01-19 08:50:56 +00:00
Michal Gorny 5a409d0e30 Replace getOS() == llvm::Triple::*BSD with isOS*BSD() [NFCI]
Replace multiple comparisons of getOS() value with FreeBSD, NetBSD,
OpenBSD and DragonFly with matching isOS*BSD() methods.  This should
improve the consistency of coding style without changing the behavior.
Direct getOS() comparisons were left whenever used in switch or switch-
like context.

Differential Revision: https://reviews.llvm.org/D55916

llvm-svn: 349752
2018-12-20 13:09:30 +00:00
Kang Zhang 9606d58a5f [PowerPC] VSX register support for inline assembly
Summary:
The patch is to add the VSX register support for inline assembly. After this 
patch, we can use VSX register in inline assembly clobber list without error.

Reviewed By: jsji,  nemanjai

Differential Revision: https://reviews.llvm.org/D55192

llvm-svn: 348572
2018-12-07 08:58:12 +00:00
Li Jia He bbaedf2ba1 [Clang][PowerPC] Support constraint 'wi' in asm
From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D53265

llvm-svn: 345809
2018-11-01 02:32:49 +00:00
Joerg Sonnenberger 68c0210fa6 By popular demand, switch in64_t on NetBSD/AArch64 and NetBSD/PowerPC64
to long for consistency with other 64bit platforms.

llvm-svn: 337271
2018-07-17 12:33:19 +00:00
Benjamin Kramer ffe60e0403 [Basic] Fix -Wreorder warning
Just use field initializers that don't suffer from this problem

llvm-svn: 334619
2018-06-13 16:45:12 +00:00
Stefan Pintilie a6ce3fe72b [PowerPC] The __float128 type should only be available on Power9
Diasble the use of the type __float128 for PPC machines older
than Power9.

The use of -mfloat128 for PPC machine older than Power9 will result
in an error.

Differential Revision: https://reviews.llvm.org/D48088

llvm-svn: 334613
2018-06-13 16:05:05 +00:00
Bob Wilson fa84fc916c Support Swift calling convention for PPC64 targets
This adds basic support for the Swift calling convention with PPC64 targets.
Patch provided by Atul Sowani in bug report #37223

llvm-svn: 333316
2018-05-25 21:26:03 +00:00
Adrian Prantl 9fc8faf9e6 Remove \brief commands from doxygen comments.
This is similar to the LLVM change https://reviews.llvm.org/D46290.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

for i in $(git grep -l '\@brief'); do perl -pi -e 's/\@brief //g' $i & done
for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46320

llvm-svn: 331834
2018-05-09 01:00:01 +00:00
Erich Keane e44bdb3f70 Add Rest of Targets Support to ValidCPUList (enabling march notes)
A followup to: https://reviews.llvm.org/D42978

Most of the rest of the Targets were pretty rote, so this
patch knocks them all out at once. 

Differential Revision: https://reviews.llvm.org/D43057

llvm-svn: 324676
2018-02-08 23:16:55 +00:00
Erich Keane ebba592682 Break up Targets.cpp into a header/impl pair per target type[NFCI]
Targets.cpp is getting unwieldy, and even minor changes cause the entire thing 
to cause recompilation for everyone. This patch bites the bullet and breaks 
it up into a number of files.

I tended to keep function definitions in the class declaration unless it 
caused additional includes to be necessary. In those cases, I pulled it 
over into the .cpp file. Content is copy/paste for the most part, 
besides includes/format/etc.


Differential Revision: https://reviews.llvm.org/D35701

llvm-svn: 308791
2017-07-21 22:37:03 +00:00