c3d341ea98
Ensure that dump calls that are associated with asserts are removed from
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non-debug build.
llvm-svn: 29105
2006-07-11 17:58:07 +00:00
1b8ea1f5ba
Fix CodeGen/Alpha/2006-07-03-ASMFormalLowering.ll and PR818.
...
llvm-svn: 29099
2006-07-11 01:40:09 +00:00
54a34cd20b
Mark these two classes as hidden, shrinking libllbmgcc.dylib by 25K
...
llvm-svn: 28970
2006-06-28 21:58:30 +00:00
a2e9953c54
Change RET node to include signness information of the return values. e.g.
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RET chain, value1, sign1, value2, sign2
llvm-svn: 28509
2006-05-26 23:09:09 +00:00
aa2372562e
Patches to make the LLVM sources more -pedantic clean. Patch provided
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by Anton Korobeynikov! This is a step towards closing PR786.
llvm-svn: 28447
2006-05-24 17:04:05 +00:00
62f1b83c0e
When we legalize target nodes, do not use getNode to create a new node,
...
use UpdateNodeOperands to just update the operands! This is important because
getNode will allocate a new node if the node returns a flag and this breaks
assumptions in the legalizer that you can legalize some things multiple times
and get exactly the same results.
This latent bug was exposed by my ppc patch last night, and this fixes
gsm/toast.
llvm-svn: 28348
2006-05-17 18:00:08 +00:00
a1cec0106a
Add an assertion, avoid some unneeded work for each call. No functionality
...
change.
llvm-svn: 28347
2006-05-17 17:55:45 +00:00
aaa23d953f
Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo
...
produce it.
llvm-svn: 28338
2006-05-16 22:53:20 +00:00
5f0edfb849
Legalize FORMAL_ARGUMENTS nodes correctly, we don't want to legalize them once
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for each argument.
llvm-svn: 28313
2006-05-16 05:49:56 +00:00
69a0ce6261
Merge identical code.
...
llvm-svn: 28274
2006-05-13 02:11:14 +00:00
1a225d23ae
Fix PR773
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llvm-svn: 28207
2006-05-09 18:20:51 +00:00
20a631fde7
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
...
This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
4ca2ea5b43
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
73eb58e1a2
Simplify some code
...
llvm-svn: 27846
2006-04-19 23:17:50 +00:00
916ae0775e
Fix handling of calls in functions that use vectors. This fixes a crash on
...
the code in GCC PR26546.
llvm-svn: 27780
2006-04-17 22:10:08 +00:00
326870b40b
Codegen insertelement with constant insertion points as scalar_to_vector
...
and a shuffle. For this:
void %test2(<4 x float>* %F, float %f) {
%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
%tmp3 = add <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
%tmp2 = insertelement <4 x float> %tmp3, float %f, uint 2 ; <<4 x float>> [#uses=2]
%tmp6 = add <4 x float> %tmp2, %tmp2 ; <<4 x float>> [#uses=1]
store <4 x float> %tmp6, <4 x float>* %F
ret void
}
we now get this on X86 (which will get better):
_test2:
movl 4(%esp), %eax
movaps (%eax), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, %xmm1
shufps $3, %xmm1, %xmm1
movaps %xmm0, %xmm2
shufps $1, %xmm2, %xmm2
unpcklps %xmm1, %xmm2
movss 8(%esp), %xmm1
unpcklps %xmm1, %xmm0
unpcklps %xmm2, %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%eax)
ret
instead of:
_test2:
subl $28, %esp
movl 32(%esp), %eax
movaps (%eax), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%esp)
movss 36(%esp), %xmm0
movss %xmm0, 8(%esp)
movaps (%esp), %xmm0
addps %xmm0, %xmm0
movaps %xmm0, (%eax)
addl $28, %esp
ret
llvm-svn: 27765
2006-04-17 19:21:01 +00:00
91226e5799
Add support for promoting stores from one legal type to another, allowing us
...
to write one pattern for vector stores instead of 4.
llvm-svn: 27730
2006-04-16 01:36:45 +00:00
086e986e94
Make this assertion better
...
llvm-svn: 27695
2006-04-14 06:08:35 +00:00
119266ea92
Promote vector AND, OR, and XOR
...
llvm-svn: 27632
2006-04-12 21:20:24 +00:00
be8a8933e6
Vector type promotion for ISD::LOAD and ISD::SELECT
...
llvm-svn: 27606
2006-04-12 16:33:18 +00:00
d3b504ae10
Implement support for the formal_arguments node. To get this, targets shouldcustom legalize it and remove their XXXTargetLowering::LowerArguments overload
...
llvm-svn: 27604
2006-04-12 16:20:43 +00:00
7256b0ae05
Only get Tmp2 for cases where number of operands is > 1. Fixed return void.
...
llvm-svn: 27586
2006-04-11 06:33:39 +00:00
6cf3bbbe17
add some todos
...
llvm-svn: 27580
2006-04-11 02:00:08 +00:00
2eb22eef7d
Add basic support for legalizing returns of vectors
...
llvm-svn: 27578
2006-04-11 01:31:51 +00:00
cb73b8d419
Missing break
...
llvm-svn: 27559
2006-04-10 18:54:36 +00:00
02274a5265
Add code generator support for VSELECT
...
llvm-svn: 27542
2006-04-08 22:22:57 +00:00
e1401e3610
Canonicalize vvector_shuffle(x,x) -> vvector_shuffle(x,undef) to enable patterns
...
to match again :)
llvm-svn: 27533
2006-04-08 05:34:25 +00:00
101ea66813
add a sanity check: LegalizeOp should return a value that is the same type
...
as its input.
llvm-svn: 27528
2006-04-08 04:13:17 +00:00
78e3d565af
INSERT_VECTOR_ELT lowering bug:
...
store vector to $esp
store element to $esp + sizeof(VT) * index
load vector from $esp
The bug is VT is the type of the vector element, not the type of the vector!
llvm-svn: 27517
2006-04-08 01:46:37 +00:00
9fa8959dce
Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expanded
...
or custom lowering fails.
llvm-svn: 27432
2006-04-05 06:07:11 +00:00
6be79823e7
* Add supprot for SCALAR_TO_VECTOR operations where the input needs to be
...
promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.
llvm-svn: 27399
2006-04-04 17:23:26 +00:00
42a5fca47e
Implement promotion for EXTRACT_VECTOR_ELT, allowing v16i8 multiplies to work with PowerPC.
...
llvm-svn: 27349
2006-04-02 05:06:04 +00:00
87f080949b
Implement the Expand action for binary vector operations to break the binop
...
into elements and operate on each piece. This allows generic vector integer
multiplies to work on PPC, though the generated code is horrible.
llvm-svn: 27347
2006-04-02 03:57:31 +00:00
ef598059f2
Add a new -view-legalize-dags command line option
...
llvm-svn: 27342
2006-04-02 03:07:27 +00:00
d9e4daabd2
Do not endian swap split vector loads. This fixes UnitTests/Vector/sumarray-dbl on PPC.
...
Now all UnitTests/Vector/* tests pass on PPC.
llvm-svn: 27299
2006-03-31 18:22:37 +00:00
8d90f526d7
Do not endian swap the operands to a store if the operands came from a vector.
...
This fixes UnitTests/Vector/simple.c with altivec.
llvm-svn: 27298
2006-03-31 18:20:46 +00:00
6f42325dca
Implement PromoteOp for VEXTRACT_VECTOR_ELT. Thsi fixes
...
Generic/vector.ll:test_extract_elt on non-sse X86 systems.
llvm-svn: 27294
2006-03-31 17:55:51 +00:00
8e1fcab2bc
Scalarized vector stores need not be legal, e.g. if the vector element type
...
needs to be promoted or expanded. Relegalize the scalar store once created.
This fixes CodeGen/Generic/vector.ll:test1 on non-SSE x86 targets.
llvm-svn: 27293
2006-03-31 17:37:22 +00:00
5fe1f54c17
Significantly improve handling of vectors that are live across basic blocks,
...
handling cases where the vector elements need promotion, expansion, and when
the vector type itself needs to be decimated.
llvm-svn: 27278
2006-03-31 02:06:56 +00:00
168e45b0b3
Expand INSERT_VECTOR_ELT to store vec, sp; store elt, sp+k; vec = load sp;
...
llvm-svn: 27274
2006-03-31 01:27:51 +00:00
f6f94d3bce
Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes.
...
llvm-svn: 27232
2006-03-28 20:24:43 +00:00
e55d171ccd
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
...
llvm-svn: 27201
2006-03-28 00:40:33 +00:00
d5f94c9574
Fix legalization of intrinsics with chain and result values
...
llvm-svn: 27181
2006-03-27 20:28:29 +00:00
30ee72586d
Allow targets to custom lower their own intrinsics if desired.
...
llvm-svn: 27146
2006-03-26 09:12:51 +00:00
68d9bf26c8
Only to vector shuffle for {x,x,y,y} cases when SCALAR_TO_VECTOR is free.
...
llvm-svn: 27071
2006-03-24 18:45:20 +00:00
77e271cb4e
prefer to generate constant pool loads over splats. This prevents us from
...
using a splat for {1.0,1.0,1.0,1.0}
llvm-svn: 27055
2006-03-24 07:29:17 +00:00
a4f6805a86
legalize vbit_convert nodes whose result is a legal type.
...
Legalize intrinsic nodes.
llvm-svn: 27036
2006-03-24 02:26:29 +00:00
1d2e995fc1
Lower BUILD_VECTOR to VECTOR_SHUFFLE if there are two distinct nodes (and if
...
the target can handle it). Issue two SCALAR_TO_VECTOR ops followed by a
VECTOR_SHUFFLE to select from the two vectors.
llvm-svn: 27023
2006-03-24 01:17:21 +00:00
d7c4e7d255
add support for splitting casts. This implements
...
CodeGen/Generic/vector.ll:test_cast_2.
llvm-svn: 26999
2006-03-23 21:16:34 +00:00
9ea1b3f9fd
simplify some code
...
llvm-svn: 26972
2006-03-23 05:29:04 +00:00
Jim Laskey