f3b5b92e58
Don't pass target name into TargetData anymore, it is never used or needed.
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Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
llvm-svn: 28830
2006-06-16 18:22:52 +00:00
88812b5c0a
Make all of the TargetMachine subclasses use the new string TargetData methods.
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This is part of the on-going work on PR 761.
llvm-svn: 28414
2006-05-20 00:24:56 +00:00
20a631fde7
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
3f9c17906f
Disable switch lowering for targets based on the selection dag isel,
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letting the code generator handle them directly.
llvm-svn: 27539
2006-04-08 19:46:55 +00:00
6f95ab7abb
Eliminate IntrinsicLowering from TargetMachine.
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Make the CBE and V9 backends create their own, since they're the only ones that use it.
llvm-svn: 26974
2006-03-23 05:43:16 +00:00
2dd2c652b2
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
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llvm-svn: 26742
2006-03-13 23:20:37 +00:00
5ea06a9f13
add bundling! well not really, for now it's just stop-insertion.
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llvm-svn: 25593
2006-01-25 02:23:38 +00:00
de02d7727f
Add explicit #includes of <iostream>
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llvm-svn: 25515
2006-01-22 23:41:00 +00:00
bcbcfac6ea
click click
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llvm-svn: 25459
2006-01-19 14:13:11 +00:00
b28f214033
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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llvm-svn: 24233
2005-11-08 02:11:51 +00:00
4645db0948
ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
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a bunch of other things) but is currently ignored by the code
generator.
llvm-svn: 24206
2005-11-06 04:29:30 +00:00
f221c261f3
DAG->DAG instruction selection for ia64! "hello world" works, not much else.
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use -enable-ia64-dag-isel to turn this on
TODO: delete lowering stuff from the pattern isel
: get operations on predicate bits working
: get other bits of pseudocode going
: use sampo's mulh/mull-using divide-by-constant magic
: *so* many patterns ("extr", "tbit" and "dep" will be fun :)
: add FP
: add a JIT!
: get it working 100%
in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.
OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.
llvm-svn: 24058
2005-10-28 17:46:35 +00:00
19058c3989
1. Use SubtargetFeatures in llc/lli.
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2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
llvm-svn: 23192
2005-09-01 21:38:21 +00:00
f11f48ba61
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
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interface.
llvm-svn: 22282
2005-06-25 02:48:37 +00:00
e73e76dc42
Convert tabs to spaces
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llvm-svn: 21452
2005-04-22 17:54:37 +00:00
89b8c8d215
Remove trailing whitespace
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llvm-svn: 21424
2005-04-21 23:13:11 +00:00
91ed0a11cf
and so it begins...
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PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!
llvm-svn: 20652
2005-03-17 18:17:03 +00:00
Chris Lattner