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70 Commits

Author SHA1 Message Date
Evan Cheng af5ae57333 Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail. 
llvm-svn: 29072
 2006-07-07 21:37:21 +00:00
Chris Lattner c5bb8ab1d5 Port some bugfixes in shift handling from SimplifyDemandedBits over to 
ComputeMaskedBits.  DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.

llvm-svn: 28768
 2006-06-13 16:52:37 +00:00
Jim Laskey 8cac9cd5f6 TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts. 
llvm-svn: 28765
 2006-06-13 13:08:58 +00:00
Andrew Lenharth 0e57b2cb92 Start on my todo list 
llvm-svn: 28752
 2006-06-12 16:07:18 +00:00
Evan Cheng 19aaaca293 Another typo. Pointed out by Nate Begeman. 
llvm-svn: 28353
 2006-05-17 18:22:14 +00:00
Evan Cheng 6dcec44fec Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal. 
llvm-svn: 28351
 2006-05-17 18:10:06 +00:00
Andrew Lenharth 20eb2ce871 this should be 128 I think 
llvm-svn: 28330
 2006-05-16 17:45:23 +00:00
Andrew Lenharth 1dc9ec5874 Move this code to a common place 
llvm-svn: 28329
 2006-05-16 17:42:15 +00:00
Owen Anderson 8c2c1e90c4 Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Chris Lattner 10c653744e When tracking demanded bits, if any bits from the sext of an SRA are demanded, 
then so is the input sign bit.  This fixes mediabench/g721 on X86.

llvm-svn: 28166
 2006-05-08 17:22:53 +00:00
Chris Lattner cd4a643728 Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us 
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.

llvm-svn: 28155
 2006-05-06 23:48:13 +00:00
Chris Lattner 4f3de3e33c Add some more sign propagation cases 
llvm-svn: 28154
 2006-05-06 23:40:29 +00:00
Chris Lattner f86075731d Add some more simple sign bit propagation cases. 
llvm-svn: 28149
 2006-05-06 22:39:59 +00:00
Chris Lattner 7206d74f0c Add some really really simple code for computing sign-bit propagation. 
This will certainly be enhanced in the future.

llvm-svn: 28145
 2006-05-06 09:27:13 +00:00
Chris Lattner 86a1467fc0 Fold (trunc (srl x, c)) -> (srl (trunc x), c) 
llvm-svn: 28138
 2006-05-06 00:11:52 +00:00
Chris Lattner 0f64932a5c Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE 
llvm-svn: 28135
 2006-05-05 22:32:12 +00:00
Owen Anderson 20a631fde7 Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.

llvm-svn: 28074
 2006-05-03 01:29:57 +00:00
Chris Lattner 6c1321ca3f relax assertion 
llvm-svn: 27358
 2006-04-02 06:19:46 +00:00
Chris Lattner e6025525fb Allow targets to compute masked bits for intrinsics. 
llvm-svn: 27357
 2006-04-02 06:15:09 +00:00
Chris Lattner 051f7861b8 Was returning the wrong type. 
llvm-svn: 27277
 2006-03-31 01:50:09 +00:00
Chris Lattner f144dac7b7 Modify the TargetLowering::getPackedTypeBreakdown method to also return the 
unpromoted element type.

llvm-svn: 27273
 2006-03-31 00:46:36 +00:00
Chris Lattner 549fb167eb Implement TargetLowering::getPackedTypeBreakdown 
llvm-svn: 27270
 2006-03-31 00:28:56 +00:00
Evan Cheng 4b5b4e373b Typo 
llvm-svn: 27008
 2006-03-23 23:24:51 +00:00
Chris Lattner ad74844bfa set TransformToType correctly for vector types. 
llvm-svn: 26797
 2006-03-16 19:50:01 +00:00
Evan Cheng af598d2461 Add LSR hooks. 
llvm-svn: 26740
 2006-03-13 23:18:16 +00:00
Chris Lattner 3d761b6211 I can't convince myself that this is safe, remove the recursive call. 
llvm-svn: 26725
 2006-03-13 06:42:16 +00:00
Chris Lattner c726a5c31f Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1), 
we want to canonicalize the other way.

llvm-svn: 26547
 2006-03-05 19:52:57 +00:00
Evan Cheng a7fb285c60 Number of NodeTypes now exceeds 128. 
llvm-svn: 26503
 2006-03-03 06:58:59 +00:00
Chris Lattner 4a2eeea671 Add interfaces for targets to provide target-specific dag combiner optimizations. 
llvm-svn: 26442
 2006-03-01 04:52:55 +00:00
Chris Lattner ab8164042a Implement bit propagation through sub nodes, this (re)implements 
PowerPC/div-2.ll

llvm-svn: 26392
 2006-02-27 01:00:42 +00:00
Chris Lattner a60751dd43 Check RHS simplification before LHS simplification to avoid infinitely looping 
on PowerPC/small-arguments.ll

llvm-svn: 26389
 2006-02-27 00:36:27 +00:00
Chris Lattner 27220f8958 Just like we use the RHS of an AND to simplify the LHS, use the LHS to 
simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26388
 2006-02-27 00:22:28 +00:00
Chris Lattner 118ddba929 Add a bunch of missed cases. Perhaps the most significant of which is that 
assertzext produces zero bits.

llvm-svn: 26386
 2006-02-26 23:36:02 +00:00
Chris Lattner 2a9e1e3e74 Recognize memory operand codes 
llvm-svn: 26345
 2006-02-24 01:10:46 +00:00
Chris Lattner 2e124af406 Don't return registers from register classes that aren't legal. 
llvm-svn: 26317
 2006-02-22 23:00:51 +00:00
Chris Lattner 7ad77dfc2a split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner 7bb4696dc3 Updates to match change of getRegForInlineAsmConstraint prototype 
llvm-svn: 26305
 2006-02-21 23:11:00 +00:00
Nate Begeman 983ca89714 Add a fold for add that exchanges it with a constant shift if possible, so 
that the shift may be more easily folded into other operations.

llvm-svn: 26286
 2006-02-18 02:43:25 +00:00
Jeff Cohen 0d62ebd13f Fix bug noticed by VC++. 
llvm-svn: 26252
 2006-02-17 02:12:18 +00:00
Nate Begeman 8a77efe4f7 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Evan Cheng 4b40a42653 Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
llvm-svn: 26174
 2006-02-14 08:38:30 +00:00
Chris Lattner ee1dadbccf implementation of some methods for inlineasm 
llvm-svn: 25951
 2006-02-04 02:13:02 +00:00
Nate Begeman 20a894282d Implement some feedback from sabre 
llvm-svn: 25946
 2006-02-03 22:38:07 +00:00
Nate Begeman dc7bba9ffe Add a framework for eliminating instructions that produces undemanded bits. 
llvm-svn: 25945
 2006-02-03 22:24:05 +00:00
Chris Lattner e0c60d63b1 Implement MaskedValueIsZero for ANY_EXTEND nodes 
llvm-svn: 25900
 2006-02-02 06:43:15 +00:00
Chris Lattner 7ed3101d14 Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. 
llvm-svn: 25866
 2006-02-01 01:29:47 +00:00
Chris Lattner f0b24d2dc0 Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner c6fa0282d2 adjust prototype 
llvm-svn: 25798
 2006-01-30 03:49:07 +00:00
Chris Lattner 8a4a3deaf9 clean up interface to ValueTypeActions 
llvm-svn: 25783
 2006-01-29 08:41:12 +00:00
Chris Lattner 32fef53f5c Implement a method for inline asm support 
llvm-svn: 25660
 2006-01-26 20:37:03 +00:00