Evan Cheng
|
74065bedf2
|
This opt is now handled in DAG combine.
llvm-svn: 29243
|
2006-07-21 08:26:46 +00:00 |
Evan Cheng
|
4cf0238720
|
A splat of a vector constant of all zero or all one is the vector constant.
llvm-svn: 29234
|
2006-07-20 23:09:47 +00:00 |
Chris Lattner
|
c8db10725b
|
Add information preventing several register class constraints from working.
This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
llvm-svn: 29118
|
2006-07-12 16:59:49 +00:00 |
Chris Lattner
|
298ef37e02
|
Implement the inline asm 'A' constraint. This implements PR825 and
CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
llvm-svn: 29101
|
2006-07-11 02:54:03 +00:00 |
Evan Cheng
|
79cf9a5342
|
Fixed stack objects do not specify alignments, but their offsets are known.
Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
llvm-svn: 29090
|
2006-07-10 21:37:44 +00:00 |
Chris Lattner
|
9aabc1e16f
|
Mark internal function static
llvm-svn: 29085
|
2006-07-10 19:53:12 +00:00 |
Evan Cheng
|
5987cfb7b1
|
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
llvm-svn: 29042
|
2006-07-07 08:33:52 +00:00 |
Evan Cheng
|
0261242aa6
|
Reorg. No functionality change.
llvm-svn: 28999
|
2006-07-05 22:17:51 +00:00 |
Evan Cheng
|
38c5aee959
|
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
llvm-svn: 28910
|
2006-06-24 08:36:10 +00:00 |
Evan Cheng
|
de7156f12c
|
Type of vector extract / insert index operand should be iPTR.
llvm-svn: 28796
|
2006-06-15 08:14:54 +00:00 |
Evan Cheng
|
ca25486603
|
Add argument registers to the end of call operand list (partial fix).
llvm-svn: 28783
|
2006-06-14 18:17:40 +00:00 |
Evan Cheng
|
0e14a56d35
|
Minor compilation speed improvement.
llvm-svn: 28736
|
2006-06-09 06:24:42 +00:00 |
Evan Cheng
|
dc614c193e
|
Added X86FunctionInfo subclass of MachineFunction to record whether the
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.
llvm-svn: 28703
|
2006-06-06 23:30:24 +00:00 |
Evan Cheng
|
2b2c1be49c
|
Typos
llvm-svn: 28617
|
2006-06-01 05:53:27 +00:00 |
Evan Cheng
|
2489ccdd90
|
Remove a warning
llvm-svn: 28607
|
2006-06-01 00:30:39 +00:00 |
Evan Cheng
|
550cb663e8
|
Remove dead code.
llvm-svn: 28581
|
2006-05-31 00:50:42 +00:00 |
Evan Cheng
|
a3add0fea8
|
Change RET node to include signness information of the return values. i.e.
RET chain, value1, sign1, value2, sign2, ...
llvm-svn: 28510
|
2006-05-26 23:10:12 +00:00 |
Evan Cheng
|
b92f418408
|
Vector argument must be passed in memory location aligned on 16-byte boundary.
llvm-svn: 28505
|
2006-05-26 20:37:47 +00:00 |
Evan Cheng
|
bfb5ea6875
|
Mac OS X ABI document lied. The first four XMM registers are used to pass
vector arguments, not three.
llvm-svn: 28504
|
2006-05-26 19:22:06 +00:00 |
Evan Cheng
|
a01e799927
|
Minor update to make the code more clear
llvm-svn: 28499
|
2006-05-26 18:39:59 +00:00 |
Evan Cheng
|
cbfb3d07e0
|
Update more comments.
llvm-svn: 28498
|
2006-05-26 18:37:16 +00:00 |
Evan Cheng
|
763f9b00f0
|
Fix some comments.
llvm-svn: 28497
|
2006-05-26 18:25:43 +00:00 |
Evan Cheng
|
83dc51d7ff
|
No need to handle illegal types.
llvm-svn: 28496
|
2006-05-26 18:22:49 +00:00 |
Evan Cheng
|
8aca43e8da
|
Consistency
llvm-svn: 28488
|
2006-05-25 23:31:23 +00:00 |
Evan Cheng
|
0421aca87a
|
Some clean up.
llvm-svn: 28483
|
2006-05-25 22:38:31 +00:00 |
Evan Cheng
|
29f805ec65
|
Remove some dead code.
llvm-svn: 28481
|
2006-05-25 22:25:52 +00:00 |
Evan Cheng
|
5ee96893ae
|
Build breakage.
llvm-svn: 28475
|
2006-05-25 18:56:34 +00:00 |
Evan Cheng
|
2a33094284
|
Switch X86 over to a call-selection model where the lowering code creates
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.
llvm-svn: 28463
|
2006-05-25 00:59:30 +00:00 |
Chris Lattner
|
a58f559848
|
Fix file header comment
llvm-svn: 28441
|
2006-05-23 23:20:42 +00:00 |
Evan Cheng
|
7068a93cae
|
Better way to check for vararg.
llvm-svn: 28440
|
2006-05-23 21:08:24 +00:00 |
Evan Cheng
|
17e734f0a6
|
Remove PreprocessCCCArguments and PreprocessFastCCArguments now that
FORMAL_ARGUMENTS nodes include a token operand.
llvm-svn: 28439
|
2006-05-23 21:06:34 +00:00 |
Chris Lattner
|
8be5be817c
|
Implement an annoying part of the Darwin/X86 abi: the callee of a struct
return argument pops the hidden struct pointer if present, not the caller.
For example, in this testcase:
struct X { int D, E, F, G; };
struct X bar() {
struct X a;
a.D = 0;
a.E = 1;
a.F = 2;
a.G = 3;
return a;
}
void foo(struct X *P) {
*P = bar();
}
We used to emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
addl $28, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
ret
This is correct on Linux/X86 but not Darwin/X86. With this patch, we now
emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
*** addl $24, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
*** ret $4
For the record, GCC emits (which is functionally equivalent to our new code):
_bar:
movl 4(%esp), %eax
movl $3, 12(%eax)
movl $2, 8(%eax)
movl $1, 4(%eax)
movl $0, (%eax)
ret $4
_foo:
pushl %esi
subl $40, %esp
movl 48(%esp), %esi
leal 16(%esp), %eax
movl %eax, (%esp)
call _bar
subl $4, %esp
movl 16(%esp), %eax
movl %eax, (%esi)
movl 20(%esp), %eax
movl %eax, 4(%esi)
movl 24(%esp), %eax
movl %eax, 8(%esi)
movl 28(%esp), %eax
movl %eax, 12(%esi)
addl $40, %esp
popl %esi
ret
This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729. The CBE still needs to
be updated.
llvm-svn: 28438
|
2006-05-23 18:50:38 +00:00 |
Chris Lattner
|
01dd6df5f3
|
CSRet allows varargs
llvm-svn: 28409
|
2006-05-19 21:34:04 +00:00 |
Evan Cheng
|
8c6b234ce8
|
Should pass by reference.
llvm-svn: 28357
|
2006-05-17 19:07:40 +00:00 |
Chris Lattner
|
c7df70db57
|
Implement the custom lowering hook right, returning values for all of the
arguments at once.
llvm-svn: 28327
|
2006-05-16 17:14:26 +00:00 |
Chris Lattner
|
7b8b8bbbf9
|
Fix a bug I introduced yesterday, which broke functions with *no* arguments.
llvm-svn: 28326
|
2006-05-16 17:08:35 +00:00 |
Evan Cheng
|
9fee442e63
|
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
llvm-svn: 28324
|
2006-05-16 07:21:53 +00:00 |
Chris Lattner
|
3d82699605
|
Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
it doesn't currently use/maintain the chain properly. Also, make the
X86ISelLowering.cpp file 80-col clean.
llvm-svn: 28320
|
2006-05-16 06:45:34 +00:00 |
Chris Lattner
|
22f95b74ba
|
Dead variable
llvm-svn: 28265
|
2006-05-12 21:12:22 +00:00 |
Chris Lattner
|
6d4a2dc4ad
|
Teach the X86 backend about non-i32 inline asm register classes.
llvm-svn: 28139
|
2006-05-06 00:29:37 +00:00 |
Chris Lattner
|
44a73e9fa5
|
Teach the code generator to use cvtss2sd as extload f32 -> f64
llvm-svn: 28131
|
2006-05-05 21:35:18 +00:00 |
Owen Anderson
|
20a631fde7
|
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.
llvm-svn: 28074
|
2006-05-03 01:29:57 +00:00 |
Evan Cheng
|
88decded82
|
Initial caller side support (for CCC only, not FastCC) of 128-bit vector
passing by value.
llvm-svn: 28015
|
2006-04-28 21:29:37 +00:00 |
Evan Cheng
|
3cd4362ade
|
Implement four-wide shuffle with 2 shufps if no more than two elements come
from each vector. e.g.
shuffle(G1, G2, 7, 1, 5, 2)
==>
movaps _G2, %xmm0
shufps $151, _G1, %xmm0
shufps $216, %xmm0, %xmm0
llvm-svn: 28011
|
2006-04-28 07:03:38 +00:00 |
Evan Cheng
|
d43c5c6046
|
TargetLowering::LowerArguments should return a VBIT_CONVERT of
FORMAL_ARGUMENTS SDOperand in the return result vector.
llvm-svn: 28009
|
2006-04-28 05:25:15 +00:00 |
Evan Cheng
|
f4f3f0d25f
|
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
for now.
Patch contributed by Alexander Friedman.
llvm-svn: 27994
|
2006-04-27 08:40:39 +00:00 |
Evan Cheng
|
89001ad729
|
Support for passing 128-bit vector arguments via XMM registers.
llvm-svn: 27992
|
2006-04-27 08:31:10 +00:00 |
Evan Cheng
|
a0374e1bed
|
Oops
llvm-svn: 27989
|
2006-04-27 05:44:50 +00:00 |
Evan Cheng
|
24eb3f4765
|
Bug fix: not updating NumIntRegs.
llvm-svn: 27988
|
2006-04-27 05:35:28 +00:00 |
Evan Cheng
|
48940d16b2
|
- Clean up formal argument lowering code. Prepare for vector pass by value work.
- Fixed vararg support.
llvm-svn: 27985
|
2006-04-27 01:32:22 +00:00 |