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4 Commits

Author SHA1 Message Date
David Green d96161a179 [ARM/AArch64] Move REQUIRES after update_cc_test_checks line. NFC 
c17d9b4b12 added REQUIRES lines to a lot of Arm and AArch64
test, but added them to the very beginning, before the existing
update_cc_test_checks lines. This just moves them later so as to not
mess up the existing ordering when the checks are regenerated.
 2021-11-13 19:09:01 +00:00
Bradley Smith 0ce46a1d43 [AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale 
This patch splits the existing SveVectorBits LangOpt into VScaleMin and
VScaleMax LangOpts such that we can represent such an option. The cc1
option has also been split into -mvscale-{min,max}=<n> options so that the
cc1 arguments better reflect the vscale_range IR attribute.

Differential Revision: https://reviews.llvm.org/D111790
 2021-10-25 11:10:52 +00:00
Bradley Smith ed31ff9c7a [AArch64][SVE] Add missing target require to test 
Differential revision: https://reviews.llvm.org/D104643
 2021-06-21 15:36:44 +01:00
Bradley Smith 9e7329e37e [AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries 
Differential Revision: https://reviews.llvm.org/D103702
 2021-06-21 13:00:36 +01:00