d39d026324
[X86][SSE4A] Use native IR for mask movntsd/movntss intrinsics.
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Depends on llvm side commit r273002.
llvm-svn: 273003
2016-06-17 14:28:16 +00:00
99665cb77f
Added note to SSE4a builtins about keeping in sync with llvm tests
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llvm-svn: 263116
2016-03-10 14:44:32 +00:00
dfd2cf3f89
Updated test names to match the intrinsics being tested
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llvm-svn: 254848
2015-12-05 11:08:51 +00:00
068c2ce836
[X86] Stripped backend codegen tests
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As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86 as fast-isel tests using IR that is as close to what is generated here as possible.
The llvm tests will (re)added in a future commit
I will update PR24580 on this new plan
llvm-svn: 254594
2015-12-03 08:45:21 +00:00
cd875efa78
Canonicalize some of the x86 builtin tests and either remove or comment
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about optimization options.
llvm-svn: 250271
2015-10-14 05:40:21 +00:00
437cc973fb
[X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
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llvm-svn: 246974
2015-09-07 20:10:11 +00:00
ba6e2528fa
Add an ammintrin.h header for SSE4a intrinsics.
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This is a clean-room implementation based on public documentation and
I tried to validate it as much as possible against gcc.
llvm-svn: 157638
2012-05-29 19:10:17 +00:00
Simon Pilgrim