4a105d73a9
AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads
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This moves of the r600 logic out of isGlobalLoad() and into the
TableGen files.
Differential Revision: http://reviews.llvm.org/D21710
llvm-svn: 274527
2016-07-05 00:12:51 +00:00
81f1b30035
AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
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Reviewers: tstellard
Subscribers: arsenm
Differential Revision: http://reviews.llvm.org/D19785
llvm-svn: 269473
2016-05-13 20:39:16 +00:00
295875efda
AMDGPU: Remove 24-bit intrinsics
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The known bit matching code seems to work reasonably well,
so these shouldn't really be needed.
llvm-svn: 259180
2016-01-29 10:05:16 +00:00
e0e582c9aa
AMDGPU: Add MEM_RAT STORE_TYPED.
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v2: Add test (Matt).
Fix capitalization of isEOP (Matt).
Move pattern to class parameter (Matt).
Make the instruction available to Cayman (Matt).
Change name from MEM_RAT WRITE_TYPED to MEM_RAT STORE_TYPED.
Patch by: Zoltan Gilian
llvm-svn: 249042
2015-10-01 17:51:34 +00:00
45bb48ea19
R600 -> AMDGPU rename
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llvm-svn: 239657
2015-06-13 03:28:10 +00:00
Tom Stellard