766cb697a8
[mips][msa] Added support for matching pcnt from normal IR (i.e. not intrinsics)
...
llvm-svn: 191198
2013-09-23 13:40:21 +00:00
f7456c78f0
[mips][msa] Added support for matching nor from normal IR (i.e. not intrinsics)
...
llvm-svn: 191195
2013-09-23 13:22:24 +00:00
8ca81e484e
[mips][msa] Added support for matching and, or, and xor from normal IR (i.e. not intrinsics)
...
llvm-svn: 191194
2013-09-23 12:57:42 +00:00
7a289d0e39
[mips][msa] Implemented build_vector using ldi, fill, and custom SelectionDAG nodes (VSPLAT and VSPLATD)
...
Note: There's a later patch on my branch that re-implements this to select
build_vector without the custom SelectionDAG nodes. The future patch avoids
the constant-folding problems stemming from the custom node (i.e. it doesn't
need to re-implement all the DAG combines related to BUILD_VECTOR).
Changes to MIPS specific SelectionDAG nodes:
* Added VSPLAT
This is a special case of BUILD_VECTOR that covers the case the
BUILD_VECTOR is a splat operation.
* Added VSPLATD
This is a special case of VSPLAT that handles the cases when v2i64 is legal
llvm-svn: 191191
2013-09-23 12:02:46 +00:00
7fab912257
[mips][msa] Added test cases that were supposed to be part of r190507, r190509, r190512, and r190518.
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llvm-svn: 190522
2013-09-11 12:39:25 +00:00
fbcb582942
[mips][msa] Added support for matching mulv, nlzc, sll, sra, srl, and subv from normal IR (i.e. not intrinsics)
...
llvm-svn: 190518
2013-09-11 11:58:30 +00:00
f5bd937bc4
[mips][msa] Added support for matching fadd, fdiv, flog2, fmul, frint, fsqrt, and fsub from normal IR (i.e. not intrinsics)
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llvm-svn: 190512
2013-09-11 10:51:30 +00:00
607952bdad
[mips][msa] Added support for matching div_[su] from normal IR (i.e. not intrinsics)
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llvm-svn: 190509
2013-09-11 10:38:58 +00:00
fa5ab1c856
[mips][msa] Added support for matching addv from normal IR (i.e. not intrinsics)
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The corresponding intrinsic is now lowered into equivalent IR (ISD::ADD) before instruction selection.
llvm-svn: 190507
2013-09-11 10:28:16 +00:00
cb2929c239
[mips][msa] Corrected the definition of the dotp_[su].[hwd] intrinsics
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The elements of the operands should be half the width of the elements of
the result.
llvm-svn: 190505
2013-09-11 09:59:17 +00:00
f561730af8
[mips][msa] Removed unsupported dot product instructions (dotp_[su].b)
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The dotp_[su].b instructions never existed in any revision of the MSA spec.
llvm-svn: 190398
2013-09-10 09:51:43 +00:00
ce09d07824
[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v
...
These intrinsics are legalized to V(ALL|ANY)_(NON)?ZERO nodes,
are matched as SN?Z_[BHWDV]_PSEUDO pseudo's, and emitted as
a branch/mov sequence to evaluate to 0 or 1.
Note: The resulting code is sub-optimal since it doesnt seem to be possible
to feed the result of an intrinsic directly into a brcond. At the moment
it uses (SETCC (VALL_ZERO $ws), 0, SETEQ) and similar which unnecessarily
evaluates the boolean twice.
llvm-svn: 189478
2013-08-28 12:14:50 +00:00
e6ed5b72f1
[mips][msa] Added load/store intrinsics.
...
llvm-svn: 189476
2013-08-28 12:04:29 +00:00
ba9c8505fb
[mips][msa] Added move.v
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llvm-svn: 189471
2013-08-28 10:44:47 +00:00
f9aa1d1902
[mips][msa] Added cfcmsa, and ctcmsa
...
The MSA control registers have been added as reserved registers,
and are only used via ISD::Copy(To|From)Reg. The intrinsics are lowered
into these nodes.
llvm-svn: 189468
2013-08-28 10:26:24 +00:00
0dc0dd464b
[mips][msa] Added f[cs]af, f[cs]or, f[cs]ueq, f[cs]ul[et], f[cs]une, fsun, ftrunc_[su], hadd_[su], hsub_[su], sr[al]r, sr[al]ri
...
llvm-svn: 189467
2013-08-28 10:12:09 +00:00
2d999ebb84
[mips][msa] Summarize tests
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Adds a comment to the start of each test summarizing the area the test covers.
llvm-svn: 189465
2013-08-28 10:02:29 +00:00
c426754a57
[mips][msa] Added tests for and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v when non-byte vectors are used.
...
Note that all of these tests use ld.b and st.b for the loads and stores
regardless of the data size. This is because the definition of bitcast is
equivalent to a store/load sequence and DAG combiner accordingly folds bitcasts
to/from v16i8 into the load/store nodes to product load/store nodes with
type v16i8.
llvm-svn: 189333
2013-08-27 10:16:17 +00:00
b8bce4d935
[mips][msa] Added spill/reload support
...
llvm-svn: 189332
2013-08-27 10:04:21 +00:00
70835f6025
[mips][msa] Added bitconverts for vector types for big and little-endian
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llvm-svn: 189330
2013-08-27 09:40:30 +00:00
4260527f5f
[mips][msa] Removed fcge, fcgt, fsge, fsgt
...
These instructions were present in a draft spec but were removed before
publication.
llvm-svn: 188782
2013-08-20 09:41:47 +00:00
f2a0f1d133
[mips][msa] Added insve
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llvm-svn: 188777
2013-08-20 09:22:54 +00:00
869bdad93a
[mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v
...
llvm-svn: 188767
2013-08-20 08:38:21 +00:00
d12e837f05
[Mips][msa] Added the simple builtins (madd_q to xori)
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Includes:
madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su],
msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev,
pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al],
sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori
Patch by Daniel Sanders
llvm-svn: 188460
2013-08-15 14:22:07 +00:00
b95ee69163
[Mips][msa] Added the simple builtins (fadd to ftq)
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Includes:
fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2,
fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin,
fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt,
fsne, fsqr, fsub, ftint_s, ftq
Patch by Daniel Sanders
llvm-svn: 188458
2013-08-15 13:45:36 +00:00
babdcc8c2c
[Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)
...
Includes:
add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd],
bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti,
c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su],
dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve,
ldi
Patch by Daniel Sanders
llvm-svn: 188457
2013-08-15 12:24:57 +00:00
Daniel Sanders