efb4d9ef80
Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
...
llvm-svn: 48510
2008-03-18 22:29:51 +00:00
5fef9aea12
Fix PR 2160 by making sure arguments to external functions get marked as pointing to anything
...
llvm-svn: 48509
2008-03-18 22:22:53 +00:00
a043a9b0f0
Do not pass -g flag when compiling tests, so remove the C.Flags. This only happens if you have a debug build of llvm.
...
llvm-svn: 48498
2008-03-18 19:59:04 +00:00
12c76db312
Make conversions of i8/i16 to ppcf128 work.
...
llvm-svn: 48493
2008-03-18 17:28:38 +00:00
3e408d4d82
Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
...
llvm-svn: 48491
2008-03-18 16:46:39 +00:00
d096ec0a86
Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs.
...
llvm-svn: 48490
2008-03-18 08:26:47 +00:00
4e59897d3d
Upgrade tests to not use llvm-upgrade.
...
llvm-svn: 48484
2008-03-18 04:14:37 +00:00
baa370b37a
Upgrade tests to not use llvm-upgrade.
...
llvm-svn: 48483
2008-03-18 03:45:45 +00:00
3b79fdcae5
ensure we continue matching x86-64 rotates.
...
llvm-svn: 48437
2008-03-17 01:35:03 +00:00
ab4b7d36cd
C and Objective Caml bindings for the TargetData class.
...
llvm-svn: 48422
2008-03-16 20:08:03 +00:00
82a0e74f43
C and Objective Caml bindings for several scalar transforms.
...
Patch originally by Erick Tryzelaar, but has been modified somewhat.
llvm-svn: 48419
2008-03-16 16:32:40 +00:00
ec6f1669d3
All of these tests had out of date syntax and were never even running through
...
llvm-upgrade because nobody noticed them failing.
Update to use new syntax and actually check for the right failure by looking at
the error message.
llvm-svn: 48417
2008-03-16 07:55:46 +00:00
942035d8b3
Functions are allowed to return structures. (Note that this test never failed.)
...
llvm-svn: 48416
2008-03-16 07:49:49 +00:00
227c7a290b
Regressions/ is long gone.
...
llvm-svn: 48415
2008-03-16 07:31:23 +00:00
878114bf16
C and Objective Caml bindings for PassManagers.
...
llvm-svn: 48413
2008-03-16 04:20:44 +00:00
84aec09fdb
Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.
...
llvm-svn: 48371
2008-03-14 20:44:01 +00:00
68a930b33e
The inst combining of inttoptr into GEP with one index was using the bit size of
...
the type instead of the byte size. This was causing troublesome mis-compilations.
True to form, this took 2 days to find and is a one-line fix. :-P
llvm-svn: 48354
2008-03-14 05:12:19 +00:00
b72127ac4c
More APInt-ification.
...
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
7a69e3aef3
Fix a bug in GVN that Duncan noticed, where we potentially need to insert a
...
pointer bitcast when performing return slot optimization.
llvm-svn: 48343
2008-03-13 22:07:10 +00:00
c21cfe37ec
Fix error in testing for END. notation.
...
Patch by Julien Lerouge. Thanks!
llvm-svn: 48342
2008-03-13 22:02:51 +00:00
442d708bfb
New test case.
...
llvm-svn: 48338
2008-03-13 08:05:02 +00:00
ecde45ecb5
A test case I forgot to check in.
...
llvm-svn: 48335
2008-03-13 06:42:46 +00:00
5c26bde55e
TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
...
llvm-svn: 48333
2008-03-13 06:37:55 +00:00
65e9d5f1a8
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
...
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
llvm-svn: 48307
2008-03-12 22:19:41 +00:00
f7492cf0ec
Fix this test on hosts that don't have sse2.
...
llvm-svn: 48296
2008-03-12 20:40:51 +00:00
ee8d960ed1
no need to keep around this output.
...
llvm-svn: 48285
2008-03-12 17:14:06 +00:00
6ff0b822b4
Improve the return slot optimization to be both more aggressive (not limited to sret parameters), and
...
safer (when the passed pointer might be invalid). Thanks to Duncan and Chris for the idea behind this,
and extra thanks to Duncan for helping me work out the trap-safety.
llvm-svn: 48280
2008-03-12 07:37:44 +00:00
35f8f07c00
Make this test x86-specific for now; targets that don't use
...
the automated CallingConv code to handle return values typically
don't support multiple return values.
llvm-svn: 48265
2008-03-12 00:25:14 +00:00
fa8667a2dd
Fix attribute handling.
...
llvm-svn: 48262
2008-03-12 00:07:03 +00:00
8a361c1f92
Basic feature test for multiple return values in codegen.
...
llvm-svn: 48260
2008-03-11 23:53:16 +00:00
80b53b8f6b
Testcase for PR2137
...
llvm-svn: 48258
2008-03-11 22:43:42 +00:00
7358165c99
Handle multiple ret values.
...
llvm-svn: 48254
2008-03-11 22:24:29 +00:00
20af5a0fe7
Check to see if a two-entry PHI block can be simplified
...
before trying to merge the block into its predecessors.
This allows two-entry-phi-return.ll to be simplified
into a single basic block.
llvm-svn: 48252
2008-03-11 21:53:06 +00:00
8e9ae96a4a
Make this test more challenging to help it avoid being
...
optimized away before it tests what it is intended to test.
llvm-svn: 48251
2008-03-11 21:47:57 +00:00
6f51973734
Update testcase for recent aliases change
...
llvm-svn: 48250
2008-03-11 21:42:20 +00:00
6616836e71
Add a test to ensure that all-ones vectors are materialized with pcmpeqd.
...
llvm-svn: 48247
2008-03-11 21:37:00 +00:00
44b4c07cd1
Use the correct value for InSignBit.
...
llvm-svn: 48245
2008-03-11 21:29:43 +00:00
8abed80a69
Implement basic support for the 'f' register class constraint. This basically
...
works, but probably won't if you mix it with 't' or 'u' yet.
llvm-svn: 48243
2008-03-11 19:50:13 +00:00
1b12647544
The feature this is testing did not work in the general case,
...
and has been removed.
llvm-svn: 48232
2008-03-11 17:48:26 +00:00
34e5b34426
Learn how to xfail a test.
...
llvm-svn: 48219
2008-03-11 07:51:31 +00:00
e88a625ecd
When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
...
llvm-svn: 48218
2008-03-11 07:19:34 +00:00
756f9d9c51
XFAIL due to Dale's change.
...
llvm-svn: 48216
2008-03-11 07:15:44 +00:00
a7a2075ab8
Initial multiple return values support.
...
llvm-svn: 48210
2008-03-11 05:46:42 +00:00
319234d67c
Upgrade this test.
...
llvm-svn: 48207
2008-03-11 02:19:59 +00:00
d6819da453
Generalize ExpandIntToFP to handle the case where the operand is legal
...
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
llvm-svn: 48206
2008-03-11 01:59:03 +00:00
92275427e5
- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.
...
- Add test pattern matching in CellSPU's icmp32.ll test harness
- Fix CellSPU fcmp.ll-generated assert.
llvm-svn: 48197
2008-03-10 23:49:09 +00:00
7362d38391
Don't emit FP_REG_KILL into a block that just returns. Nothing
...
can be live out of the block anyway, so it isn't needed.
llvm-svn: 48192
2008-03-10 23:34:12 +00:00
f4300950f1
Implement more support for fp-to-i128 and i128-to-fp conversions.
...
llvm-svn: 48189
2008-03-10 23:03:31 +00:00
24155f7381
Update llc flags for PPC register scavenger.
...
llvm-svn: 48187
2008-03-10 22:59:08 +00:00
1d9848e391
This passes now
...
llvm-svn: 48178
2008-03-10 22:34:11 +00:00
272e234477
Fix mul expansion to check the correct number of bits for
...
zero extension when checking if an unsigned multiply is
safe.
llvm-svn: 48171
2008-03-10 20:42:19 +00:00
42d31b0783
The __sync primitives only work on x86 and alpha;
...
xfail this test elsewhere.
llvm-svn: 48164
2008-03-10 18:38:31 +00:00
741f491d90
Simplify
...
llvm-svn: 48163
2008-03-10 18:38:30 +00:00
94961bd37c
Add -m32 to compilation line; test is only valid in
...
32-bit environment. PR 2136.
llvm-svn: 48159
2008-03-10 17:56:53 +00:00
fe2c0e2dca
These tests don't work unless SSE2 is active.
...
Judging from the checking comments this is intentional,
so add the flag (makes them pass on non-x86 host).
llvm-svn: 48157
2008-03-10 17:33:57 +00:00
65aada6e8f
There is no "-mattr=+sse1" flag; fix test for non-x86 hosts.
...
llvm-svn: 48156
2008-03-10 17:13:37 +00:00
48e3375544
Integer comparison tests for CellSPU.
...
llvm-svn: 48152
2008-03-10 16:58:52 +00:00
4a3c5eab34
- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
...
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
A = or A, B
...
B = A
...
C = A<kill>
...
= B
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.
llvm-svn: 48141
2008-03-10 08:11:32 +00:00
5f4b355f20
Remove llvm-upgrade and update tests.
...
llvm-svn: 48137
2008-03-10 07:21:50 +00:00
b5d11980d9
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
...
llvm-svn: 48136
2008-03-10 07:19:13 +00:00
176542a970
remove an execution test.
...
llvm-svn: 48135
2008-03-10 06:53:14 +00:00
853b6ba425
switch from hard coded g++/as tools to the ones detected from
...
the build system. Patch by Joachim Durchholz for PR2121
llvm-svn: 48134
2008-03-10 06:52:10 +00:00
0c1d7b43a6
Fix a typo
...
llvm-svn: 48133
2008-03-10 06:49:40 +00:00
ca43433493
Fix PR2120 by changing the replacement order to change compile_cxx
...
before compile_c. Patch by Joachim Durchholz!
llvm-svn: 48132
2008-03-10 06:45:35 +00:00
fb2c1a999a
Turn unwind_to into "unwinds to".
...
llvm-svn: 48123
2008-03-10 02:20:00 +00:00
148562f13e
This works on x86_64
...
llvm-svn: 48121
2008-03-09 22:24:03 +00:00
b46ec99b7e
Fix RUN line.
...
llvm-svn: 48116
2008-03-09 19:55:22 +00:00
971a4660a0
Temporary XFAIL the test, until I'll commit a fix
...
llvm-svn: 48110
2008-03-09 16:24:04 +00:00
86829f0ff7
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
...
an RFP register class.
Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.
This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.
llvm-svn: 48107
2008-03-09 09:15:31 +00:00
9e07537e8c
Add ScheduleDAG support for copytoreg where the src/dst register are
...
in different register classes, e.g. copy of ST(0) to RFP*. This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)
llvm-svn: 48105
2008-03-09 08:49:15 +00:00
aa6f5c9ddd
Remove llvm-upgrade and update tests.
...
llvm-svn: 48103
2008-03-09 08:16:40 +00:00
42445be0df
Firstly, having a BranchInst isn't exclusive with having an unwind_to.
...
Secondly, we have to check whether the branch is actually pointing to the block
with the unwind in it. We could have gotten here because of the unwind_to alone.
llvm-svn: 48099
2008-03-09 07:50:37 +00:00
f3d637fa14
A BB that unwind_to an "unwind" inst is that same as one that doesn't unwind_to
...
at all.
llvm-svn: 48096
2008-03-09 07:36:38 +00:00
a6ce71fb84
reduce this testcase more
...
llvm-svn: 48092
2008-03-09 06:57:21 +00:00
b6387c8a74
Finish implementing a readme entry: when inserting an i64 variable
...
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle. This allows us to compile
vec_set-B.ll into:
_test3:
movl $1234567, %eax
andl 4(%esp), %eax
movd %eax, %xmm0
ret
instead of:
_test3:
subl $28, %esp
movl $1234567, %eax
andl 32(%esp), %eax
movl %eax, (%esp)
movl $0, 4(%esp)
movq (%esp), %xmm0
addl $28, %esp
ret
llvm-svn: 48090
2008-03-09 05:42:06 +00:00
5ce9b521d7
Update the inliner and simplifycfg to handle unwind_to.
...
llvm-svn: 48086
2008-03-09 05:10:13 +00:00
4d0ed842b1
Prune the unwind_to labels on BBs that don't need them. Another step in the
...
removal of invoke, PR1269.
llvm-svn: 48084
2008-03-09 04:55:16 +00:00
eef374c197
Implement a readme entry, compiling
...
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}
into:
movl $1, %eax
movd %eax, %xmm0
ret
instead of a constant pool load.
llvm-svn: 48063
2008-03-09 01:05:04 +00:00
3ed815a3a5
upgrade this test
...
llvm-svn: 48062
2008-03-09 00:32:10 +00:00
031e04b7a3
make this test harder
...
llvm-svn: 48061
2008-03-09 00:30:06 +00:00
a1f25b0020
Teach SD some vector identities, allowing us to compile vec_set-9 into:
...
_test3:
movd %rdi, %xmm1
#IMPLICIT_DEF %xmm0
punpcklqdq %xmm1, %xmm0
ret
instead of:
_test3:
#IMPLICIT_DEF %rax
movd %rax, %xmm0
movd %rdi, %xmm1
punpcklqdq %xmm1, %xmm0
ret
This is still not ideal. There is no reason to two xmm regs.
llvm-svn: 48058
2008-03-08 23:43:36 +00:00
e2e69ff426
much simpler test case
...
llvm-svn: 48045
2008-03-08 02:05:22 +00:00
95cf661534
Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
...
llvm-svn: 48042
2008-03-08 00:58:38 +00:00
d2ab5fd713
Add support for calls with i128 return values on ppc64.
...
llvm-svn: 48041
2008-03-08 00:19:12 +00:00
b04bde94c1
add dropped section test case for PR2123
...
llvm-svn: 48033
2008-03-07 21:19:43 +00:00
8d2ead2e34
Add support for lowering 128-bit shifts on ppc64.
...
llvm-svn: 48029
2008-03-07 20:36:53 +00:00
39a3221e27
Fixed a register scavenger bug. If a def is re-defining part of a super register, there must be an implicit def of the super-register on the MI.
...
llvm-svn: 48024
2008-03-07 20:12:54 +00:00
780b3ca64b
Update inliner to handle functions that return multiple values.
...
llvm-svn: 48020
2008-03-07 20:06:16 +00:00
47d774b2c8
Place for sret promotion tests.
...
llvm-svn: 48016
2008-03-07 20:00:15 +00:00
d4defb00df
mark frem as expand for all legal fp types on x86, regardless of whether
...
we're using SSE or not. This fixes PR2122.
llvm-svn: 48006
2008-03-07 06:36:32 +00:00
92e52c636f
Add testcase.
...
llvm-svn: 48005
2008-03-06 23:34:22 +00:00
636ab19205
some more spelling changes
...
llvm-svn: 47996
2008-03-06 10:51:21 +00:00
a3cb090446
Constant fold SIGN_EXTEND_INREG with ashr not lshr.
...
llvm-svn: 47992
2008-03-06 08:20:51 +00:00
b2e3c31587
Exercise the new CFG change.
...
llvm-svn: 47990
2008-03-06 06:55:58 +00:00
3e2d7c9f85
Commit the testcase too.
...
llvm-svn: 47988
2008-03-06 06:50:03 +00:00
d0b62a1552
Don't try to simplify urem and srem using arithmetic rules that don't work
...
under modulo (overflow). Fixes PR1933.
llvm-svn: 47987
2008-03-06 06:48:30 +00:00
e9b690b7f1
Refine Cell's i64 constant generation code to cover more constants where the
...
upper and lower 32-bits are the same (in addition to 0 and -1 previously.)
llvm-svn: 47985
2008-03-06 04:02:54 +00:00
48072bf179
- Expand tabs to spaces.
...
- select_bits.ll now fully functional now that PR1993 is closed. It was
previously broken by refactoring in SPUInstrInfo.td and using multiclasses.
- Same for eqv.ll
llvm-svn: 47972
2008-03-05 23:00:19 +00:00
29b502e0e0
Fix a coalescer bug wrt how dead copy interval is shortened.
...
llvm-svn: 47966
2008-03-05 22:09:42 +00:00
7fbece5d8a
test for something more interesting than not crashing
...
llvm-svn: 47962
2008-03-05 20:24:26 +00:00
04bd14db4d
sync ops on ptrs, was breaking libgomp
...
llvm-svn: 47960
2008-03-05 19:48:27 +00:00
6be42d2e23
Fix test not to emit junk into source directory
...
llvm-svn: 47947
2008-03-05 15:44:25 +00:00
f8e03a9b3b
Testcase for PR2054
...
llvm-svn: 47946
2008-03-05 15:43:58 +00:00
78e9cab229
Generalize FP constant shrinking optimization to apply to any vt
...
except ppc long double. This allows us to shrink constant pool
entries for x86 long double constants, which in turn allows us to
use flds/fldl instead of fldt.
llvm-svn: 47938
2008-03-05 06:48:13 +00:00
0a62cb44ce
Add a target lowering hook to control whether it's worthwhile to compress fp constant.
...
For x86, if sse2 is available, it's not a good idea since cvtss2sd is slower than a movsd load and it prevents load folding. On x87, it's important to shrink fp constant since fldt is very expensive.
llvm-svn: 47931
2008-03-05 01:30:59 +00:00
09de8e494e
Use -enable-ppc-regscavenger flag for these checks
...
llvm-svn: 47916
2008-03-04 23:16:26 +00:00
941ab37ea8
Use cast instead of dyn_cast.
...
Update test to use multiple return value directly, instead of relying on -sretpromotion.
llvm-svn: 47907
2008-03-04 21:45:28 +00:00
841322b32a
Handle multiple return values.
...
llvm-svn: 47904
2008-03-04 21:15:15 +00:00
16e2cf6db1
Really fix the test.
...
llvm-svn: 47882
2008-03-04 08:01:56 +00:00
7473c74d52
Fix broken test.
...
llvm-svn: 47881
2008-03-04 07:59:13 +00:00
62240d65fd
Add PR1501 test case.
...
llvm-svn: 47874
2008-03-04 00:47:45 +00:00
632ea65072
This is the initial check-in for adding register scavenging to PPC. (Currently,
...
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.
llvm-svn: 47863
2008-03-03 22:19:16 +00:00
be750abfd4
new testcase
...
llvm-svn: 47858
2008-03-03 21:59:00 +00:00
a70df9e2ee
Evan implemented these.
...
llvm-svn: 47828
2008-03-02 18:05:14 +00:00
bd0bb3f07f
Evan implemented this.
...
llvm-svn: 47827
2008-03-02 17:56:29 +00:00
a8b5ed8d3a
add a testcase for misc vector stuff
...
llvm-svn: 47826
2008-03-02 08:57:59 +00:00
8bbec39262
Oops, can't unwind to the entry block (entry block may have no preds).
...
llvm-svn: 47808
2008-03-02 03:34:55 +00:00
3cc9be0b59
Add an unwind_to field to basic blocks, making them Users instead of Values.
...
This is the first checkin for PR1269, the new EH infrastructure.
llvm-svn: 47802
2008-03-02 02:48:09 +00:00
5640bd186a
Remove llvm-upgrade and update test cases.
...
llvm-svn: 47793
2008-03-01 09:15:35 +00:00
ffe0da0eb2
Fix PR2113 by verifying allocations.
...
llvm-svn: 47792
2008-03-01 09:01:57 +00:00
903ee68639
Fix this test.
...
llvm-svn: 47791
2008-03-01 09:00:21 +00:00
b7e02fc0bf
Remove llvm-upgrade and update tests.
...
llvm-svn: 47784
2008-03-01 07:38:40 +00:00
16f1e0be3d
DCE'ed this testcase.
...
llvm-svn: 47760
2008-02-29 19:28:11 +00:00
811153a551
If we reload a virtual register that's already been assigned, we want to mark
...
that instruction as its "last use". This fixes PR1925.
llvm-svn: 47758
2008-02-29 18:52:01 +00:00
c966cebe93
fix a bug Anders ran into where scalarrepl would crash when promoting
...
a union containing a vector and an array whose elements were smaller than
the vector elements. this means we need to compile the load of the
array elements into an extract element plus a truncate.
llvm-svn: 47752
2008-02-29 07:12:06 +00:00
c612571555
Folding or(fcmp,fcmp) only works if the operands of the fcmps are the same fp type.
...
llvm-svn: 47750
2008-02-29 06:09:11 +00:00
bb979f4b1c
Update testcase.
...
llvm-svn: 47735
2008-02-28 23:13:15 +00:00
f77e6977a0
Fix http://llvm.org/bugs/show_bug.cgi?id=2104 by ordering lexicographically what gets printed. Be const-correct in PrintResults and uninline it too
...
llvm-svn: 47712
2008-02-28 08:38:45 +00:00
507713de08
Set to default: x86 no longer fold and into test if it has more than one use.
...
llvm-svn: 47711
2008-02-28 07:46:38 +00:00
820de906b1
New test for misaligned Altivec laod/store.
...
llvm-svn: 47698
2008-02-27 23:14:50 +00:00
26854f242e
Don't hard-code the mask size to be 32, which is incorrect on ppc64
...
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.
llvm-svn: 47692
2008-02-27 21:12:32 +00:00
fdc732ab9a
Fix a bug in dead spill slot elimination.
...
llvm-svn: 47687
2008-02-27 19:57:11 +00:00
3df31ba41b
actually run llc, thanks Dan :)
...
llvm-svn: 47677
2008-02-27 17:46:54 +00:00
8ae8e2d50b
Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it.
...
llvm-svn: 47668
2008-02-27 10:04:56 +00:00
83263b8cfb
Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead
...
stack slot and store if the SINT_TO_FP is actually legal. This allows
us to compile:
double a(double b) {return (unsigned)b;}
to:
_a:
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
ret
instead of:
_a:
subq $8, %rsp
cvttsd2siq %xmm0, %rax
movl %eax, %eax
cvtsi2sdq %rax, %xmm0
addq $8, %rsp
ret
crazy.
llvm-svn: 47660
2008-02-27 05:57:41 +00:00
3c7d3d5700
Compile x86-64-and-mask.ll into:
...
_test:
movl %edi, %eax
ret
instead of:
_test:
movl $4294967295, %ecx
movq %rdi, %rax
andq %rcx, %rax
ret
It would be great to write this as a Pat pattern that used subregs
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.
llvm-svn: 47658
2008-02-27 05:47:54 +00:00
6d56368caf
Spiller now remove unused spill slots.
...
llvm-svn: 47657
2008-02-27 03:04:06 +00:00
30075852ef
Upgrade testcase.
...
llvm-svn: 47644
2008-02-26 23:22:40 +00:00
e41c19c987
Add PR number to testcase.
...
llvm-svn: 47640
2008-02-26 23:16:11 +00:00
d29ed0b122
Fix an issue where GVN had the sizes of the two memcpy's reverse, resulting
...
in an invalid transformation.
llvm-svn: 47639
2008-02-26 23:06:17 +00:00
fa6b366892
Enable -coalescer-commute-instrs by default.
...
llvm-svn: 47623
2008-02-26 20:40:22 +00:00
9db0aa86d9
Avoid aborting on invalid shift counts.
...
llvm-svn: 47612
2008-02-26 18:50:50 +00:00
666bbe34f4
Fix for pr2093: direct operands aren't necessarily addresses, so don't
...
try to simplify them.
llvm-svn: 47610
2008-02-26 18:37:49 +00:00
a39cff3aaa
fix this test so that the fn name doesn't match the regex
...
llvm-svn: 47608
2008-02-26 18:13:51 +00:00
07c83cc86e
Fix PR2096, a regression introduced with my patch last night. This
...
also fixes cfrac, flops, and 175.vpr
llvm-svn: 47605
2008-02-26 17:09:59 +00:00
3d9755f6ca
Really feed llvm-as with the testcase, do not let it read from stdin. This fixes the hangs seen on solaris10.
...
llvm-svn: 47604
2008-02-26 13:37:13 +00:00
0a43601153
unbreak check-one
...
by supplying a dummy
"verbose" procedure
llvm-svn: 47603
2008-02-26 13:27:49 +00:00
d5691031f5
While hunting for two hanging tests,
...
(on solaris10, which are:
CodeGen/PowerPC/frounds.ll
Transforms/InstCombine/2008-02-23-MulSub.ll)
I needed a tool to figure out which one is the guilty.
To this end I have added a verbosity
option to the test/Makefile.
It can be invoked thus:
gmake check TESTSUITE=CodeGen/PowerPC VERBOSE="-v -v"
(The number of "-v"s specifies the verbosity level.
Instead of "-v" other aliases can be specified,
please consult the dejagnu docs for info.)
At level >= 2 following line is logged for each
test, before running it:
ABOUT TO RUN: <test>.ll
llvm-svn: 47602
2008-02-26 12:08:55 +00:00
2ff0b0e681
This is possible:
...
vr1 = extract_subreg vr2, 3
...
vr3 = extract_subreg vr1, 2
The end result is vr3 is equal to vr2 with subidx 2.
llvm-svn: 47592
2008-02-26 08:03:41 +00:00
e7c14013f5
Fix isNegatibleForFree to not return true for ConstantFP nodes
...
after legalize. Just because a constant is legal (e.g. 0.0 in SSE)
doesn't mean that its negated value is legal (-0.0). We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.
llvm-svn: 47591
2008-02-26 07:04:54 +00:00
1da250097b
Fix PR2076. CodeGenPrepare now sinks address computation for inline asm memory
...
operands into inline asm block.
llvm-svn: 47589
2008-02-26 02:42:37 +00:00
bbfd874cb4
Update bitcode reader and writer to handle multiple return values.
...
Take 2.
llvm-svn: 47583
2008-02-26 01:29:32 +00:00
df1d2b02f9
Fix an issue where GVN was performing the return slot optimization when it was
...
not safe. This is fixed by more aggressively checking that the return slot is
not used elsewhere in the function.
llvm-svn: 47544
2008-02-25 04:08:09 +00:00
01d6257e81
Temporarily reverting 46959.
...
llvm-svn: 47542
2008-02-25 03:57:32 +00:00
40dca46ddb
Fix an issue where GVN would try to use an instruction before its definition when performing return slot optimization.
...
llvm-svn: 47541
2008-02-25 00:40:41 +00:00
2f18c39720
Backing out r47521 for now. This has broken a number of tests.
...
llvm-svn: 47533
2008-02-23 19:32:32 +00:00
7d5eaec6dd
Merge current work back to tree to minimize diffs and drift. Major highlights
...
for CellSPU modifications:
- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
compiles and generates the right code. More work still needs to be done.
llvm-svn: 47532
2008-02-23 18:41:37 +00:00
aae582ba99
Testcase for Revision 47478.
...
llvm-svn: 47531
2008-02-23 10:59:51 +00:00
504c645b3e
Rematerialization logic was overly conservative when it comes to loads from fixed stack slots.
...
llvm-svn: 47529
2008-02-23 03:38:34 +00:00
405827dc26
Update test.
...
llvm-svn: 47527
2008-02-23 02:57:25 +00:00
174ef9a0bb
Remat of pic loads are now on by default.
...
llvm-svn: 47525
2008-02-23 02:08:30 +00:00
63d2d1f554
Fix a bug that caused opt and other tools to silently ignore
...
invalid command-line options.
llvm-svn: 47523
2008-02-23 01:55:25 +00:00
6a49782d33
Properly read and write bitcodes for multiple return values.
...
llvm-svn: 47521
2008-02-23 01:44:55 +00:00
26e5d01ca1
Really. Why doesn't every arch support MMX?
...
llvm-svn: 47513
2008-02-23 00:56:14 +00:00
cee351c410
Test case for PR2082.
...
llvm-svn: 47501
2008-02-22 20:38:49 +00:00
94ba37f8e3
Allow re-materialization of pic load (controlled by -remat-pic-load for now).
...
llvm-svn: 47476
2008-02-22 09:25:47 +00:00
ab8bfc28c8
copy mmx values from/to memory with GPRs on x86-32
...
instead of with mmx registers. This horribleness is apparently
done by gcc to avoid having to insert emms in places that really
should have it. This is the second half of rdar://5741668.
llvm-svn: 47474
2008-02-22 05:18:04 +00:00
997b3a65ca
Start using GPR's to copy around mmx value instead of mmx regs.
...
GCC apparently does this, and code depends on not having to do
emms when this happens. This is x86-64 only so far, second half
should handle x86-32.
rdar://5741668
llvm-svn: 47470
2008-02-22 02:09:43 +00:00
bdd4c8b04d
Treat clobber operands like early clobbers: if we have
...
any, we force sdisel to do all regalloc for an asm. This
leads to gross but correct codegen.
This fixes the rest of PR2078.
llvm-svn: 47454
2008-02-21 19:43:13 +00:00
3cdf542f5a
Remove llvm-upgrade and update tests.
...
llvm-svn: 47432
2008-02-21 07:42:26 +00:00
59f18b4de6
testcase for PR1133
...
llvm-svn: 47427
2008-02-21 05:27:08 +00:00
83c93d5afd
Fix a (harmless) but where vregs were added to the used reg lists for
...
inline asms.
Fix PR2078 by marking aliases of registers used when a register is
marked used. This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.
llvm-svn: 47426
2008-02-21 04:55:52 +00:00
ad582fc34b
Let invoke return aggregate value.
...
llvm-svn: 47425
2008-02-21 02:14:01 +00:00
1f00b535e1
Let function call return aggregate.
...
Now, we have very first multiple return value testcase!
llvm-svn: 47424
2008-02-21 01:54:02 +00:00
fe988eba4b
XFAIL for now.
...
llvm-svn: 47411
2008-02-20 23:10:42 +00:00
b2aa6fe905
Now functions can return aggregate values.
...
llvm-svn: 47409
2008-02-20 22:51:28 +00:00
1c44ebcf86
Add 'umax' similar to 'smax' SCEV. Closes PR2003.
...
Parse reversed smax and umax as smin and umin and express them with negative
or binary-not SCEVs (which are really just subtract under the hood).
Parse 'xor %x, -1' as (-1 - %x).
Remove dead code (ConstantInt::get always returns a ConstantInt).
Don't use getIntegerSCEV(-1, Ty). The first value is an int, then it gets
passed into a uint64_t. Instead, create the -1 directly from
ConstantInt::getAllOnesValue().
llvm-svn: 47360
2008-02-20 06:48:22 +00:00
0aa9f2a7f3
XFAIL this for now.
...
llvm-svn: 47355
2008-02-20 02:38:58 +00:00
a0b1cc41ef
this test requires sse2
...
llvm-svn: 47331
2008-02-19 18:07:46 +00:00
97b9662f78
Don't fold and's into test instructions if they have multiple uses.
...
This compiles test-nofold.ll into:
_test:
movl $15, %ecx
andl 4(%esp), %ecx
testl %ecx, %ecx
movl $42, %eax
cmove %ecx, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl %eax, %ecx
andl $15, %ecx
testl $15, %eax
movl $42, %eax
cmove %ecx, %eax
ret
llvm-svn: 47330
2008-02-19 17:37:35 +00:00
08162d9515
rename tests to avoid a test- prefix when they aren't related to the test instruction.
...
llvm-svn: 47329
2008-02-19 17:33:52 +00:00
a99d8b5a9a
Remove llvm-upgrade and update tests.
...
llvm-svn: 47325
2008-02-19 08:07:33 +00:00
a00c808d40
dead pass
...
llvm-svn: 47324
2008-02-19 07:58:11 +00:00
95816b9dee
Fix PR2060 by rejecting invalid types for integer constants.
...
llvm-svn: 47311
2008-02-19 04:36:07 +00:00
0e2e21b8b9
Don't spew stats to stderr.
...
llvm-svn: 47308
2008-02-19 03:11:47 +00:00
b54a803a2e
Fix up the run line for this new test.
...
llc: for the -info-output-file option: requires a value!
llvm-svn: 47306
2008-02-19 02:58:36 +00:00
634a8f9275
New test.
...
llvm-svn: 47302
2008-02-19 02:09:58 +00:00
e1d2df0738
Remove llvm-upgrade and update tests.
...
llvm-svn: 47297
2008-02-19 01:44:26 +00:00
3f04773f78
Remove llvm-upgrade and update tests.
...
llvm-svn: 47296
2008-02-19 01:41:04 +00:00
6200c225e0
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
...
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
llvm-svn: 47290
2008-02-18 23:04:32 +00:00
fefd0202c9
Correctly fold divide-by-constant, even when faced with overflow.
...
llvm-svn: 47287
2008-02-18 22:48:05 +00:00
a589ee11bb
Don't mark scalar integer multiplication as Expand on x86, since x86
...
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.
This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.
llvm-svn: 47277
2008-02-18 17:55:26 +00:00
23fe6630e3
make this just a bit more strict.
...
llvm-svn: 47274
2008-02-18 17:33:10 +00:00
3549553262
Add support to GVN for performing sret return slot optimization. This means that, if an sret function tail calls
...
another sret function, it should pass its own sret parameter to the tail callee, allowing it to fill in the correct
return value. llvm-gcc does not emit this by default. Instead, it allocates space in the caller for the sret of
the tail call and then uses memcpy to copy the result into the caller's sret parameter. This optimization detects
and optimizes that case.
llvm-svn: 47265
2008-02-18 09:24:53 +00:00
024f8c8f09
optimize away stackrestore calls that have no intervening alloca or call.
...
llvm-svn: 47258
2008-02-18 06:12:38 +00:00
c8ec470b52
upgrade this test.
...
llvm-svn: 47257
2008-02-18 06:11:00 +00:00
cc22601bc3
Fold (-x + -y) -> -(x+y) which promotes better association, fixing
...
the second half of PR2047
llvm-svn: 47244
2008-02-17 21:03:36 +00:00
a70d138457
Split up subtracts into add+negate if they have a reassociable use or operand
...
that is also a subtract. This implements PR2047 and Transforms/Reassociate/subtest2.ll
llvm-svn: 47241
2008-02-17 20:51:26 +00:00
2de8c2d41f
upgrade and simplify this test.
...
llvm-svn: 47240
2008-02-17 20:48:43 +00:00
f697c03883
Remove llvm-upgrade.
...
llvm-svn: 47238
2008-02-17 20:02:20 +00:00
aec0914c80
fix this test.
...
llvm-svn: 47232
2008-02-17 00:15:25 +00:00
087ed9fcad
Remove llvm-upgrade
...
llvm-svn: 47231
2008-02-17 00:15:09 +00:00
c36fefedf5
Remove llvm-upgrade.
...
llvm-svn: 47230
2008-02-17 00:13:09 +00:00
8a67d349fe
this test isn't useful since we added @ notation for globals.
...
llvm-svn: 47229
2008-02-17 00:12:03 +00:00
0d43732cd0
this line was commented out.
...
llvm-svn: 47228
2008-02-17 00:09:08 +00:00
47f0a20f8f
Remove llvm-upgrade and update tests.
...
llvm-svn: 47227
2008-02-16 23:55:46 +00:00
231fe4746b
Removing llvm upgrade, so remove tests specific to llvm-upgrade and update the tests that used it.
...
llvm-svn: 47225
2008-02-16 23:27:24 +00:00
573b3f89e4
Remove any 'nest' parameter attributes if the function
...
is not passed as an argument to a trampoline intrinsic.
llvm-svn: 47220
2008-02-16 20:56:04 +00:00
9b254eed32
llvm.memory.barrier, and impl for x86 and alpha
...
llvm-svn: 47204
2008-02-16 01:24:58 +00:00
8f51fa82c0
upgrade this test, which wasn't testing the right thing since llvm-upgrade came around.
...
llvm-svn: 47194
2008-02-15 23:58:25 +00:00
e1f41fc68e
rename llx -> ll
...
llvm-svn: 47192
2008-02-15 23:51:48 +00:00
6edbbe0c25
This test is not interesting.
...
llvm-svn: 47189
2008-02-15 23:06:21 +00:00
d2fd6b84c7
Modify test to expect improved code.
...
llvm-svn: 47182
2008-02-15 22:05:15 +00:00
a69c2f86b4
Fix this test on linux, which returns S242
...
using sret.
llvm-svn: 47173
2008-02-15 19:42:13 +00:00
a42c3147cc
Fix PR2028
...
llvm-svn: 47150
2008-02-15 01:24:49 +00:00
2e622e4c2b
If loop header is also loop exiting block then OrigPN is incoming value for B loop header.
...
Fixes PR 2030.
llvm-svn: 47141
2008-02-14 23:18:47 +00:00
70e294660a
Fix PR2029
...
llvm-svn: 47129
2008-02-14 19:18:13 +00:00
558a3ba17f
Fix a miscompilation from Dan's recent apintification.
...
llvm-svn: 47128
2008-02-14 18:48:56 +00:00
5429dbf6c7
Remove llvm-upgrade
...
llvm-svn: 47119
2008-02-14 07:57:12 +00:00
9592bb0390
Testcase for PR2032.
...
llvm-svn: 47113
2008-02-14 07:15:11 +00:00
f865dcd009
Remove llvm-upgrade.
...
llvm-svn: 47110
2008-02-14 06:56:27 +00:00
3bd37f549a
This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
...
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
a4621f04bb
Fix test.
...
llvm-svn: 47102
2008-02-14 01:32:53 +00:00
0ecb76d820
A loop latch phi node may have uses inside loop, not just in loop header.
...
llvm-svn: 47093
2008-02-13 22:23:07 +00:00
22c3caab6e
While moving exit condition, do not drop loop latch on the floor.
...
llvm-svn: 47089
2008-02-13 22:06:36 +00:00
c281d8031b
Keep track of exit value operand number when operands are swapped.
...
llvm-svn: 47082
2008-02-13 19:48:48 +00:00
2aea794226
New test, see comments.
...
llvm-svn: 47078
2008-02-13 18:36:48 +00:00
f8d29f228d
Teach LegalizeTypes how to expand and promote CTLZ,
...
CTTZ and CTPOP. The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it. I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it. The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select. This also means the value doesn't
need to be zero extended.
llvm-svn: 47075
2008-02-13 18:01:53 +00:00
460648abde
Add a note pointing to PR1996.
...
llvm-svn: 47055
2008-02-13 07:56:04 +00:00
a08af08a88
In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
...
node as soon as we create it in SDISel. Previously we would lower it in
legalize. The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them. This causes us to miss some optimizations because
datatype expansion also happens here.
Exposing the loads early allows us to do optimizations on them. For example
we now compile arg-cast.ll to:
_foo:
movl $2147483647, %eax
andl 8(%esp), %eax
ret
where we previously produced:
_foo:
subl $12, %esp
movsd 16(%esp), %xmm0
movsd %xmm0, (%esp)
movl $2147483647, %eax
andl 4(%esp), %eax
addl $12, %esp
ret
It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.
llvm-svn: 47054
2008-02-13 07:39:09 +00:00
03ec63f29d
Add test for PR1996. (This is my first time adding a test for a
...
transform, so please review.)
llvm-svn: 47050
2008-02-13 06:55:57 +00:00
fe61967361
Add testcase for recent legalizer change
...
llvm-svn: 47049
2008-02-13 06:48:40 +00:00
ea8530d82c
New tests.
...
llvm-svn: 47047
2008-02-13 03:23:53 +00:00
00dba4f734
Re-apply the patch to improve the optimizations of memcpy's, with several
...
bugs fixed. This now passes PPC bootstrap.
llvm-svn: 47026
2008-02-12 21:15:18 +00:00
724029151b
Don't mask the isel bug.
...
llvm-svn: 47018
2008-02-12 19:11:29 +00:00
3069a26f63
This test assumes no SSE4.1.
...
llvm-svn: 47017
2008-02-12 19:11:08 +00:00
ddb265b905
Now that ScalarEvolution::print writes to the correct stream, there is
...
no need to redirect stderr into stdout.
llvm-svn: 47009
2008-02-12 15:12:40 +00:00
995624f44d
Change negative grep into positive one in my yesterday's testcase.
...
llvm-svn: 47008
2008-02-12 15:10:35 +00:00
1d2c27b23e
Fix PR2002. Suppose n is the initial value for the induction
...
variable (with step 1) and m is its final value. Then, the correct trip
count is SMAX(m,n)-n. Previously, we used SMAX(0,m-n), but m-n may
overflow and can't in general be interpreted as signed.
Patch by Nick Lewycky.
llvm-svn: 47007
2008-02-12 15:09:36 +00:00
3716d023ab
Test case for annotate builtin.
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llvm-svn: 46999
2008-02-12 07:46:33 +00:00
b21301fbe7
Fix some test cases.
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llvm-svn: 46998
2008-02-12 07:22:46 +00:00
adae053b53
If the LHS of the comparison is a loop-invariant we also want to move it
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to the RHS. This simple change allows to compute loop iteration count
for loops with condition similar to the one in the testcase (which seems
to be quite common).
llvm-svn: 46959
2008-02-11 18:37:34 +00:00
d2d9764cc8
Fix PR1798 - an error in the evaluation of SCEVAddRecExpr at an
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arbitrary iteration.
The patch:
1) changes SCEVSDivExpr into SCEVUDivExpr,
2) replaces PartialFact() function with BinomialCoefficient(); the
computations (essentially, the division) in BinomialCoefficient() are
performed with the apprioprate bitwidth necessary to avoid overflow;
unsigned division is used instead of the signed one.
Computations in BinomialCoefficient() require support from the code
generator for APInts. Currently, we use a hack rounding up the
neccessary bitwidth to the nearest power of 2. The hack is easy to turn
off in future.
One remaining issue: we assume the divisor of the binomial coefficient
formula can be computed accurately using 16 bits. It means we can handle
AddRecs of length up to 9. In future, we should use APInts to evaluate
the divisor.
Thanks to Nicholas for cooperation!
llvm-svn: 46955
2008-02-11 11:03:14 +00:00
ad4d57a2f5
Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards.
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llvm-svn: 46953
2008-02-11 08:30:52 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
43a2ed8611
Alignment of struct containing vectors depends on
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whether SSE is present, on Darwin anyway. Make it
explicit.
llvm-svn: 46909
2008-02-09 19:04:25 +00:00
26f75e2576
Fix PR 1995.
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llvm-svn: 46898
2008-02-08 22:49:13 +00:00
3b3286d4bc
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
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llvm-svn: 46893
2008-02-08 21:20:40 +00:00
8d59dd119b
Added missing entries in X86 load / store folding tables.
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llvm-svn: 46866
2008-02-08 00:12:56 +00:00
a20a773654
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
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Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
llvm-svn: 46850
2008-02-07 08:53:49 +00:00
127b41500c
It's PR1925, not PR1609.
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llvm-svn: 46825
2008-02-06 22:07:17 +00:00
c676a0329c
Temporarily reverting:
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http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080128/057882.html
This is causing a miscompilation on PPC G5 and just now seeing it on iMac x86-64.
llvm-svn: 46822
2008-02-06 20:03:07 +00:00
1ec748c784
Fix a number of local register allocator issues: PR1609.
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llvm-svn: 46821
2008-02-06 19:16:53 +00:00
87fbd66f9f
Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
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llvm-svn: 46776
2008-02-05 22:50:29 +00:00
8d78b0597b
If a vr is already marked alive in a bb, then it has PHI uses that are visited earlier, then it is not killed in the def block (i.e. not dead).
...
llvm-svn: 46763
2008-02-05 20:04:18 +00:00
682a7dc653
Fix a bug compiling PR1978 (perhaps not the only one though) which
...
was incorrectly simplifying "x == (gep x, 1, i)" into false, even
though i could be negative. As it turns out, all the code to
handle this already existed, we just need to disable the incorrect
optimization case and let the general case handle it.
llvm-svn: 46739
2008-02-05 04:45:32 +00:00
baba47f1ea
This should also work on x86 now.
...
llvm-svn: 46730
2008-02-05 00:25:31 +00:00
3342d4083f
Crashes LegalizeTypes with "Do not know how to
...
expand the result of this operator!" (node: ctlz).
llvm-svn: 46713
2008-02-04 18:07:02 +00:00
ff1a444879
Crashes LegalizeTypes with "Do not know how to split
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this operator's operand" (node: extract_subvector).
llvm-svn: 46712
2008-02-04 18:05:42 +00:00
69f90ccb17
remove target triple to make this test more "generic"
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llvm-svn: 46711
2008-02-04 18:02:37 +00:00
331cd706f5
Crashed the new type legalizer. Not likely to catch
...
any bugs in the future since to get the crash you also
need hacked in fake libcall support (which creates odd
but legal trees), but since adding it doesn't hurt...
Thanks to Chris for this ultimately reduced version.
llvm-svn: 46706
2008-02-04 09:40:27 +00:00
1a78ae76e4
Make this test more aggressive, to cover recent improvements.
...
llvm-svn: 46695
2008-02-04 04:55:24 +00:00
c4a7c41869
Allow GVN to hack on memcpy's, making them open to further optimization.
...
llvm-svn: 46693
2008-02-04 02:59:58 +00:00
56178bc6ad
Tag this test with the PR reference.
...
llvm-svn: 46688
2008-02-03 16:35:19 +00:00
3b59214320
There are some cases where icmp(add) can be folded into a new icmp. Handle them.
...
llvm-svn: 46687
2008-02-03 16:33:09 +00:00
931e121ad1
Fixing a bug creating floating point constants of type other
...
than double through the C bindings. Thanks to Tomas Lindquist
Olsen for reporting it.
llvm-svn: 46656
2008-02-02 01:07:50 +00:00
192c07b727
CBackend: Implement unaligned load/store.
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llvm-svn: 46646
2008-02-01 21:25:59 +00:00
9aa789fda3
Don't drop function/call return attributes like 'nounwind'.
...
llvm-svn: 46645
2008-02-01 20:37:16 +00:00
56d4903db5
Accept getelementptr starting at GV with all 0 indices as a
...
legitimate way of representing global variable GV in debug info.
llvm-svn: 46565
2008-01-30 19:00:21 +00:00
cee9d51be9
Pointers change size depending upon the target. Remove them to make the test more stable.
...
llvm-svn: 46548
2008-01-30 05:15:15 +00:00
4e4b116750
Make DSE much more aggressive by performing DCE earlier. Update a testcase to reflect this increased aggressiveness.
...
llvm-svn: 46542
2008-01-30 01:24:47 +00:00
b9e5b8fb9e
Fix a bug where scalarrepl would discard offset if type would match.
...
In practice this can only happen on code with already undefined behavior,
but this is still a good thing to handle correctly.
llvm-svn: 46539
2008-01-30 00:39:15 +00:00
a13e5146d4
Update this test case.
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llvm-svn: 46526
2008-01-29 19:30:05 +00:00
ade0abb498
Don't let globalopt hack on volatile loads or stores.
...
llvm-svn: 46523
2008-01-29 19:01:37 +00:00
17819d971e
eliminate additions of 0.0 when they are obviously dead. This has to be careful to
...
avoid turning -0.0 + 0.0 -> -0.0 which is incorrect.
llvm-svn: 46499
2008-01-29 06:52:45 +00:00
95bf1d4d7b
Add a testcase for eliminating memcpy's at the end of functions. Forgot to commit this with my last commit.
...
llvm-svn: 46497
2008-01-29 06:40:32 +00:00
f4e5e556fd
Add target triples to these so they don't fail on linux.
...
llvm-svn: 46496
2008-01-29 06:26:07 +00:00
1e7ec74ad3
This would be better done as an executable test.
...
llvm-svn: 46493
2008-01-29 06:04:54 +00:00
aaaeee2ac0
After recent changes we fail to optimize this test
...
sufficiently to have it pass. I'm removing it from
the testsuite and adding it to PR452 instead.
llvm-svn: 46492
2008-01-29 05:57:23 +00:00
67fa0521b6
Filter loops that subtract induction variables.
...
These loops are not yet handled.
Fix PR 1912.
llvm-svn: 46484
2008-01-29 02:20:41 +00:00
ceae3bbf4d
Overhaul Cell SPU's addressing mode internals so that there are now
...
only two addressing mode nodes, SPUaform and SPUindirect (vice the
three previous ones, SPUaform, SPUdform and SPUxform). This improves
code somewhat because we now avoid using reg+reg addressing when
it can be avoided. It also simplifies the address selection logic,
which was the main point for doing this.
Also, for various global variables that would be loaded using SPU's
A-form addressing, prefer D-form offs[reg] addressing, keeping the
base in a register if the variable is used more than once.
llvm-svn: 46483
2008-01-29 02:16:57 +00:00
7bcf58f8a4
New test.
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llvm-svn: 46479
2008-01-29 01:10:04 +00:00
f0b7d4993f
Add test to make sure that #pragma mark/error doesn't error if there are
...
unbalanced quotes.
llvm-svn: 46476
2008-01-29 00:41:29 +00:00
2a80ba8c7c
Pure/const functions with ByVal parameters cannot
...
be marked readonly either.
llvm-svn: 46456
2008-01-28 19:25:47 +00:00
a116071547
this test is now compiled into the right thing.
...
llvm-svn: 46454
2008-01-28 17:38:46 +00:00
54af54fe08
Make this more likely to be passed byval.
...
llvm-svn: 46451
2008-01-28 10:35:11 +00:00
8ea81e8ba4
Handle some more combinations of extend and icmp. Fixes PR1940.
...
llvm-svn: 46431
2008-01-28 03:48:02 +00:00
710b441174
Fix PR1932 by disabling an xform invalid for fdiv.
...
llvm-svn: 46429
2008-01-28 00:58:18 +00:00
1b706dd680
Fix PR1938 by forcing the code that uses an undefined value to branch one
...
way or the other. Rewriting the code itself prevents subsequent analysis
passes from making contradictory conclusions about the code that could
cause an infeasible path to be made feasible.
llvm-svn: 46427
2008-01-28 00:32:30 +00:00
34d6b6a319
Update this test. Due to dag combiner improvements, we now compile
...
f7/f11 to:
_f7:
eor r0, r0, #2 , 2 @ -2147483648
bx lr
_f11:
bic r0, r0, #2 , 2 @ -2147483648
bx lr
instead of:
_f7:
fmsr s0, r0
fnegs s0, s0
fmrs r0, s0
bx lr
_f11:
fmsr s0, r0
fabss s0, s0
fmrs r0, s0
bx lr
llvm-svn: 46423
2008-01-27 23:26:37 +00:00
efb16f7057
Be more careful modifying the use_list while also iterating through it.
...
llvm-svn: 46417
2008-01-27 18:35:00 +00:00
053c9871cd
Revert r46393: readonly/readnone functions are no
...
longer allowed to write through byval arguments.
llvm-svn: 46416
2008-01-27 18:12:58 +00:00
888560d62c
Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
...
registers if used by a bitconvert or using a bitconvert. This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway. For example, we now
compile CodeGen/X86/fp-in-intregs.ll to:
_test1:
movl $2147483648, %eax
xorl 4(%esp), %eax
ret
_test2:
movl $1065353216, %eax
orl 4(%esp), %eax
andl $3212836864, %eax
ret
Instead of:
_test1:
movss 4(%esp), %xmm0
xorps LCPI2_0, %xmm0
movd %xmm0, %eax
ret
_test2:
movss 4(%esp), %xmm0
andps LCPI3_0, %xmm0
movss LCPI3_1, %xmm1
andps LCPI3_2, %xmm1
orps %xmm0, %xmm1
movd %xmm1, %eax
ret
bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.
llvm-svn: 46414
2008-01-27 17:42:27 +00:00
8c491162d2
The CorrelatedExpressions pass is now no more.
...
llvm-svn: 46409
2008-01-27 06:13:32 +00:00
fa1e7eef30
Fold fptrunc(add (fpextend x), (fpextend y)) -> add(x,y), as GCC does.
...
llvm-svn: 46406
2008-01-27 05:29:54 +00:00
596704405f
New test to verify that "merging 4 loads into a vec load" continues to work and
...
continues to infer alignment info.
llvm-svn: 46403
2008-01-26 20:06:45 +00:00
e30e33af4f
Infer alignment of loads and increase their alignment when we can tell they are
...
from the stack. This allows us to compile stack-align.ll to:
_test:
movsd LCPI1_0, %xmm0
movapd %xmm0, %xmm1
*** andpd 4(%esp), %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test:
movsd LCPI1_0, %xmm0
** movsd 4(%esp), %xmm1
** andpd %xmm0, %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
llvm-svn: 46401
2008-01-26 19:45:50 +00:00
364963d41c
remove a useless xfailed test.
...
llvm-svn: 46400
2008-01-26 19:35:46 +00:00
dc157a4f0a
Invert this test, because it is wrong if we allow
...
readonly functions to use byval parameters as local
storage (how much do we want this?).
llvm-svn: 46399
2008-01-26 12:33:01 +00:00
1a17ef02c8
If there's no instructions being emitted on X86 for a function, emit a
...
nop. Emit the nop directly for PPC.
llvm-svn: 46398
2008-01-26 09:03:52 +00:00
Bill Wendling