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11 Commits

Author SHA1 Message Date
Guillaume Chatelet 937f3fedec [llvm-exegesis] Improve Register Setup. 
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.

Reviewers: courbet, javed.absar

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51856

llvm-svn: 342466
 2018-09-18 11:26:48 +00:00
Guillaume Chatelet 8721ad98d1 Added function to set a register to a particular value + tests. 
llvm-svn: 342465
 2018-09-18 11:26:35 +00:00
Guillaume Chatelet 5ad2909e52 Improve Register Setup 
llvm-svn: 342464
 2018-09-18 11:26:27 +00:00
Clement Courbet d939f6d013 [llvm-exegesis][NFC] Split BenchmarkRunner class 
Summary:
The snippet-generation part goes to the SnippetGenerator class.

This will allow benchmarking arbitrary code (see PR38437).

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D51979

llvm-svn: 342117
 2018-09-13 07:40:53 +00:00
Guillaume Chatelet fb94354d2d [llvm-exegesis] Provide a way to handle memory instructions. 
Summary:
And implement memory instructions on X86.

This fixes PR36906.

Reviewers: gchatelet

Reviewed By: gchatelet

Subscribers: lebedev.ri, filcab, mgorny, tschuett, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D48935

llvm-svn: 338567
 2018-08-01 14:41:45 +00:00
Clement Courbet 4860b98443 [llvm-exegesis] Get the BenchmarkRunner from the ExegesisTarget. 
Summary:
This allows targets to override code generation for some instructions.
As an example of override, this also moves ad-hoc instruction filtering
for X86 into the X86 ExegesisTarget.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48587

llvm-svn: 335582
 2018-06-26 08:49:30 +00:00
Clement Courbet cff2caac75 [llvm-exegesis][NFC] clang-format 
llvm-svn: 335452
 2018-06-25 11:22:23 +00:00
Clement Courbet 6fd00e32e5 [llvm-exegesis] Add mechanism to add target-specific passes. 
Summary:
createX86FloatingPointStackifierPass is disabled until we handle
TracksLiveness correctly.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48360

llvm-svn: 335117
 2018-06-20 11:54:35 +00:00
Clement Courbet 44b4c54e26 Re-land r335038 "[llvm-exegesis] A mechanism to add target-specific functionality."" 
Fix typo: LLVM_NATIVE_ARCH -> LLVM_EXEGESIS_NATIVE_ARCH.

llvm-svn: 335041
 2018-06-19 11:28:59 +00:00
Clement Courbet 46751785ee Revert r335038 "[llvm-exegesis] A mechanism to add target-specific functionality." 
Breaks buildbots.

llvm-svn: 335040
 2018-06-19 10:54:12 +00:00
Clement Courbet 6780b5f97d [llvm-exegesis] A mechanism to add target-specific functionality. 
Summary: This is a step towards implementing memory operands and X87.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48210

llvm-svn: 335038
 2018-06-19 10:39:50 +00:00