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Author SHA1 Message Date
David Greene 3e89fa8e08 [AArch64] Create proper memoperand for multi-vector stores 
Re-apply r345315 with testcase fixes.

Include all of the store's source vector operands when creating the
MachineMemOperand. Previously, we were missing the first operand,
making the store size seem smaller than it really is.

Differential Revision: https://reviews.llvm.org/D52816

llvm-svn: 345631
 2018-10-30 19:17:51 +00:00
Vlad Tsyrklevich 21beeb29ea Revert "[AArch64] Create proper memoperand for multi-vector stores" 
This reverts commit r345315, it was causing test failures on
sanitizer-x86_64-linux-fast.

llvm-svn: 345356
 2018-10-26 02:00:14 +00:00
David Greene 53e869da7d [AArch64] Create proper memoperand for multi-vector stores 
Include all of the store's source vector operands when creating the
MachineMemOperand. Previously, we were missing the first operand,
making the store size seem smaller than it really is.

Differential Revision: https://reviews.llvm.org/D52816

llvm-svn: 345315
 2018-10-25 21:10:39 +00:00