llvm-project

Commit Graph

Author	SHA1	Message	Date
Michael Liao	b0402a35fc	[amdgpu] Add 64-bit PC support when expanding unconditional branches. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D106445	2021-07-26 14:50:30 -04:00
Tony	2f499b9aff	[AMDGPU] Add volatile support to SIMemoryLegalizer Treat a non-atomic volatile load and store as a relaxed atomic at system scope for the address spaces accessed. This will ensure all relevant caches will be bypassed. A volatile atomic is not changed and still only bypasses caches upto the level specified by the SyncScope operand. Differential Revision: https://reviews.llvm.org/D94214	2021-01-09 00:52:33 +00:00
Matt Arsenault	d61996473d	AMDGPU: Increase branch size estimate with offset bug This will be relaxed to insert a nop if the offset hits the bad value, so over estimate branch instruction sizes.	2020-10-23 10:34:24 -04:00

Author

SHA1

Message

Date

Michael Liao

b0402a35fc

[amdgpu] Add 64-bit PC support when expanding unconditional branches.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D106445

2021-07-26 14:50:30 -04:00

Tony

2f499b9aff

[AMDGPU] Add volatile support to SIMemoryLegalizer

Treat a non-atomic volatile load and store as a relaxed atomic at
system scope for the address spaces accessed. This will ensure all
relevant caches will be bypassed.

A volatile atomic is not changed and still only bypasses caches upto
the level specified by the SyncScope operand.

Differential Revision: https://reviews.llvm.org/D94214

2021-01-09 00:52:33 +00:00

Matt Arsenault

d61996473d

AMDGPU: Increase branch size estimate with offset bug

This will be relaxed to insert a nop if the offset hits the bad value,
so over estimate branch instruction sizes.

2020-10-23 10:34:24 -04:00

3 Commits