cd953434f2
[AMDGPU][MC][GFX10][GFX90A] Corrected _e32/_e64 suffices
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Fixed bugs https://bugs.llvm.org//show_bug.cgi?id=49643 , https://bugs.llvm.org//show_bug.cgi?id=49644 , https://bugs.llvm.org//show_bug.cgi?id=49645 .
Differential Revision: https://reviews.llvm.org/D99413
2021-04-01 14:21:00 +03:00
d28624a209
[AMDGPU] Stop adding an implicit def of vcc_hi for wave32
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This doesn't seem to be needed for anything.
Differential Revision: https://reviews.llvm.org/D92400
2020-12-02 10:11:42 +00:00
d2e52eec51
AMDGPU: Select global saddr mode from SGPR pointer
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Use the 64-bit SGPR base with a 0 offset, since it's 1 fewer
instruction to materialize the 0 vs. the 64-bit copy.
2020-11-16 11:51:06 -05:00
a6e353b1d0
AMDGPU: Split large offsets when selecting global saddr mode
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When the offset doesn't fit in the immediate field, move some to
voffset.
2020-11-16 11:36:01 -05:00
277de43d88
[AMDGPU] Unify intrinsic ret/nortn interface
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We have a single noret intrinsic an a lot of special handling
around it. Declare it just as any other but do not define rtn
instructions itself instead.
Differential Revision: https://reviews.llvm.org/D87719
2020-09-15 15:26:42 -07:00
8860daf0ed
AMDGPU: Handle a few missing cases in getAddrModeArguments
2020-07-28 20:22:38 -04:00
Dmitry Preobrazhensky