Commit Graph

2 Commits

Author SHA1 Message Date
Jay Foad 479145a5c2 [AMDGPU] Avoid hard-coded line numbers in error message checks
This makes it easier for us to maintain downstream changes to some of
these tests. NFC.

Differential Revision: https://reviews.llvm.org/D78716
2020-04-23 21:06:09 +01:00
Matt Arsenault bc6d07ca46 MIR: Allow targets to serialize MachineFunctionInfo
This has been a very painful missing feature that has made producing
reduced testcases difficult. In particular the various registers
determined for stack access during function lowering were necessary to
avoid undefined register errors in a large percentage of
cases. Implement a subset of the important fields that need to be
preserved for AMDGPU.

Most of the changes are to support targets parsing register fields and
properly reporting errors. The biggest sort-of bug remaining is for
fields that can be initialized from the IR section will be overwritten
by a default initialized machineFunctionInfo section. Another
remaining bug is the machineFunctionInfo section is still printed even
if empty.

llvm-svn: 356215
2019-03-14 22:54:43 +00:00