5 Commits

Author	SHA1	Message	Date
Qiu Chaofan	b820339752	[PowerPC] Support f128 under VSX ... This patch is the last one in backend to support fp128 type in pre-POWER9 subtargets with VSX, removing temporary option and updating remaining tests. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D92374	2021-04-20 15:49:52 +08:00
Qiu Chaofan	ece7345859	[PowerPC] Lower f128 SETCC/SELECT_CC as libcall if p9vector disabled ... XSCMPUQP is not available for pre-P9 subtargets. This patch will lower them into libcall for correct behavior on power7/power8. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D92083	2021-04-12 10:33:32 +08:00
Kai Luo	b904324788	[DAGCombiner] Enhance (zext(setcc)) ... Current `v:t = zext(setcc x,y,cc)` will be transformed to `select x, y, 1:t, 0:t, cc`. It misses some opportunities if x's type size is less than `t`'s size. This patch enhances the above transformation. Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D86687	2020-08-29 03:37:41 +00:00
QingShan Zhang	61ede38da0	[CodeGen] Expand float operand for STRICT_FSETCC/STRICT_FSETCCS ... This patch is the continue work of https://reviews.llvm.org/D69281 to implement the way that expands STRICT_FSETCC/STRICT_FSETCCS. Reviewed By: uweigand Differential Revision: https://reviews.llvm.org/D81906	2020-08-11 05:55:00 +00:00
QingShan Zhang	55de46f3b2	[PowerPC] Support constrained fp operation for setcc ... The constrained fp operation fcmp was added by https://reviews.llvm.org/D69281. This patch is trying to add the support for PowerPC backend. Reviewed By: uweigand Differential Revision: https://reviews.llvm.org/D81727	2020-08-07 05:16:36 +00:00