llvm-project

Commit Graph

Author	SHA1	Message	Date
Esme-Yi	29eb3dcfe6	[PowerPC] Materialize i64 constants by enumerated patterns. Summary: Some constants can be handled with less instructions than our current results. And it seems our original approach is not very easy to extend. Therefore this patch proposes to materialize all 64-bit constants by enumerated patterns. I traversed almost all constants to verified the functionality of these pattens. A traversed comparison of the number of instructions used by the original method and the new method has also been completed, where no degradation was caused by this patch. This patch also passed Bootstrap test and SPEC test. Improvements of this patch are shown in llvm/test/CodeGen/PowerPC/constants-i64.ll Reviewed By: steven.zhang, stefanp Differential Revision: https://reviews.llvm.org/D92089	2020-12-21 05:21:07 +00:00
David Green	2fea3fe41c	[MachineScheduler] Update available queue on the first mop of a new cycle If a resource can be held for multiple cycles in the schedule model then an instruction can be placed into the available queue, another instruction can be scheduled, but the first will not be taken back out if the two instructions hazard. To fix this make sure that we update the available queue even on the first MOp of a cycle, pushing available instructions back into the pending queue if they now conflict. This happens with some downstream schedules we have around MVE instruction scheduling where we use ResourceCycles=[2] to show the instruction executing over two beats. Apparently the test changes here are OK too. Differential Revision: https://reviews.llvm.org/D76909	2020-06-09 19:13:53 +01:00
Nemanja Ivanovic	64b31d96df	[PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UINT without FPCVT We call the function that attempts to reuse the conversion without checking whether the target matches the constraints that the callee expects. This patch adds the check prior to the call. Fixes: https://bugs.llvm.org/show_bug.cgi?id=43976 Differential revision: https://reviews.llvm.org/D77564	2020-04-20 13:00:06 -05:00

Author

SHA1

Message

Date

Esme-Yi

29eb3dcfe6

[PowerPC] Materialize i64 constants by enumerated patterns.

Summary: Some constants can be handled with less instructions than our current results. And it seems our original approach is not very easy to extend. Therefore this patch proposes to materialize all 64-bit constants by enumerated patterns.
I traversed almost all constants to verified the functionality of these pattens. A traversed comparison of the number of instructions used by the original method and the new method has also been completed, where no degradation was caused by this patch. This patch also passed Bootstrap test and SPEC test.
Improvements of this patch are shown in llvm/test/CodeGen/PowerPC/constants-i64.ll

Reviewed By: steven.zhang, stefanp

Differential Revision: https://reviews.llvm.org/D92089

2020-12-21 05:21:07 +00:00

David Green

2fea3fe41c

[MachineScheduler] Update available queue on the first mop of a new cycle

If a resource can be held for multiple cycles in the schedule model
then an instruction can be placed into the available queue, another
instruction can be scheduled, but the first will not be taken back out if
the two instructions hazard. To fix this make sure that we update the
available queue even on the first MOp of a cycle, pushing available
instructions back into the pending queue if they now conflict.

This happens with some downstream schedules we have around MVE
instruction scheduling where we use ResourceCycles=[2] to show the
instruction executing over two beats. Apparently the test changes here
are OK too.

Differential Revision: https://reviews.llvm.org/D76909

2020-06-09 19:13:53 +01:00

Nemanja Ivanovic

64b31d96df

[PowerPC] Do not attempt to reuse load for 64-bit FP_TO_UINT without FPCVT

We call the function that attempts to reuse the conversion without checking
whether the target matches the constraints that the callee expects. This patch
adds the check prior to the call.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=43976

Differential revision: https://reviews.llvm.org/D77564

2020-04-20 13:00:06 -05:00

3 Commits