llvm-project

Commit Graph

Author	SHA1	Message	Date
Tim Northover	8935aca9c7	CodeGenPrep: preserve inbounds attribute when sinking GEPs. Targets can potentially emit more efficient code if they know address computations never overflow. For example ILP32 code on AArch64 (which only has 64-bit address computation) can ignore the possibility of overflow with this extra information. llvm-svn: 355926	2019-03-12 15:22:23 +00:00
Evgeny Astigeevich	540a39adf7	[ARM, Thumb1] Prevent ARMTargetLowering::isLegalAddressingMode from accepting illegal modes ARMTargetLowering::isLegalAddressingMode can accept illegal addressing modes for the Thumb1 target. This causes generation of redundant code and affects performance. This fixes PR34106: https://bugs.llvm.org/show_bug.cgi?id=34106 Differential Revision: https://reviews.llvm.org/D36467 llvm-svn: 311649	2017-08-24 10:00:25 +00:00

Author

SHA1

Message

Date

Tim Northover

8935aca9c7

CodeGenPrep: preserve inbounds attribute when sinking GEPs.

Targets can potentially emit more efficient code if they know address
computations never overflow. For example ILP32 code on AArch64 (which only has
64-bit address computation) can ignore the possibility of overflow with this
extra information.

llvm-svn: 355926

2019-03-12 15:22:23 +00:00

Evgeny Astigeevich

540a39adf7

[ARM, Thumb1] Prevent ARMTargetLowering::isLegalAddressingMode from accepting illegal modes

ARMTargetLowering::isLegalAddressingMode can accept illegal addressing modes
for the Thumb1 target. This causes generation of redundant code and affects
performance.

This fixes PR34106: https://bugs.llvm.org/show_bug.cgi?id=34106

Differential Revision: https://reviews.llvm.org/D36467

llvm-svn: 311649

2017-08-24 10:00:25 +00:00

2 Commits