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4 Commits

Author SHA1 Message Date
Kazushi (Jam) Marukawa a2eb07aa55 [VE] Support atomic exchange instructions 
Support atomic exchange and atomic compare and exchange instructions.
Change CAS and TS1AM instructions for ISel patterns.  Add selectADDRzi
pattern for them.  Add TS1AM pseudo instruction also for better ISel.
Add shouldExpandAtomicRMWInIR() function to expand all atomicrmw
instructions except atomicrmw xchg.  Add custom lower for i8/i16
atomicrmw xchg.  Modify replaceFI to support CAS/TS1AM instructions
which use "reg+disp" operands instead of "reg+imm+disp" operands.
And, add several regression tests to check the correctness.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93161
 2020-12-15 17:43:11 +09:00
Kazushi (Jam) Marukawa 44a4f93925 [VE] Optimize leaf functions 
Optimize leaf functions by not generating save/restore for callee saved
registers.  Update regression tests also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91539
 2020-11-17 00:38:01 +09:00
Kazushi (Jam) Marukawa dd6f607ea8 [VE] Implement FoldImmediate 
Implement FoldImmediate for only integer aritihmetic operations.
Add regression tests also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D91150
 2020-11-11 08:08:32 +09:00
Simon Moll 1943b7f15d [VE][NFC] move scalar tests to Scalar/ 
Restructure lit tests to follow downstream

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D90468
 2020-10-30 16:44:32 +01:00