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21 Commits

Author SHA1 Message Date
Aakanksha Patil 3453f3dd46 [AMDGPU] Add gfx1035 target 
Differential Revision: https://reviews.llvm.org/D104804
 2021-06-24 14:32:41 -04:00
Brendon Cahoon 294efbbd3e Reland "[AMDGPU] Add gfx1013 target" 
This reverts commit 211e584fa2.

Fixed a use-after-free error that caused the sanitizers to fail.
 2021-06-08 21:15:35 -04:00
Brendon Cahoon 211e584fa2 Revert "[AMDGPU] Add gfx1013 target" 
This reverts commit ea10a86984.

A sanitizer buildbot reports an error.
 2021-06-08 16:29:41 -04:00
Brendon Cahoon ea10a86984 [AMDGPU] Add gfx1013 target 
Differential Revision: https://reviews.llvm.org/D103663
 2021-06-08 12:49:49 -04:00
serge-sans-paille 4ab3041acb Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 
This reverts commit bda6e5bee0.

See https://lab.llvm.org/buildbot/#/builders/109/builds/15424 for instance
 2021-05-24 19:43:40 +02:00
serge-sans-paille bda6e5bee0 [NFC] remove explicit default value for strboolattr attribute in tests 
Since d6de1e1a71, no attributes is quivalent to
setting attribute to false.

This is a preliminary commit for https://reviews.llvm.org/D99080
 2021-05-24 19:31:04 +02:00
Aakanksha Patil 464e4dc50f [AMDGPU] Add gfx1034 target 
Differential Revision: https://reviews.llvm.org/D102306
 2021-05-13 14:25:18 -04:00
Fangrui Song 0c2e2f88fb [llvm-objdump] Improve newline consistency between different pieces of information 
When dumping multiple pieces of information (e.g. --all-headers),
there is sometimes no separator between two pieces.
This patch uses the "\nheader:\n" style, which generally improves
compatibility with GNU objdump.

Note: objdump -t/-T does not add a newline before "SYMBOL TABLE:" and "DYNAMIC SYMBOL TABLE:".
We add a newline to be consistent with other information.

`objdump -d` prints two empty lines before the first 'Disassembly of section'.
We print just one with this patch.

Differential Revision: https://reviews.llvm.org/D101796
 2021-05-04 09:56:07 -07:00
Jay Foad 94d0fc32f5 [AMDGPU] Add some missing testing for new subtargets gfx90a and gfx90c 
Differential Revision: https://reviews.llvm.org/D99647
 2021-04-06 08:38:59 +01:00
Konstantin Zhuravlyov f4ace63737 AMDGPU: Add target id and code object v4 support 
- Add target id support (https://clang.llvm.org/docs/ClangOffloadBundler.html#target-id)
  - Add code object v4 support (https://llvm.org/docs/AMDGPUUsage.html#elf-code-object)
    - Add kernarg_size to kernel descriptor
    - Change trap handler ABI to no longer move queue pointer into s[0:1]
  - Cleanup ELF definitions
    - Add V2, V3, V4 suffixes to make a clear distinction for code object version
    - Consolidate note names

Differential Revision: https://reviews.llvm.org/D95638
 2021-03-24 11:54:05 -04:00
Jay Foad c9f69ee7f9 [AMDGPU] Add some missing tests for GFX10.3 subtargets 2020-11-03 19:18:34 +00:00
Konstantin Zhuravlyov 3fdf3b1539 AMDGPU: Update AMDHSA code object version handling 
Differential Revision: https://reviews.llvm.org/D89076
 2020-10-14 13:04:27 -04:00
Ronak Chauhan 528057c197 [AMDGPU] Support disassembly for AMDGPU kernel descriptors 
Decode AMDGPU Kernel descriptors as assembler directives.

Reviewed By: scott.linder, jhenderson, kzhuravl

Differential Revision: https://reviews.llvm.org/D80713
 2020-10-07 20:39:43 +05:30
Ronak Chauhan f078577f31 Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors" 
This reverts commit 487a805310.

Tests fail on big endian machines.
 2020-09-09 18:01:28 +05:30
Ronak Chauhan 487a805310 [AMDGPU] Support disassembly for AMDGPU kernel descriptors 
Decode AMDGPU Kernel descriptors as assembler directives.

Reviewed By: scott.linder, jhenderson, kzhuravl

Differential Revision: https://reviews.llvm.org/D80713
 2020-09-08 21:26:11 +05:30
Ronak Chauhan fdf71d486c Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors" 
This reverts commit cacfb02d28.

Reverting due to buildbot failures.
 2020-08-19 13:12:29 +05:30
Ronak Chauhan cacfb02d28 [AMDGPU] Support disassembly for AMDGPU kernel descriptors 
Decode AMDGPU Kernel descriptors as assembler directives.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D80713
 2020-08-19 08:49:07 +05:30
Ronak Chauhan e760e85680 [llvm-objdump][AMDGPU] Detect CPU string 
AMDGPU ISA isn't backwards compatible and hence -mcpu must always be specified during disassembly.
However, the AMDGPU target CPU is stored in e_flags in the ELF object.

This patch allows targets to implement CPU string detection, and also implements it for AMDGPU by looking at e_flags.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D84519
 2020-08-18 17:43:16 +05:30
Matt Arsenault 5660bb6bc9 AMDGPU: Remove denormal subtarget features 
Switch to using the denormal-fp-math/denormal-fp-math-f32 attributes.
 2020-04-02 17:17:12 -04:00
Fangrui Song 6ed18eaa77 [llvm-objdump][test] Change llvm-objdump tests to use double dash options 2020-03-15 16:01:26 -07:00
Fangrui Song b1cdada023 [llvm-objdump][test] Move {AArch64,ARM}/* to ELF/ARM/ or MachO/ARM/ and {AMDGPU,Hexagon,Mips,powerPC}/ to ELF/ 2020-03-15 15:18:33 -07:00