10043e215b
ARM backend contribution from Apple.
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llvm-svn: 33353
2007-01-19 07:51:42 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
ed32883b27
fix warning about missing newline at end of file
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llvm-svn: 31162
2006-10-24 17:07:11 +00:00
aaeede0aa2
implement uncond branch insertion, mark branches with isBranch.
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llvm-svn: 31160
2006-10-24 16:47:57 +00:00
3130a756ef
add shifts to addressing mode 1
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llvm-svn: 30291
2006-09-13 12:09:43 +00:00
e45a79a9e2
partial implementation of the ARM Addressing Mode 1
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llvm-svn: 30252
2006-09-11 17:25:40 +00:00
8c41f99e6f
change the addressing mode of the str instruction to reg+imm
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llvm-svn: 29571
2006-08-08 20:35:03 +00:00
e40a7e2aa2
create the raddr addressing mode that matches any register and the frame index
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use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
llvm-svn: 29079
2006-07-10 01:41:35 +00:00
f6f5aff038
handle the "mov reg1, reg2" case in isMoveInstr
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llvm-svn: 28945
2006-06-27 21:52:45 +00:00
27f8bdc7e5
implement minimal versions of
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ARMAsmPrinter::runOnMachineFunction
LowerFORMAL_ARGUMENTS
ARMInstrInfo::isMoveInstr
llvm-svn: 28431
2006-05-23 02:48:20 +00:00
ffdc24b847
added a skeleton of the ARM backend
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llvm-svn: 28301
2006-05-14 22:18:28 +00:00
Evan Cheng