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97 Commits

Author SHA1 Message Date
Colin LeMahieu 627df427eb [Hexagon] Adding floating point classification and creation. 
llvm-svn: 225374
 2015-01-07 20:28:57 +00:00
Colin LeMahieu 290ece7d4c [Hexagon] Adding encodings for v5 floating point instructions. 
llvm-svn: 225372
 2015-01-07 20:24:09 +00:00
Colin LeMahieu 777abcb1d7 [Hexagon] Adding encoding for popcount, fastcorner, dword asr with rounding. 
llvm-svn: 225371
 2015-01-07 20:07:28 +00:00
Colin LeMahieu 507dd32703 [Hexagon] Adding compound jump encodings. 
llvm-svn: 225291
 2015-01-06 20:03:31 +00:00
Colin LeMahieu 68b2e050f0 [Hexagon] Adding encoding for misc v4 instructions: boundscheck, tlbmatch, dcfetch. 
llvm-svn: 225283
 2015-01-06 19:03:20 +00:00
Colin LeMahieu d9c605ddae [Hexagon] Adding encoding information for absolute address loads. 
llvm-svn: 225279
 2015-01-06 18:38:26 +00:00
Colin LeMahieu 1445553474 [Hexagon] Adding dealloc_return encoding and absolute address stores. 
llvm-svn: 225267
 2015-01-06 16:15:15 +00:00
Colin LeMahieu dacf057bdc [Hexagon] Adding add/sub with carry, logical shift left by immediate and memop instructions. Removing old defs without bits and updating references. 
llvm-svn: 225210
 2015-01-05 21:36:38 +00:00
Colin LeMahieu 28bb02a8c7 [Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accumulating shifts. 
llvm-svn: 225201
 2015-01-05 20:56:41 +00:00
Colin LeMahieu abdf2b37d8 [Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding bits. 
llvm-svn: 225199
 2015-01-05 20:35:54 +00:00
Colin LeMahieu 3acfddd6b5 [Hexagon] Adding V4 logic-logic instructions and tests. 
llvm-svn: 225198
 2015-01-05 20:14:58 +00:00
Colin LeMahieu ff10c8c95c [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions. 
llvm-svn: 225197
 2015-01-05 20:04:40 +00:00
Colin LeMahieu 5e079577e1 [Hexagon] Adding round reg/imm and bitsplit instructions. 
llvm-svn: 225188
 2015-01-05 18:08:21 +00:00
Colin LeMahieu bc405294f0 [Hexagon] Adding accumulating add/sub, doubleword logic-not variants, doubleword bitfield extract, word parity, accumulating multiplies with saturation. 
llvm-svn: 225024
 2014-12-31 00:08:34 +00:00
Colin LeMahieu 8971e055ae [Hexagon] Adding double-logic on predicate instructions. 
llvm-svn: 225018
 2014-12-30 23:22:39 +00:00
Colin LeMahieu 65f3e12ed1 [Hexagon] Adding newvalue compare and jumps. 
llvm-svn: 225015
 2014-12-30 23:04:21 +00:00
Colin LeMahieu 0cba5f1b43 [Hexagon] Adding postincrement register newvalue stores. 
llvm-svn: 225010
 2014-12-30 22:34:08 +00:00
Colin LeMahieu 9014890819 [Hexagon] Removing old newvalue store variants. Adding postincrement immediate newvalue stores. 
llvm-svn: 225009
 2014-12-30 22:28:31 +00:00
Colin LeMahieu 820d5cb608 [Hexagon] Adding indexed store new-value variants. 
llvm-svn: 225007
 2014-12-30 22:00:26 +00:00
Colin LeMahieu 2bad4a7177 [Hexagon] Adding indexed store of immediates. 
llvm-svn: 225006
 2014-12-30 21:01:38 +00:00
Colin LeMahieu 94a498bf0e [Hexagon] Adding indexed stores. 
llvm-svn: 225005
 2014-12-30 20:42:23 +00:00
Colin LeMahieu 9161d47476 [Hexagon] Adding reg-reg indexed load forms. 
llvm-svn: 224997
 2014-12-30 18:58:47 +00:00
Colin LeMahieu 377ac65340 [Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms. Adding compare to general register reg-imm form. 
llvm-svn: 224991
 2014-12-30 17:39:24 +00:00
Colin LeMahieu d7a56fd9ff [Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. 
llvm-svn: 224989
 2014-12-30 15:44:17 +00:00
Colin LeMahieu 651b72095b [Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. 
llvm-svn: 224957
 2014-12-29 21:33:45 +00:00
Colin LeMahieu bda31b42a0 [Hexagon] Adding post-increment register form stores and register-immediate form stores with tests. 
llvm-svn: 224952
 2014-12-29 20:44:51 +00:00
Colin LeMahieu 9a3cd3f58c [Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. 
llvm-svn: 224951
 2014-12-29 20:00:43 +00:00
Colin LeMahieu 3d34afb32d [Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs. 
llvm-svn: 224949
 2014-12-29 19:42:14 +00:00
Colin LeMahieu 8233fb002d [Hexagon] Adding auto-incrementing loads with and without byte reversal. 
llvm-svn: 224871
 2014-12-26 21:09:25 +00:00
Colin LeMahieu 0a721cd4e1 [Hexagon] Adding locked loads. 
llvm-svn: 224870
 2014-12-26 20:42:27 +00:00
Colin LeMahieu ff370ed90e [Hexagon] Adding deallocframe and circular addressing loads. 
llvm-svn: 224869
 2014-12-26 20:30:58 +00:00
Colin LeMahieu c83cbbf6a1 [Hexagon] Adding remaining post-increment instruction variants. Removing unused classes. 
llvm-svn: 224868
 2014-12-26 19:31:46 +00:00
Colin LeMahieu fe9612e09d [Hexagon] Adding post-increment unsigned byte loads. 
llvm-svn: 224867
 2014-12-26 19:12:11 +00:00
Colin LeMahieu 96976a10a3 [Hexagon] Adding post-increment signed byte loads with tests. 
llvm-svn: 224866
 2014-12-26 18:57:13 +00:00
Colin LeMahieu 947cd70413 [Hexagon] Adding doubleword load. 
llvm-svn: 224787
 2014-12-23 20:44:59 +00:00
Colin LeMahieu 026e88d317 [Hexagon] Reapplying 224775 load words. 
llvm-svn: 224786
 2014-12-23 20:02:16 +00:00
Colin LeMahieu 20be15718b Reverting 224775 until mayLoad flag is addressed. 
llvm-svn: 224783
 2014-12-23 19:22:59 +00:00
Colin LeMahieu 122aeaafea [Hexagon] Adding word loads. 
llvm-svn: 224775
 2014-12-23 18:06:56 +00:00
Colin LeMahieu 8e39cad934 [Hexagon] Adding signed halfword loads. 
llvm-svn: 224774
 2014-12-23 17:25:57 +00:00
Colin LeMahieu 4b1eac4dda [Hexagon] Adding memb instruction. Fixing whitespace in test from 224730. 
llvm-svn: 224735
 2014-12-22 21:40:43 +00:00
Colin LeMahieu af1e5de141 [Hexagon] Adding classes and load unsigned byte instruction, updating usages. 
llvm-svn: 224730
 2014-12-22 21:20:03 +00:00
Colin LeMahieu 0f850bde0e [Hexagon] Removing old variants of instructions and updating references. 
llvm-svn: 224612
 2014-12-19 20:29:29 +00:00
Colin LeMahieu 38ce8cd2e2 [Hexagon] Adding bit extraction and table indexing instructions. 
llvm-svn: 224610
 2014-12-19 20:01:08 +00:00
Colin LeMahieu 3c7f664d5a [Hexagon] Adding bit insertion instructions. 
llvm-svn: 224609
 2014-12-19 19:54:38 +00:00
Colin LeMahieu d63ef93b4b [Hexagon] Adding more xtype shift instructions. 
llvm-svn: 224608
 2014-12-19 19:51:35 +00:00
Colin LeMahieu cc09d1ccc5 [Hexagon] Adding xtype shift instructions. 
llvm-svn: 224604
 2014-12-19 19:34:50 +00:00
Colin LeMahieu f3db884efb [Hexagon] Adding transfers to and from control registers. 
llvm-svn: 224599
 2014-12-19 19:06:32 +00:00
Colin LeMahieu 5ccbb1298b [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions. 
llvm-svn: 224556
 2014-12-19 00:06:53 +00:00
Colin LeMahieu 174476ed96 Reverting 224550, was not ready for commit. 
llvm-svn: 224552
 2014-12-18 23:36:15 +00:00
Colin LeMahieu 9000481cda [Hexagon] Adding loop0/1 sp0/1/2loop0 instructions. 
llvm-svn: 224550
 2014-12-18 23:27:51 +00:00