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Author SHA1 Message Date
Suyog Sarda beb064bd94 Addition to r216371 (SLP and Loop Vectorization) and r218607 where 
cost model for signed division by power of 2 was improved for AArch64.
The revision r218607 missed test case for Loop Vectorization.
Adding it in this revision.

Differential Revision: http://reviews.llvm.org/D6181

llvm-svn: 221674
 2014-11-11 07:39:27 +00:00